[LLVM][RISCV] Check more extension dependencies

[imkiva]

Summary

This patch addresses two TODOs in RISCVISAInfo::checkDependency:

• Report error when both e and f (or d) extensions are specified in -march
• Report error when q extension is specified when rv64 is unavailable
• Corresponding unit tests are also updated

Currently, I cannot add a test about the q extension case because there's no q extension registered in either supported extensions or experimental extensions,
but the code added here should work fine if we have a proper q implementation in the future.

[imkiva]

Removed some tests that used e together with f or d

[wangpc]

llvm/lib/Support/RISCVISAInfo.cpp

948

I think the comment is outdated here. E can be combined with all other extensions according to spec:

Unless otherwise stated, standard extensions compatible with RV32I and RV64I are also compatible with RV32E and RV64E, respectively.

And, please see also D70401 for more context.

[imkiva]

address review comments

llvm/lib/Support/RISCVISAInfo.cpp

948

I downloaded the specification from here, and in page 34 the footnote says:

RV32E can be combined with all current standard extensions. Defining the F, D, and Q extensions as having a 16-entry floating point register file when combined with RV32E was considered but decided against. To support systems with reduced floating-point register state, we intend to define a “Zfinx” extension...

It seems in the spec version 20191213, they rejected the combination of E with standard floating-point extensions, instead, a separate extension Zfinx is chosen for the original purpose.
I am not sure if there's any newer specification that decides to allow this combination.

[asb]

llvm/lib/Support/RISCVISAInfo.cpp

948

There's a link to the ratified version on https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions - see https://drive.google.com/file/d/1GjHmphVKvJlOBJydAt36g0Oc8yCOPtKw/view

As @wangpc says, the restriction was removed and so the comment is out of date.

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

948

I'm not sure this is true.

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

948

The restriction was removed 4 years ago https://github.com/riscv/riscv-isa-manual/commit/013ba6dc8a504ee4ad7bee42554fecaef7ba797f

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

948

RV32E can be combined with all current standard extensions. Defining the F, D, and Q extensions as having a 16-entry floating point register file when combined with RV32E was considered but decided against. To support systems with reduced floating-point register state, we intend to define a “Zfinx” extension...

That really only says that the register file for F and D is still 32 entries with RV32E. It doesn't say they are incompatible. Maybe there was some even older text?

[craig.topper]

llvm/lib/Support/RISCVISAInfo.cpp

948

There was older text removed here https://github.com/riscv/riscv-isa-manual/commit/4845f5d61f96a827ec4d21d2c5a80b6bf7881e56

[craig.topper]

I have deleted the two TODOs in 02c11c5aed59624046125cf512c12f70d2fa358d

[imkiva]

Looks like I am reading a very old version of the spec haha. Anyway, thank you all for giving me the newest information and useful links! Thanks!!

clang/test/Driver/riscv-arch.c

 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-F-ZFINX-ER %s
 // RV32-F-ZFINX-ER: error: invalid arch name 'rv32ifzfinx',
 // RV32-F-ZFINX-ER: 'f' and 'zfinx' extensions are incompatible
 
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32idzdinx -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-D-ZDINX-ER %s
 // RV32-D-ZDINX-ER: error: invalid arch name 'rv32idzdinx',
 // RV32-D-ZFINX-ER: 'f' and 'zfinx' extensions are incompatible
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32ef -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EF-BADVARS %s
+// RV32-EF-BADVARS: error: invalid arch name 'rv32ef',
+// RV32-EF-BADVARS: 'e' extension is incompatible with 'f' extension
+
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32ed -### %s \
+// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ED-BADVARS %s
+// RV32-ED-BADVARS: error: invalid arch name 'rv32ed',
+// RV32-ED-BADVARS: 'e' extension is incompatible with 'f' extension and 'd' extension
+

llvm/lib/Support/RISCVISAInfo.cpp

RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
   }
 
   return RISCVISAInfo::postProcessAndChecking(std::move(ISAInfo));
 }
 
 Error RISCVISAInfo::checkDependency() {
   bool HasC = Exts.count("c") != 0;
   bool HasF = Exts.count("f") != 0;
+  bool HasD = Exts.count("d") != 0;
   bool HasZfinx = Exts.count("zfinx") != 0;
   bool HasVector = Exts.count("zve32x") != 0;
   bool HasZvl = MinVLen != 0;
   bool HasZcmt = Exts.count("zcmt") != 0;
 
   if (HasF && HasZfinx)
     return createStringError(errc::invalid_argument,
                              "'f' and 'zfinx' extensions are incompatible");
return createStringError(
         errc::invalid_argument,
         "'zvk*' requires 'v' or 'zve*' extension to also be specified");
 
   if (Exts.count("zvknhb") && !Exts.count("zve64x"))
     return createStringError(
         errc::invalid_argument,
         "'zvknhb' requires 'v' or 'zve64*' extension to also be specified");
 
-  if ((HasZcmt || Exts.count("zcmp")) && Exts.count("d") &&
+  if ((HasZcmt || Exts.count("zcmp")) && HasD &&
       (HasC || Exts.count("zcd")))
     return createStringError(
         errc::invalid_argument,
         Twine("'") + (HasZcmt ? "zcmt" : "zcmp") +
         "' extension is incompatible with '" + (HasC ? "c" : "zcd") +
         "' extension when 'd' extension is enabled");
 
   if (XLen != 32 && Exts.count("zcf"))
     return createStringError(errc::invalid_argument,
                              "'zcf' is only supported for 'rv32'");
 
   // Additional dependency checks.
-  // TODO: The 'q' extension requires rv64.
-  // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'.
+  // The 'q' extension requires rv64.
+  if (XLen != 64 && Exts.count("q"))
+    return createStringError(errc::invalid_argument,
+                             "'q' extension is only supported for 'rv64'");
+
+  // It is illegal to specify 'e' extensions with 'f' and 'd'.
+  if (Exts.count("e") && (HasF || HasD))
+    return createStringError(
+        errc::invalid_argument,
+        Twine("'e' extension is incompatible with ") +
+            (HasD ? "'f' extension and 'd' extension" : "'f' extension"));
 
   return Error::success();
 }
 
 static const char *ImpliedExtsD[] = {"f"};
 static const char *ImpliedExtsF[] = {"zicsr"};
 static const char *ImpliedExtsV[] = {"zvl128b", "zve64d"};
 static const char *ImpliedExtsXTHeadVdot[] = {"v"};

llvm/test/MC/RISCV/target-abi-invalid.s

 # RUN: llvm-mc -triple=riscv32 -target-abi lp64 < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32I-LP64 %s
 # RUN: llvm-mc -triple=riscv32 -mattr=+f -target-abi lp64f < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32IF-LP64F %s
 # RUN: llvm-mc -triple=riscv32 -mattr=+d -target-abi lp64d < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32IFD-LP64D %s
 # RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi lp64 < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32E-LP64 %s
-# RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi lp64f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32EF-LP64F %s
-# RUN: llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi lp64f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32EFD-LP64D %s
 # RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi lp64e %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32E-LP64E %s
 
 # RV32I-LP64: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 # RV32IF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 # RV32IFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 # RV32E-LP64: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
-# RV32EF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
-# RV32EFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 # RV32E-LP64E: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
 
 # RUN: llvm-mc -triple=riscv32 -target-abi ilp32f < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV32I-ILP32F %s
 # RUN: llvm-mc -triple=riscv64 -target-abi lp64f < %s 2>&1 \
 # RUN:   | FileCheck -check-prefix=RV64I-LP64F %s
 
 # RV32I-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)

 # RUN:   | FileCheck -check-prefix=RV64IF-LP64D %s
 
 # RV32I-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
 # RV32IF-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
 # RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
 # RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
 
 # RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi ilp32 < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32EF-ILP32F %s
-# RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi ilp32f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32EF-ILP32F %s
-# RUN: llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32EFD-ILP32F %s
-# RUN: llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32d < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV32EFD-ILP32D %s
+# RUN:   | FileCheck -check-prefix=RV32E-ILP32 %s
 
 # RV32E-ILP32: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
-# RV32EF-ILP32F: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
-# RV32EFD-ILP32F: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
-# RV32EFD-ILP32D: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
 
 # RUN: llvm-mc -triple=riscv64 -mattr=+e -target-abi lp64 < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64EF-LP64F %s
-# RUN: llvm-mc -triple=riscv64 -mattr=+e,+f -target-abi lp64f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64EF-LP64F %s
-# RUN: llvm-mc -triple=riscv64 -mattr=+e,+d -target-abi lp64f < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64EFD-LP64F %s
-# RUN: llvm-mc -triple=riscv64 -mattr=+e,+d -target-abi lp64d < %s 2>&1 \
-# RUN:   | FileCheck -check-prefix=RV64EFD-LP64D %s
+# RUN:   | FileCheck -check-prefix=RV64E-LP64 %s
 
 # RV64E-LP64: Only the lp64e ABI is supported for RV64E (ignoring target-abi)
-# RV64EF-LP64F: Only the lp64e ABI is supported for RV64E (ignoring target-abi)
-# RV64EFD-LP64F: Only the lp64e ABI is supported for RV64E (ignoring target-abi)
-# RV64EFD-LP64D: Only the lp64e ABI is supported for RV64E (ignoring target-abi)
 
 nop

llvm/unittests/Support/RISCVISAInfoTest.cpp

EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
               "'zcmt' extension is incompatible with 'zcd' extension when 'd' "
               "extension is enabled");
   }
 
   for (StringRef Input : {"rv64if_zcf"}) {
     EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
               "'zcf' is only supported for 'rv32'");
   }
+
+  for (StringRef Input : {"rv64efd", "rv32efd", "rv64ed", "rv32ed"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'e' extension is incompatible with 'f' extension"
+              " and 'd' extension");
+  }
+
+  for (StringRef Input : {"rv64ef", "rv32ef"}) {
+    EXPECT_EQ(toString(RISCVISAInfo::parseArchString(Input, true).takeError()),
+              "'e' extension is incompatible with 'f' extension");
+  }
 }
 
 TEST(ToFeatureVector, IIsDroppedAndExperimentalExtensionsArePrefixed) {
   auto MaybeISAInfo1 =
       RISCVISAInfo::parseArchString("rv64im_zicond", true, false);
   ASSERT_THAT_EXPECTED(MaybeISAInfo1, Succeeded());
   EXPECT_THAT((*MaybeISAInfo1)->toFeatureVector(),
               ElementsAre("+m", "+experimental-zicond"));