[DAGCombine] Support truncated constants for fptosi.sat combining

[e-kud]

Summary

Closes https://github.com/llvm/llvm-project/issues/56779

[dmgreen]

I think this makes sense, so long as the truncate we peek through is accounted for in the constant. LGTM

llvm/test/CodeGen/X86/fpclamptosat.ll

410

Remove this comment now? Same below.

[e-kud]

Rebased and removed FIXME

[RKSimon]

LGTM - cheers

[RKSimon]

@e-kud commit this?

[e-kud]

Rebased

[e-kud]

Return nounwind attribute missed during the last rebase.

[RKSimon]

LGTM - cheers

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 //===- DAGCombiner.cpp - Implement a DAG node combiner --------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
static SDValue isSaturatingMinMax(SDValue N0, SDValue N1, SDValue N2,
                                   bool &Unsigned, SelectionDAG &DAG) {
   auto isSignedMinMax = [&](SDValue N0, SDValue N1, SDValue N2, SDValue N3,
                             ISD::CondCode CC) {
     // The compare and select operand should be the same or the select operands
     // should be truncated versions of the comparison.
     if (N0 != N2 && (N2.getOpcode() != ISD::TRUNCATE || N0 != N2.getOperand(0)))
       return 0;
     // The constants need to be the same or a truncated version of each other.
-    ConstantSDNode *N1C = isConstOrConstSplat(N1);
-    ConstantSDNode *N3C = isConstOrConstSplat(N3);
+    ConstantSDNode *N1C = isConstOrConstSplat(peekThroughTruncates(N1));
+    ConstantSDNode *N3C = isConstOrConstSplat(peekThroughTruncates(N3));
     if (!N1C || !N3C)
       return 0;
-    const APInt &C1 = N1C->getAPIntValue();
-    const APInt &C2 = N3C->getAPIntValue();
+    const APInt &C1 = N1C->getAPIntValue().trunc(N1.getScalarValueSizeInBits());
+    const APInt &C2 = N3C->getAPIntValue().trunc(N3.getScalarValueSizeInBits());
     if (C1.getBitWidth() < C2.getBitWidth() || C1 != C2.sext(C1.getBitWidth()))
       return 0;
     return CC == ISD::SETLT ? ISD::SMIN : (CC == ISD::SETGT ? ISD::SMAX : 0);
   };
 
   // Check the initial value is a SMIN/SMAX equivalent.
   unsigned Opcode0 = isSignedMinMax(N0, N1, N2, N3, CC);
   if (!Opcode0)

llvm/test/CodeGen/X86/fpclamptosat.ll

entry:
   %1 = icmp sgt i32 %spec.store.select, 0
   %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 0
   %conv6 = trunc i32 %spec.store.select7 to i16
   ret i16 %conv6
 }
 
 ; i64 saturate
 
-; FIXME: Failure to recognise the i128 is in i64 bounds.
 define i64 @stest_f64i64(double %x) nounwind {
 ; CHECK-LABEL: stest_f64i64:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq __fixdfti@PLT
-; CHECK-NEXT:    xorl %ecx, %ecx
-; CHECK-NEXT:    movabsq $9223372036854775807, %rsi # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT:    cmpq %rsi, %rax
-; CHECK-NEXT:    movq %rdx, %rdi
-; CHECK-NEXT:    sbbq $0, %rdi
-; CHECK-NEXT:    cmovlq %rdx, %rcx
-; CHECK-NEXT:    cmovgeq %rsi, %rax
-; CHECK-NEXT:    movabsq $-9223372036854775808, %rdx # imm = 0x8000000000000000
-; CHECK-NEXT:    cmpq %rax, %rdx
-; CHECK-NEXT:    movq $-1, %rsi
-; CHECK-NEXT:    sbbq %rcx, %rsi
-; CHECK-NEXT:    cmovgeq %rdx, %rax
-; CHECK-NEXT:    popq %rcx
+; CHECK-NEXT:    cvttsd2si %xmm0, %rax
+; CHECK-NEXT:    ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
+; CHECK-NEXT:    cmovbeq %rax, %rcx
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    ucomisd %xmm0, %xmm0
+; CHECK-NEXT:    cmovnpq %rcx, %rax
 ; CHECK-NEXT:    retq
 entry:
   %conv = fptosi double %x to i128
   %0 = icmp slt i128 %conv, 9223372036854775807
   %spec.store.select = select i1 %0, i128 %conv, i128 9223372036854775807
   %1 = icmp sgt i128 %spec.store.select, -9223372036854775808
   %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 -9223372036854775808
   %conv6 = trunc i128 %spec.store.select7 to i64
entry:
   %0 = icmp slt i128 %conv, 18446744073709551616
   %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
   %1 = icmp sgt i128 %spec.store.select, 0
   %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 0
   %conv6 = trunc i128 %spec.store.select7 to i64
   ret i64 %conv6
 }
 
-; FIXME: Failure to recognise the i128 is in i64 bounds.
 define i64 @stest_f32i64(float %x) nounwind {
 ; CHECK-LABEL: stest_f32i64:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq __fixsfti@PLT
-; CHECK-NEXT:    xorl %ecx, %ecx
-; CHECK-NEXT:    movabsq $9223372036854775807, %rsi # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT:    cmpq %rsi, %rax
-; CHECK-NEXT:    movq %rdx, %rdi
-; CHECK-NEXT:    sbbq $0, %rdi
-; CHECK-NEXT:    cmovlq %rdx, %rcx
-; CHECK-NEXT:    cmovgeq %rsi, %rax
-; CHECK-NEXT:    movabsq $-9223372036854775808, %rdx # imm = 0x8000000000000000
-; CHECK-NEXT:    cmpq %rax, %rdx
-; CHECK-NEXT:    movq $-1, %rsi
-; CHECK-NEXT:    sbbq %rcx, %rsi
-; CHECK-NEXT:    cmovgeq %rdx, %rax
-; CHECK-NEXT:    popq %rcx
+; CHECK-NEXT:    cvttss2si %xmm0, %rax
+; CHECK-NEXT:    ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF
+; CHECK-NEXT:    cmovbeq %rax, %rcx
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    ucomiss %xmm0, %xmm0
+; CHECK-NEXT:    cmovnpq %rcx, %rax
 ; CHECK-NEXT:    retq
 entry:
   %conv = fptosi float %x to i128
   %0 = icmp slt i128 %conv, 9223372036854775807
   %spec.store.select = select i1 %0, i128 %conv, i128 9223372036854775807
   %1 = icmp sgt i128 %spec.store.select, -9223372036854775808
   %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 -9223372036854775808
   %conv6 = trunc i128 %spec.store.select7 to i64
entry:
   %0 = icmp slt i128 %conv, 18446744073709551616
   %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
   %1 = icmp sgt i128 %spec.store.select, 0
   %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 0
   %conv6 = trunc i128 %spec.store.select7 to i64
   ret i64 %conv6
 }
 
-; FIXME: Failure to recognise the i128 is in i64 bounds.
 define i64 @stest_f16i64(half %x) nounwind {
 ; CHECK-LABEL: stest_f16i64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    pushq %rax
-; CHECK-NEXT:    callq __fixhfti@PLT
-; CHECK-NEXT:    xorl %ecx, %ecx
-; CHECK-NEXT:    movabsq $9223372036854775807, %rsi # imm = 0x7FFFFFFFFFFFFFFF
-; CHECK-NEXT:    cmpq %rsi, %rax
-; CHECK-NEXT:    movq %rdx, %rdi
-; CHECK-NEXT:    sbbq $0, %rdi
-; CHECK-NEXT:    cmovlq %rdx, %rcx
-; CHECK-NEXT:    cmovgeq %rsi, %rax
-; CHECK-NEXT:    movabsq $-9223372036854775808, %rdx # imm = 0x8000000000000000
-; CHECK-NEXT:    cmpq %rax, %rdx
-; CHECK-NEXT:    movq $-1, %rsi
-; CHECK-NEXT:    sbbq %rcx, %rsi
-; CHECK-NEXT:    cmovgeq %rdx, %rax
+; CHECK-NEXT:    callq __extendhfsf2@PLT
+; CHECK-NEXT:    cvttss2si %xmm0, %rax
+; CHECK-NEXT:    ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
+; CHECK-NEXT:    cmovaeq %rax, %rcx
+; CHECK-NEXT:    ucomiss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; CHECK-NEXT:    movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF
+; CHECK-NEXT:    cmovbeq %rcx, %rdx
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    ucomiss %xmm0, %xmm0
+; CHECK-NEXT:    cmovnpq %rdx, %rax
 ; CHECK-NEXT:    popq %rcx
 ; CHECK-NEXT:    retq
 entry:
   %conv = fptosi half %x to i128
   %0 = icmp slt i128 %conv, 9223372036854775807
   %spec.store.select = select i1 %0, i128 %conv, i128 9223372036854775807
   %1 = icmp sgt i128 %spec.store.select, -9223372036854775808
   %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 -9223372036854775808