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Differential D149619

[NFC][HWASAN] Create shadow value just after alloca
Changes PlannedPublic

Authored by vitalybuka on May 1 2023, 3:07 PM.

Details

Reviewers
eugenis
fmayer
kstoimenov
thurston
pcc
Summary

Improves readability of IR and reduces .text by 1%.

Diff Detail

Event Timeline

vitalybuka created this revision.May 1 2023, 3:07 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 1 2023, 3:07 PM
Herald added subscribers: luke, Enna1, frasercrmck and 21 others. · View Herald Transcript
vitalybuka requested review of this revision.May 1 2023, 3:07 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 1 2023, 3:07 PM
Herald added subscribers: llvm-commits, • pcwang-thead, MaskRay. · View Herald Transcript
vitalybuka added a child revision: D149620: [NFC][HWASAN] Handle tags as Int8.May 1 2023, 3:17 PM
vitalybuka edited the summary of this revision. (Show Details)May 1 2023, 3:20 PM
vitalybuka added reviewers: eugenis, fmayer, kstoimenov, thurston, pcc.
Harbormaster completed remote builds in B229331: Diff 518574.May 1 2023, 3:58 PM
fmayer added inline comments.May 12 2023, 8:18 AM
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
1308

can you explain why this changed?

vitalybuka planned changes to this revision.Aug 2 2023, 1:17 PM
Herald added a subscriber: wangpc. · View Herald TranscriptAug 2 2023, 1:17 PM

Revision Contents

PathSize
llvm/
lib/
Transforms/
Instrumentation/
20 lines
test/
Instrumentation/
HWAddressSanitizer/
RISCV/
26 lines
52 lines
44 lines
20 lines
X86/
12 lines
6 lines
122 lines
50 lines
20 lines
20 lines
52 lines
42 lines
20 lines
152 lines
2 lines
20 lines
720 lines

Diff 518574

llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp

Show First 20 Lines • Show All 298 Lines • ▼ Show 20 Lines void instrumentMemAccessInline(Value *Ptr, bool IsWrite,
Instruction *InsertBefore); Instruction *InsertBefore);
bool ignoreMemIntrinsic(MemIntrinsic *MI); bool ignoreMemIntrinsic(MemIntrinsic *MI);
void instrumentMemIntrinsic(MemIntrinsic *MI); void instrumentMemIntrinsic(MemIntrinsic *MI);
bool instrumentMemAccess(InterestingMemoryOperand &O); bool instrumentMemAccess(InterestingMemoryOperand &O);
bool ignoreAccess(Instruction *Inst, Value *Ptr); bool ignoreAccess(Instruction *Inst, Value *Ptr);
void getInterestingMemoryOperands( void getInterestingMemoryOperands(
Instruction *I, SmallVectorImpl<InterestingMemoryOperand> &Interesting); Instruction *I, SmallVectorImpl<InterestingMemoryOperand> &Interesting);
void tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *Tag, size_t Size); void tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *ShadowPtr, Value *Tag,
size_t Size);
Value *tagPointer(IRBuilder<> &IRB, Type *Ty, Value *PtrLong, Value *Tag); Value *tagPointer(IRBuilder<> &IRB, Type *Ty, Value *PtrLong, Value *Tag);
Value *untagPointer(IRBuilder<> &IRB, Value *PtrLong); Value *untagPointer(IRBuilder<> &IRB, Value *PtrLong);
bool instrumentStack(memtag::StackInfo &Info, Value *StackTag, Value *UARTag, bool instrumentStack(memtag::StackInfo &Info, Value *StackTag, Value *UARTag,
const DominatorTree &DT, const PostDominatorTree &PDT, const DominatorTree &DT, const PostDominatorTree &PDT,
const LoopInfo &LI); const LoopInfo &LI);
Value *readRegister(IRBuilder<> &IRB, StringRef Name); Value *readRegister(IRBuilder<> &IRB, StringRef Name);
bool instrumentLandingPads(SmallVectorImpl<Instruction *> &RetVec); bool instrumentLandingPads(SmallVectorImpl<Instruction *> &RetVec);
Value *getNextTagWithCall(IRBuilder<> &IRB); Value *getNextTagWithCall(IRBuilder<> &IRB);
▲ Show 20 Lines • Show All 661 Lines • ▼ Show 20 Lines IRB.CreateCall(HwasanMemoryAccessCallbackSized[O.IsWrite],
O.TypeStoreSize), O.TypeStoreSize),
ConstantInt::get(IntptrTy, 8))}); ConstantInt::get(IntptrTy, 8))});
} }
untagPointerOperand(O.getInsn(), Addr); untagPointerOperand(O.getInsn(), Addr);
return true; return true;
} }
void HWAddressSanitizer::tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *Tag, void HWAddressSanitizer::tagAlloca(IRBuilder<> &IRB, AllocaInst *AI,
size_t Size) { Value *ShadowPtr, Value *Tag, size_t Size) {
size_t AlignedSize = alignTo(Size, Mapping.getObjectAlignment()); size_t AlignedSize = alignTo(Size, Mapping.getObjectAlignment());
if (!UseShortGranules) if (!UseShortGranules)
Size = AlignedSize; Size = AlignedSize;
Tag = IRB.CreateTrunc(Tag, IRB.getInt8Ty()); Tag = IRB.CreateTrunc(Tag, IRB.getInt8Ty());
if (InstrumentWithCalls) { if (InstrumentWithCalls) {
IRB.CreateCall(HwasanTagMemoryFunc, IRB.CreateCall(HwasanTagMemoryFunc,
{IRB.CreatePointerCast(AI, Int8PtrTy), Tag, {IRB.CreatePointerCast(AI, Int8PtrTy), Tag,
ConstantInt::get(IntptrTy, AlignedSize)}); ConstantInt::get(IntptrTy, AlignedSize)});
} else { } else {
size_t ShadowSize = Size >> Mapping.Scale; size_t ShadowSize = Size >> Mapping.Scale;
Value *AddrLong = untagPointer(IRB, IRB.CreatePointerCast(AI, IntptrTy));
Value *ShadowPtr = memToShadow(AddrLong, IRB);
// If this memset is not inlined, it will be intercepted in the hwasan // If this memset is not inlined, it will be intercepted in the hwasan
// runtime library. That's OK, because the interceptor skips the checks if // runtime library. That's OK, because the interceptor skips the checks if
// the address is in the shadow region. // the address is in the shadow region.
// FIXME: the interceptor is not as fast as real memset. Consider lowering // FIXME: the interceptor is not as fast as real memset. Consider lowering
// llvm.memset right here into either a sequence of stores, or a call to // llvm.memset right here into either a sequence of stores, or a call to
// hwasan_tag_memory. // hwasan_tag_memory.
if (ShadowSize) if (ShadowSize)
IRB.CreateMemSet(ShadowPtr, Tag, ShadowSize, Align(1)); IRB.CreateMemSet(ShadowPtr, Tag, ShadowSize, Align(1));
▲ Show 20 Lines • Show All 292 Lines • ▼ Show 20 Lines for (auto &KV : SInfo.AllocasToInstrument) {
auto *AI = KV.first; auto *AI = KV.first;
memtag::AllocaInfo &Info = KV.second; memtag::AllocaInfo &Info = KV.second;
IRBuilder<> IRB(AI->getNextNode()); IRBuilder<> IRB(AI->getNextNode());
// Replace uses of the alloca with tagged address. // Replace uses of the alloca with tagged address.
Value *Tag = getAllocaTag(IRB, StackTag, N); Value *Tag = getAllocaTag(IRB, StackTag, N);
Value *AILong = IRB.CreatePointerCast(AI, IntptrTy); Value *AILong = IRB.CreatePointerCast(AI, IntptrTy);
Value *AINoTagLong = untagPointer(IRB, AILong); Value *AINoTagLong = untagPointer(IRB, AILong);
Value *Replacement = tagPointer(IRB, AI->getType(), AINoTagLong, Tag); Value *ShadowPtr = memToShadow(AINoTagLong, IRB);
Value *Replacement = tagPointer(IRB, AI->getType(), AILong, Tag);
fmayerUnsubmitted
Not Done
ReplyInline Actions

can you explain why this changed?

fmayer: can you explain why this changed?
std::string Name = std::string Name =
AI->hasName() ? AI->getName().str() : "alloca." + itostr(N); AI->hasName() ? AI->getName().str() : "alloca." + itostr(N);
AINoTagLong->setName(Name + ".notag");
Replacement->setName(Name + ".hwasan"); Replacement->setName(Name + ".hwasan");
ShadowPtr->setName(Name + ".shadow");
size_t Size = memtag::getAllocaSizeInBytes(*AI); size_t Size = memtag::getAllocaSizeInBytes(*AI);
size_t AlignedSize = alignTo(Size, Mapping.getObjectAlignment()); size_t AlignedSize = alignTo(Size, Mapping.getObjectAlignment());
Value *AICast = IRB.CreatePointerCast(AI, Int8PtrTy); Value *AICast = IRB.CreatePointerCast(AI, Int8PtrTy);
auto HandleLifetime = [&](IntrinsicInst *II) { auto HandleLifetime = [&](IntrinsicInst *II) {
// Set the lifetime intrinsic to cover the whole alloca. This reduces the // Set the lifetime intrinsic to cover the whole alloca. This reduces the
Show All 30 Lines for (auto &KV : SInfo.AllocasToInstrument) {
} }
auto TagEnd = [&](Instruction *Node) { auto TagEnd = [&](Instruction *Node) {
IRB.SetInsertPoint(Node); IRB.SetInsertPoint(Node);
// When untagging, use the `AlignedSize` because we need to set the tags // When untagging, use the `AlignedSize` because we need to set the tags
// for the entire alloca to original. If we used `Size` here, we would // for the entire alloca to original. If we used `Size` here, we would
// keep the last granule tagged, and store zero in the last byte of the // keep the last granule tagged, and store zero in the last byte of the
// last granule, due to how short granules are implemented. // last granule, due to how short granules are implemented.
tagAlloca(IRB, AI, UARTag, AlignedSize); tagAlloca(IRB, AI, ShadowPtr, UARTag, AlignedSize);
}; };
// Calls to functions that may return twice (e.g. setjmp) confuse the // Calls to functions that may return twice (e.g. setjmp) confuse the
// postdominator analysis, and will leave us to keep memory tagged after // postdominator analysis, and will leave us to keep memory tagged after
// function return. Work around this by always untagging at every return // function return. Work around this by always untagging at every return
// statement if return_twice functions are called. // statement if return_twice functions are called.
bool StandardLifetime = bool StandardLifetime =
SInfo.UnrecognizedLifetimes.empty() && SInfo.UnrecognizedLifetimes.empty() &&
memtag::isStandardLifetime(Info.LifetimeStart, Info.LifetimeEnd, &DT, memtag::isStandardLifetime(Info.LifetimeStart, Info.LifetimeEnd, &DT,
&LI, ClMaxLifetimes) && &LI, ClMaxLifetimes) &&
!SInfo.CallsReturnTwice; !SInfo.CallsReturnTwice;
if (DetectUseAfterScope && StandardLifetime) { if (DetectUseAfterScope && StandardLifetime) {
IntrinsicInst *Start = Info.LifetimeStart[0]; IntrinsicInst *Start = Info.LifetimeStart[0];
IRB.SetInsertPoint(Start->getNextNode()); IRB.SetInsertPoint(Start->getNextNode());
tagAlloca(IRB, AI, Tag, Size); tagAlloca(IRB, AI, ShadowPtr, Tag, Size);
if (!memtag::forAllReachableExits(DT, PDT, LI, Start, Info.LifetimeEnd, if (!memtag::forAllReachableExits(DT, PDT, LI, Start, Info.LifetimeEnd,
SInfo.RetVec, TagEnd)) { SInfo.RetVec, TagEnd)) {
for (auto *End : Info.LifetimeEnd) for (auto *End : Info.LifetimeEnd)
End->eraseFromParent(); End->eraseFromParent();
} }
} else { } else {
tagAlloca(IRB, AI, Tag, Size); tagAlloca(IRB, AI, ShadowPtr, Tag, Size);
for (auto *RI : SInfo.RetVec) for (auto *RI : SInfo.RetVec)
TagEnd(RI); TagEnd(RI);
// We inserted tagging outside of the lifetimes, so we have to remove // We inserted tagging outside of the lifetimes, so we have to remove
// them. // them.
for (auto &II : Info.LifetimeStart) for (auto &II : Info.LifetimeStart)
II->eraseFromParent(); II->eraseFromParent();
for (auto &II : Info.LifetimeEnd) for (auto &II : Info.LifetimeEnd)
II->eraseFromParent(); II->eraseFromParent();
▲ Show 20 Lines • Show All 315 Lines • Show Last 20 Lines

llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll

Show All 29 Lines
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag() ; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64 ; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64
; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP17]], 72057594037927935
; CHECK-NEXT: [[TMP18:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP18]]
; CHECK-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 56 ; CHECK-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 56
; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]] ; CHECK-NEXT: [[TMP20:%.*]] = or i64 [[TMP17]], [[TMP19]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 ; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0
; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935 ; CHECK-NEXT: store i8 4, ptr [[TMP22]], align 1
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4 ; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]] ; CHECK-NEXT: store i8 [[TMP21]], ptr [[TMP23]], align 1
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP26]], align 1
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false)
; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use32(ptr nonnull %x) call void @use32(ptr nonnull %x)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll

Show All 16 Lines
; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]], !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]] ; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP18]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
; ;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca ; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
; ZERO-BASED-SHADOW-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] { ; ZERO-BASED-SHADOW-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] {
; ZERO-BASED-SHADOW-NEXT: entry: ; ZERO-BASED-SHADOW-NEXT: entry:
; ZERO-BASED-SHADOW-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; ZERO-BASED-SHADOW-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]] ; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @llvm.dbg.value(metadata !DIArgList(ptr %x, ptr %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21 call void @llvm.dbg.value(metadata !DIArgList(ptr %x, ptr %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21
call void @use32(ptr nonnull %x), !dbg !23 call void @use32(ptr nonnull %x), !dbg !23
ret void, !dbg !24 ret void, !dbg !24
} }
Show All 22 Lines

llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll

Show All 34 Lines
; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 ; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0 ; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0
; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP16]], 72057594037927935
; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP17]]
; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56 ; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56
; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]] ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP16]], [[TMP18]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8 ; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8
; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0
; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; CHECK-NEXT: store i8 4, ptr [[TMP21]], align 1
; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4 ; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]] ; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP22]], align 1
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP25]], align 1
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP26]], align 1
; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]]) ; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] ; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont: ; CHECK: invoke.cont:
; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP30]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: lpad: ; CHECK: lpad:
; CHECK-NEXT: [[TMP32:%.*]] = landingpad { ptr, i32 } ; CHECK-NEXT: [[TMP24:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup ; CHECK-NEXT: cleanup
; CHECK-NEXT: [[TMP33:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0 ; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 0
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 19) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 19)
; CHECK-NEXT: store ptr [[TMP33]], ptr [[EXN_SLOT]], align 8 ; CHECK-NEXT: store ptr [[TMP25]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1 ; CHECK-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 1
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 18) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 18)
; CHECK-NEXT: store i32 [[TMP34]], ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: store i32 [[TMP26]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]]) ; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])
; CHECK-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP27]], i64 1, i1 false)
; CHECK-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
; CHECK-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
; CHECK-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP38]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: br label [[EH_RESUME:%.*]] ; CHECK-NEXT: br label [[EH_RESUME:%.*]]
; CHECK: eh.resume: ; CHECK: eh.resume:
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 3) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 3)
; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8 ; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 2) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 2)
; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0 ; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0
Show All 34 Lines

llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll

Show All 28 Lines
; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 ; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 ; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16 ; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16
; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0 ; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0
; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[BUF]] to i64 ; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935 ; CHECK-NEXT: [[BUF_NOTAG:%.*]] = and i64 [[TMP16]], 72057594037927935
; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[BUF_NOTAG]], 4
; CHECK-NEXT: [[BUF_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP17]]
; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56 ; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP15]], 56
; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]] ; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP16]], [[TMP18]]
; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr ; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8 ; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP15]] to i8
; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[BUF]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP20]], i64 256, i1 false)
; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP24]], i8 [[TMP20]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf) ; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [ ; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
; CHECK-NEXT: i32 1, label [[RETURN:%.*]] ; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
; CHECK-NEXT: i32 2, label [[SW_BB1:%.*]] ; CHECK-NEXT: i32 2, label [[SW_BB1:%.*]]
; CHECK-NEXT: ] ; CHECK-NEXT: ]
; CHECK: sw.bb1: ; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; CHECK: while.body: ; CHECK: while.body:
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr @stackbuf, i32 19) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr @stackbuf, i32 19)
; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8 ; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8
; CHECK-NEXT: call void @may_jump() ; CHECK-NEXT: call void @may_jump()
; CHECK-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; CHECK: return: ; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[BUF]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP21]], i64 256, i1 false)
; CHECK-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; CHECK-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; CHECK-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP28]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 256, i1 false)
; CHECK-NEXT: ret i1 [[RETVAL_0]] ; CHECK-NEXT: ret i1 [[RETVAL_0]]
; ;
entry: entry:
%buf = alloca [4096 x i8], align 1 %buf = alloca [4096 x i8], align 1
%call = call i32 @setjmp(ptr noundef @jbuf) %call = call i32 @setjmp(ptr noundef @jbuf)
switch i32 %call, label %while.body [ switch i32 %call, label %while.body [
i32 1, label %return i32 1, label %return
i32 2, label %sw.bb1 i32 2, label %sw.bb1
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llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll

Show All 14 Lines
; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20
; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]] ; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]]
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP4]], 63 ; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP4]], 63
; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 57 ; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP5]], 63 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP5]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; CHECK-NEXT: [[TMP8:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; CHECK-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16 ; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16
; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1 ; CHECK-NEXT: [[TMP12:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1
; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[Y]] to i64 ; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -9079256848778919937 ; CHECK-NEXT: [[Y_NOTAG:%.*]] = and i64 [[TMP13]], -9079256848778919937
; CHECK-NEXT: [[TMP14:%.*]] = lshr i64 [[Y_NOTAG]], 4
; CHECK-NEXT: [[Y_SHADOW:%.*]] = inttoptr i64 [[TMP14]] to ptr
; CHECK-NEXT: [[TMP15:%.*]] = shl i64 [[TMP12]], 57 ; CHECK-NEXT: [[TMP15:%.*]] = shl i64 [[TMP12]], 57
; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP14]], [[TMP15]] ; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP13]], [[TMP15]]
; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP16]] to ptr ; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP16]] to ptr
; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP12]] to i8 ; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP12]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP17]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP17]], i64 16)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]]) ; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP18]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP18]], i64 16)
; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP19]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP19]], i64 16)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%x = alloca i8, i64 4 %x = alloca i8, i64 4
%y = alloca i8, i64 16 %y = alloca i8, i64 16
call void @use(ptr %x, ptr %y) call void @use(ptr %x, ptr %y)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll

Show All 15 Lines
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 57 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP2]], 63 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP2]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag() ; CHECK-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64 ; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -9079256848778919937 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], -9079256848778919937
; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 57 ; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 57
; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]] ; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 ; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use32(ptr nonnull %x) call void @use32(ptr nonnull %x)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll

Show All 18 Lines
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63 ; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63
; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57 ; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937
; CHECK-NEXT: [[TMP7:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr
; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57 ; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57
; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]] ; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8 ; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP11]], i64 16)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
Show All 18 Lines
; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 ; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 ; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57 ; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57
; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63 ; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63
; INLINE-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; INLINE-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0 ; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0
; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64 ; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
; INLINE-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], -9079256848778919937 ; INLINE-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP17]], -9079256848778919937
; INLINE-NEXT: [[TMP18:%.*]] = lshr i64 [[X_NOTAG]], 4
; INLINE-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP18]]
; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57 ; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57
; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]] ; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP17]], [[TMP19]]
; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr ; INLINE-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 ; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
; INLINE-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64 ; INLINE-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0
; INLINE-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], -9079256848778919937 ; INLINE-NEXT: store i8 4, ptr [[TMP22]], align 1
; INLINE-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4 ; INLINE-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[X]], i32 15
; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]] ; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP23]], align 1
; INLINE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0
; INLINE-NEXT: store i8 4, ptr [[TMP26]], align 1
; INLINE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[X]], i32 15
; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1
; INLINE-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; INLINE-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; INLINE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; INLINE-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; INLINE-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64 ; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false)
; INLINE-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], -9079256848778919937
; INLINE-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
; INLINE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP31]]
; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
; INLINE-NEXT: ret void ; INLINE-NEXT: ret void
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use32(ptr nonnull %x) call void @use32(ptr nonnull %x)
ret void ret void
} }
define i32 @test_simple(ptr %a) sanitize_hwaddress { define i32 @test_simple(ptr %a) sanitize_hwaddress {
; CHECK-LABEL: define i32 @test_simple ; CHECK-LABEL: define i32 @test_simple
; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] personality ptr @__hwasan_personality_thunk { ; CHECK-SAME: (ptr [[A:%.*]]) #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63 ; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63
; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57 ; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63
; CHECK-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16 ; CHECK-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 ; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -9079256848778919937 ; CHECK-NEXT: [[BUF_SROA_0_NOTAG:%.*]] = and i64 [[TMP6]], -9079256848778919937
; CHECK-NEXT: [[TMP7:%.*]] = lshr i64 [[BUF_SROA_0_NOTAG]], 4
; CHECK-NEXT: [[BUF_SROA_0_SHADOW:%.*]] = inttoptr i64 [[TMP7]] to ptr
; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57 ; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP5]], 57
; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]] ; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP6]], [[TMP8]]
; CHECK-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr ; CHECK-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8 ; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP5]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP10]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP10]], i64 16)
; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 ; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
; CHECK-NEXT: call void @__hwasan_store1(i64 [[TMP11]]) ; CHECK-NEXT: call void @__hwasan_store1(i64 [[TMP11]])
; CHECK-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4 ; CHECK-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP12]], i64 16) ; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[BUF_SROA_0]], i8 [[TMP12]], i64 16)
Show All 20 Lines
; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295 ; INLINE-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1 ; INLINE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; INLINE-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57 ; INLINE-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP4]], 57
; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63 ; INLINE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP15]], 63
; INLINE-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16 ; INLINE-NEXT: [[BUF_SROA_0:%.*]] = alloca { i8, [15 x i8] }, align 16
; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0 ; INLINE-NEXT: [[TMP16:%.*]] = xor i64 [[TMP2]], 0
; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 ; INLINE-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64
; INLINE-NEXT: [[TMP18:%.*]] = and i64 [[TMP17]], -9079256848778919937 ; INLINE-NEXT: [[BUF_SROA_0_NOTAG:%.*]] = and i64 [[TMP17]], -9079256848778919937
; INLINE-NEXT: [[TMP18:%.*]] = lshr i64 [[BUF_SROA_0_NOTAG]], 4
; INLINE-NEXT: [[BUF_SROA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP18]]
; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57 ; INLINE-NEXT: [[TMP19:%.*]] = shl i64 [[TMP16]], 57
; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP18]], [[TMP19]] ; INLINE-NEXT: [[TMP20:%.*]] = or i64 [[TMP17]], [[TMP19]]
; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr ; INLINE-NEXT: [[BUF_SROA_0_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8 ; INLINE-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP16]] to i8
; INLINE-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 ; INLINE-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[BUF_SROA_0_SHADOW]], i32 0
; INLINE-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], -9079256848778919937 ; INLINE-NEXT: store i8 1, ptr [[TMP22]], align 1
; INLINE-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4 ; INLINE-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15
; INLINE-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]] ; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP23]], align 1
; INLINE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP25]], i32 0 ; INLINE-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64
; INLINE-NEXT: store i8 1, ptr [[TMP26]], align 1 ; INLINE-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 57
; INLINE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[BUF_SROA_0]], i32 15 ; INLINE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP25]] to i8
; INLINE-NEXT: store i8 [[TMP21]], ptr [[TMP27]], align 1 ; INLINE-NEXT: [[TMP27:%.*]] = and i64 [[TMP24]], -9079256848778919937
; INLINE-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[BUF_SROA_0_HWASAN]] to i64 ; INLINE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; INLINE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 57 ; INLINE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP28]]
; INLINE-NEXT: [[TMP30:%.*]] = trunc i64 [[TMP29]] to i8 ; INLINE-NEXT: [[TMP30:%.*]] = load i8, ptr [[TMP29]], align 1
; INLINE-NEXT: [[TMP31:%.*]] = and i64 [[TMP28]], -9079256848778919937 ; INLINE-NEXT: [[TMP31:%.*]] = icmp ne i8 [[TMP26]], [[TMP30]]
; INLINE-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4 ; INLINE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP46:%.*]], !prof [[PROF1:![0-9]+]]
; INLINE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP32]] ; INLINE: 32:
; INLINE-NEXT: [[TMP34:%.*]] = load i8, ptr [[TMP33]], align 1 ; INLINE-NEXT: [[TMP33:%.*]] = icmp ugt i8 [[TMP30]], 15
; INLINE-NEXT: [[TMP35:%.*]] = icmp ne i8 [[TMP30]], [[TMP34]] ; INLINE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP35:%.*]], !prof [[PROF1]]
; INLINE-NEXT: br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP50:%.*]], !prof [[PROF1:![0-9]+]] ; INLINE: 34:
; INLINE: 36: ; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP24]])
; INLINE-NEXT: [[TMP37:%.*]] = icmp ugt i8 [[TMP34]], 15
; INLINE-NEXT: br i1 [[TMP37]], label [[TMP38:%.*]], label [[TMP39:%.*]], !prof [[PROF1]]
; INLINE: 38:
; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP28]])
; INLINE-NEXT: unreachable ; INLINE-NEXT: unreachable
; INLINE: 39: ; INLINE: 35:
; INLINE-NEXT: [[TMP40:%.*]] = and i64 [[TMP28]], 15 ; INLINE-NEXT: [[TMP36:%.*]] = and i64 [[TMP24]], 15
; INLINE-NEXT: [[TMP41:%.*]] = trunc i64 [[TMP40]] to i8 ; INLINE-NEXT: [[TMP37:%.*]] = trunc i64 [[TMP36]] to i8
; INLINE-NEXT: [[TMP42:%.*]] = add i8 [[TMP41]], 0 ; INLINE-NEXT: [[TMP38:%.*]] = add i8 [[TMP37]], 0
; INLINE-NEXT: [[TMP43:%.*]] = icmp uge i8 [[TMP42]], [[TMP34]] ; INLINE-NEXT: [[TMP39:%.*]] = icmp uge i8 [[TMP38]], [[TMP30]]
; INLINE-NEXT: br i1 [[TMP43]], label [[TMP38]], label [[TMP44:%.*]], !prof [[PROF1]] ; INLINE-NEXT: br i1 [[TMP39]], label [[TMP34]], label [[TMP40:%.*]], !prof [[PROF1]]
; INLINE: 44: ; INLINE: 40:
; INLINE-NEXT: [[TMP45:%.*]] = or i64 [[TMP31]], 15 ; INLINE-NEXT: [[TMP41:%.*]] = or i64 [[TMP27]], 15
; INLINE-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr ; INLINE-NEXT: [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr
; INLINE-NEXT: [[TMP47:%.*]] = load i8, ptr [[TMP46]], align 1 ; INLINE-NEXT: [[TMP43:%.*]] = load i8, ptr [[TMP42]], align 1
; INLINE-NEXT: [[TMP48:%.*]] = icmp ne i8 [[TMP30]], [[TMP47]] ; INLINE-NEXT: [[TMP44:%.*]] = icmp ne i8 [[TMP26]], [[TMP43]]
; INLINE-NEXT: br i1 [[TMP48]], label [[TMP38]], label [[TMP49:%.*]], !prof [[PROF1]] ; INLINE-NEXT: br i1 [[TMP44]], label [[TMP34]], label [[TMP45:%.*]], !prof [[PROF1]]
; INLINE: 49: ; INLINE: 45:
; INLINE-NEXT: br label [[TMP50]] ; INLINE-NEXT: br label [[TMP46]]
; INLINE: 50: ; INLINE: 46:
; INLINE-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4 ; INLINE-NEXT: store volatile i8 0, ptr [[BUF_SROA_0_HWASAN]], align 4
; INLINE-NEXT: [[TMP51:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; INLINE-NEXT: [[TMP47:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; INLINE-NEXT: [[TMP52:%.*]] = ptrtoint ptr [[BUF_SROA_0]] to i64 ; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SROA_0_SHADOW]], i8 [[TMP47]], i64 1, i1 false)
; INLINE-NEXT: [[TMP53:%.*]] = and i64 [[TMP52]], -9079256848778919937
; INLINE-NEXT: [[TMP54:%.*]] = lshr i64 [[TMP53]], 4
; INLINE-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP54]]
; INLINE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP55]], i8 [[TMP51]], i64 1, i1 false)
; INLINE-NEXT: ret i32 0 ; INLINE-NEXT: ret i32 0
; ;
entry: entry:
%buf.sroa.0 = alloca i8, align 4 %buf.sroa.0 = alloca i8, align 4
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0) call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %buf.sroa.0)
store volatile i8 0, ptr %buf.sroa.0, align 4 store volatile i8 0, ptr %buf.sroa.0, align 4
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %buf.sroa.0) call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %buf.sroa.0)
ret i32 0 ret i32 0
} }
; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn ; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn ; Function Attrs: argmemonly mustprogress nofree nosync nounwind willreturn
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)

llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll

Show All 27 Lines
; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8 ; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0 ; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0
; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935
; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]]
; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56 ; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56
; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]] ; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP19]], [[TMP21]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16 ; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16
; CHECK-NEXT: [[TMP28:%.*]] = xor i64 [[TMP4]], 128 ; CHECK-NEXT: [[TMP24:%.*]] = xor i64 [[TMP4]], 128
; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[Y]] to i64 ; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935 ; CHECK-NEXT: [[Y_NOTAG:%.*]] = and i64 [[TMP25]], 72057594037927935
; CHECK-NEXT: [[TMP31:%.*]] = shl i64 [[TMP28]], 56 ; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[Y_NOTAG]], 4
; CHECK-NEXT: [[TMP32:%.*]] = or i64 [[TMP30]], [[TMP31]] ; CHECK-NEXT: [[Y_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP32]] to ptr ; CHECK-NEXT: [[TMP27:%.*]] = shl i64 [[TMP24]], 56
; CHECK-NEXT: [[TMP33:%.*]] = trunc i64 [[TMP28]] to i8 ; CHECK-NEXT: [[TMP28:%.*]] = or i64 [[TMP25]], [[TMP27]]
; CHECK-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[Y]] to i64 ; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP28]] to ptr
; CHECK-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935 ; CHECK-NEXT: [[TMP29:%.*]] = trunc i64 [[TMP24]] to i8
; CHECK-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[Y_SHADOW]], i8 [[TMP29]], i64 1, i1 false)
; CHECK-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]]) ; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
; CHECK-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; CHECK-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935 ; CHECK-NEXT: [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[Y_SHADOW]], i8 [[TMP31]], i64 1, i1 false)
; CHECK-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
; CHECK-NEXT: [[TMP43:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP45:%.*]] = and i64 [[TMP44]], 72057594037927935
; CHECK-NEXT: [[TMP46:%.*]] = lshr i64 [[TMP45]], 4
; CHECK-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP46]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP47]], i8 [[TMP43]], i64 1, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%x = alloca i8, i64 4 %x = alloca i8, i64 4
%y = alloca i8, i64 16 %y = alloca i8, i64 16
call void @use(ptr %x, ptr %y) call void @use(ptr %x, ptr %y)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll

Show All 29 Lines
; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8 ; CHECK-NEXT: store i64 [[TMP15]], ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0 ; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0
; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935
; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP20]]
; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56 ; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56
; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]] ; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP19]], [[TMP21]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP26]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false)
; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP31]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use32(ptr nonnull %x) call void @use32(ptr nonnull %x)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll

Show All 31 Lines
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP17:%.*]] = call i8 @__hwasan_generate_tag() ; CHECK-NEXT: [[TMP17:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP18:%.*]] = zext i8 [[TMP17]] to i64 ; CHECK-NEXT: [[TMP18:%.*]] = zext i8 [[TMP17]] to i64
; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP19]], 72057594037927935
; CHECK-NEXT: [[TMP20:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP20]]
; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56 ; CHECK-NEXT: [[TMP21:%.*]] = shl i64 [[TMP18]], 56
; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP20]], [[TMP21]] ; CHECK-NEXT: [[TMP22:%.*]] = or i64 [[TMP19]], [[TMP21]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP22]] to ptr
; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[TMP25:%.*]] = and i64 [[TMP24]], 72057594037927935
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP29:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP24]], i64 1, i1 false)
; CHECK-NEXT: [[TMP30:%.*]] = and i64 [[TMP29]], 72057594037927935
; CHECK-NEXT: [[TMP31:%.*]] = lshr i64 [[TMP30]], 4
; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP31]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP32]], i8 [[TMP28]], i64 1, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use32(ptr nonnull %x) call void @use32(ptr nonnull %x)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll

Show All 16 Lines
; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]], !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] ; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]] ; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP18]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
; ;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca ; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
; ZERO-BASED-SHADOW-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] { ; ZERO-BASED-SHADOW-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] {
; ZERO-BASED-SHADOW-NEXT: entry: ; ZERO-BASED-SHADOW-NEXT: entry:
; ZERO-BASED-SHADOW-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; ZERO-BASED-SHADOW-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]], !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]], !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP9]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr, !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP10]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP12]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP13]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP8]], ptr [[TMP14]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]] ; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]] ; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]] ; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP11]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP17:%.*]] = and i64 [[TMP16]], 72057594037927935, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP18:%.*]] = lshr i64 [[TMP17]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP19]], i8 [[TMP15]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]] ; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @llvm.dbg.value(metadata !DIArgList(ptr %x, ptr %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21 call void @llvm.dbg.value(metadata !DIArgList(ptr %x, ptr %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21
call void @use32(ptr nonnull %x), !dbg !23 call void @use32(ptr nonnull %x), !dbg !23
ret void, !dbg !24 ret void, !dbg !24
} }
Show All 22 Lines

llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll

Show All 36 Lines
; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 ; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 ; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935
; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]]
; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 ; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56
; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8 ; CHECK-NEXT: [[EXN_SLOT:%.*]] = alloca ptr, align 8
; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 ; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]]) ; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]] ; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont: ; CHECK: invoke.cont:
; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: lpad: ; CHECK: lpad:
; CHECK-NEXT: [[TMP32:%.*]] = landingpad { ptr, i32 } ; CHECK-NEXT: [[TMP24:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup ; CHECK-NEXT: cleanup
; CHECK-NEXT: [[TMP33:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]]) ; CHECK-NEXT: [[TMP25:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP33]]) ; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP25]])
; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 0 ; CHECK-NEXT: [[TMP26:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 0
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19)
; CHECK-NEXT: store ptr [[TMP34]], ptr [[EXN_SLOT]], align 8 ; CHECK-NEXT: store ptr [[TMP26]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP35:%.*]] = extractvalue { ptr, i32 } [[TMP32]], 1 ; CHECK-NEXT: [[TMP27:%.*]] = extractvalue { ptr, i32 } [[TMP24]], 1
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18)
; CHECK-NEXT: store i32 [[TMP35]], ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: store i32 [[TMP27]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]]) ; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])
; CHECK-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
; CHECK-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP39]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: br label [[EH_RESUME:%.*]] ; CHECK-NEXT: br label [[EH_RESUME:%.*]]
; CHECK: eh.resume: ; CHECK: eh.resume:
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 3) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 3)
; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8 ; CHECK-NEXT: [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 2) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 2)
; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4 ; CHECK-NEXT: [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0 ; CHECK-NEXT: [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } undef, ptr [[EXN]], 0
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llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll

Show All 15 Lines
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP4]], -72057594037927936 ; CHECK-NEXT: [[X_NOTAG:%.*]] = or i64 [[TMP4]], -72057594037927936
; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP5]] to ptr
; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 ; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56
; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP6]], 72057594037927935 ; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP6]], 72057594037927935
; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP5]], [[TMP7]] ; CHECK-NEXT: [[TMP8:%.*]] = and i64 [[TMP4]], [[TMP7]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8 ; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP3]] to i8
; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false)
; CHECK-NEXT: [[TMP11:%.*]] = or i64 [[TMP10]], -72057594037927936
; CHECK-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4
; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP12]] to ptr
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]) ; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP10]], i64 1, i1 false)
; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP15]], -72057594037927936
; CHECK-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4
; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use32(ptr nonnull %x) call void @use32(ptr nonnull %x)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll

Show First 20 Lines • Show All 113 Lines • ▼ Show 20 Lines
; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 ; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 ; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 ; CHECK-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935
; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[X_NOTAG]], 4
; CHECK-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]]
; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 ; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56
; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr ; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 ; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]]) ; CHECK-NEXT: call void @use(ptr [[X_HWASAN]])
; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca ; NOIFUNC-TLS-HISTORY-LABEL: define void @test_alloca
; NOIFUNC-TLS-HISTORY-SAME: () #[[ATTR0]] { ; NOIFUNC-TLS-HISTORY-SAME: () #[[ATTR0]] {
; NOIFUNC-TLS-HISTORY-NEXT: entry: ; NOIFUNC-TLS-HISTORY-NEXT: entry:
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer() ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.thread.pointer()
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
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; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 ; NOIFUNC-TLS-HISTORY-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 ; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 ; NOIFUNC-TLS-HISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; NOIFUNC-TLS-HISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; NOIFUNC-TLS-HISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 ; NOIFUNC-TLS-HISTORY-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP19:%.*]] = lshr i64 [[X_NOTAG]], 4
; NOIFUNC-TLS-HISTORY-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]]
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
; NOIFUNC-TLS-HISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr ; NOIFUNC-TLS-HISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP22]], i64 1, i1 false)
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
; NOIFUNC-TLS-HISTORY-NEXT: call void @use(ptr [[X_HWASAN]]) ; NOIFUNC-TLS-HISTORY-NEXT: call void @use(ptr [[X_HWASAN]])
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; NOIFUNC-TLS-HISTORY-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP23]], i64 1, i1 false)
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
; NOIFUNC-TLS-HISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
; NOIFUNC-TLS-HISTORY-NEXT: ret void ; NOIFUNC-TLS-HISTORY-NEXT: ret void
; ;
; NOIFUNC-TLS-NOHISTORY-LABEL: define void @test_alloca ; NOIFUNC-TLS-NOHISTORY-LABEL: define void @test_alloca
; NOIFUNC-TLS-NOHISTORY-SAME: () #[[ATTR0]] { ; NOIFUNC-TLS-NOHISTORY-SAME: () #[[ATTR0]] {
; NOIFUNC-TLS-NOHISTORY-NEXT: entry: ; NOIFUNC-TLS-NOHISTORY-NEXT: entry:
; NOIFUNC-TLS-NOHISTORY-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) ; NOIFUNC-TLS-NOHISTORY-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; NOIFUNC-TLS-NOHISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4
; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]]
; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr ; NOIFUNC-TLS-NOHISTORY-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP8]], i64 1, i1 false)
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]]
; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false)
; NOIFUNC-TLS-NOHISTORY-NEXT: call void @use(ptr [[X_HWASAN]]) ; NOIFUNC-TLS-NOHISTORY-NEXT: call void @use(ptr [[X_HWASAN]])
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP9:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false)
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 4
; NOIFUNC-TLS-NOHISTORY-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]]
; NOIFUNC-TLS-NOHISTORY-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false)
; NOIFUNC-TLS-NOHISTORY-NEXT: ret void ; NOIFUNC-TLS-NOHISTORY-NEXT: ret void
; ;
; NOIFUNC-NOTLS-LABEL: define void @test_alloca ; NOIFUNC-NOTLS-LABEL: define void @test_alloca
; NOIFUNC-NOTLS-SAME: () #[[ATTR0]] { ; NOIFUNC-NOTLS-SAME: () #[[ATTR0]] {
; NOIFUNC-NOTLS-NEXT: entry: ; NOIFUNC-NOTLS-NEXT: entry:
; NOIFUNC-NOTLS-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8 ; NOIFUNC-NOTLS-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
; NOIFUNC-NOTLS-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; NOIFUNC-NOTLS-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; NOIFUNC-NOTLS-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; NOIFUNC-NOTLS-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; NOIFUNC-NOTLS-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20 ; NOIFUNC-NOTLS-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20
; NOIFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP3]] ; NOIFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP3]]
; NOIFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56 ; NOIFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56
; NOIFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; NOIFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; NOIFUNC-NOTLS-NEXT: [[TMP4:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; NOIFUNC-NOTLS-NEXT: [[TMP4:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; NOIFUNC-NOTLS-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-NOTLS-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
; NOIFUNC-NOTLS-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 72057594037927935 ; NOIFUNC-NOTLS-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP5]], 72057594037927935
; NOIFUNC-NOTLS-NEXT: [[TMP6:%.*]] = lshr i64 [[X_NOTAG]], 4
; NOIFUNC-NOTLS-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP6]]
; NOIFUNC-NOTLS-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 56 ; NOIFUNC-NOTLS-NEXT: [[TMP7:%.*]] = shl i64 [[TMP4]], 56
; NOIFUNC-NOTLS-NEXT: [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]] ; NOIFUNC-NOTLS-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]]
; NOIFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr ; NOIFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
; NOIFUNC-NOTLS-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8 ; NOIFUNC-NOTLS-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP4]] to i8
; NOIFUNC-NOTLS-NEXT: [[TMP10:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false)
; NOIFUNC-NOTLS-NEXT: [[TMP11:%.*]] = and i64 [[TMP10]], 72057594037927935
; NOIFUNC-NOTLS-NEXT: [[TMP12:%.*]] = lshr i64 [[TMP11]], 4
; NOIFUNC-NOTLS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP12]]
; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP13]], i8 [[TMP9]], i64 1, i1 false)
; NOIFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]]) ; NOIFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]])
; NOIFUNC-NOTLS-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; NOIFUNC-NOTLS-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; NOIFUNC-NOTLS-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64 ; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP10]], i64 1, i1 false)
; NOIFUNC-NOTLS-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935
; NOIFUNC-NOTLS-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4
; NOIFUNC-NOTLS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP17]]
; NOIFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false)
; NOIFUNC-NOTLS-NEXT: ret void ; NOIFUNC-NOTLS-NEXT: ret void
; ;
; IFUNC-NOTLS-LABEL: define void @test_alloca ; IFUNC-NOTLS-LABEL: define void @test_alloca
; IFUNC-NOTLS-SAME: () #[[ATTR0]] { ; IFUNC-NOTLS-SAME: () #[[ATTR0]] {
; IFUNC-NOTLS-NEXT: entry: ; IFUNC-NOTLS-NEXT: entry:
; IFUNC-NOTLS-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow) ; IFUNC-NOTLS-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)
; IFUNC-NOTLS-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; IFUNC-NOTLS-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; IFUNC-NOTLS-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64 ; IFUNC-NOTLS-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; IFUNC-NOTLS-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20 ; IFUNC-NOTLS-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; IFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]] ; IFUNC-NOTLS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; IFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56 ; IFUNC-NOTLS-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; IFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; IFUNC-NOTLS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; IFUNC-NOTLS-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; IFUNC-NOTLS-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; IFUNC-NOTLS-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64 ; IFUNC-NOTLS-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
; IFUNC-NOTLS-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 72057594037927935 ; IFUNC-NOTLS-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP4]], 72057594037927935
; IFUNC-NOTLS-NEXT: [[TMP5:%.*]] = lshr i64 [[X_NOTAG]], 4
; IFUNC-NOTLS-NEXT: [[X_SHADOW:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP5]]
; IFUNC-NOTLS-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56 ; IFUNC-NOTLS-NEXT: [[TMP6:%.*]] = shl i64 [[TMP3]], 56
; IFUNC-NOTLS-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]] ; IFUNC-NOTLS-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]]
; IFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr ; IFUNC-NOTLS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
; IFUNC-NOTLS-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8 ; IFUNC-NOTLS-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
; IFUNC-NOTLS-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64 ; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP8]], i64 1, i1 false)
; IFUNC-NOTLS-NEXT: [[TMP10:%.*]] = and i64 [[TMP9]], 72057594037927935
; IFUNC-NOTLS-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4
; IFUNC-NOTLS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP11]]
; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false)
; IFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]]) ; IFUNC-NOTLS-NEXT: call void @use(ptr [[X_HWASAN]])
; IFUNC-NOTLS-NEXT: [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; IFUNC-NOTLS-NEXT: [[TMP9:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; IFUNC-NOTLS-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 ; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP9]], i64 1, i1 false)
; IFUNC-NOTLS-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935
; IFUNC-NOTLS-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 4
; IFUNC-NOTLS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]]
; IFUNC-NOTLS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false)
; IFUNC-NOTLS-NEXT: ret void ; IFUNC-NOTLS-NEXT: ret void
; ;
; FUCHSIA-LABEL: define void @test_alloca ; FUCHSIA-LABEL: define void @test_alloca
; FUCHSIA-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk { ; FUCHSIA-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
; FUCHSIA-NEXT: entry: ; FUCHSIA-NEXT: entry:
; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; FUCHSIA-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8 ; FUCHSIA-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; FUCHSIA-NEXT: [[TMP1:%.*]] = ashr i64 [[TMP0]], 3 ; FUCHSIA-NEXT: [[TMP1:%.*]] = ashr i64 [[TMP0]], 3
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; FUCHSIA-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1 ; FUCHSIA-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
; FUCHSIA-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8 ; FUCHSIA-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
; FUCHSIA-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]] ; FUCHSIA-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
; FUCHSIA-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8 ; FUCHSIA-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56 ; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; FUCHSIA-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; FUCHSIA-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; FUCHSIA-NEXT: [[TMP13:%.*]] = xor i64 [[TMP1]], 0 ; FUCHSIA-NEXT: [[TMP13:%.*]] = xor i64 [[TMP1]], 0
; FUCHSIA-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64 ; FUCHSIA-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64
; FUCHSIA-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935 ; FUCHSIA-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP14]], 72057594037927935
; FUCHSIA-NEXT: [[TMP15:%.*]] = lshr i64 [[X_NOTAG]], 4
; FUCHSIA-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP15]] to ptr
; FUCHSIA-NEXT: [[TMP16:%.*]] = shl i64 [[TMP13]], 56 ; FUCHSIA-NEXT: [[TMP16:%.*]] = shl i64 [[TMP13]], 56
; FUCHSIA-NEXT: [[TMP17:%.*]] = or i64 [[TMP15]], [[TMP16]] ; FUCHSIA-NEXT: [[TMP17:%.*]] = or i64 [[TMP14]], [[TMP16]]
; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr ; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr
; FUCHSIA-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP13]] to i8 ; FUCHSIA-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP13]] to i8
; FUCHSIA-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 ; FUCHSIA-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0
; FUCHSIA-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935 ; FUCHSIA-NEXT: store i8 4, ptr [[TMP19]], align 1
; FUCHSIA-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4 ; FUCHSIA-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[X]], i32 15
; FUCHSIA-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr ; FUCHSIA-NEXT: store i8 [[TMP18]], ptr [[TMP20]], align 1
; FUCHSIA-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP22]], i32 0
; FUCHSIA-NEXT: store i8 4, ptr [[TMP23]], align 1
; FUCHSIA-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[X]], i32 15
; FUCHSIA-NEXT: store i8 [[TMP18]], ptr [[TMP24]], align 1
; FUCHSIA-NEXT: call void @use(ptr [[X_HWASAN]]) ; FUCHSIA-NEXT: call void @use(ptr [[X_HWASAN]])
; FUCHSIA-NEXT: [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; FUCHSIA-NEXT: [[TMP21:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; FUCHSIA-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64 ; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP21]], i64 1, i1 false)
; FUCHSIA-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; FUCHSIA-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; FUCHSIA-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP28]] to ptr
; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; FUCHSIA-NEXT: ret void ; FUCHSIA-NEXT: ret void
; ;
; FUCHSIA-LIBCALL-LABEL: define void @test_alloca ; FUCHSIA-LIBCALL-LABEL: define void @test_alloca
; FUCHSIA-LIBCALL-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk { ; FUCHSIA-LIBCALL-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
; FUCHSIA-LIBCALL-NEXT: entry: ; FUCHSIA-LIBCALL-NEXT: entry:
; FUCHSIA-LIBCALL-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; FUCHSIA-LIBCALL-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; FUCHSIA-LIBCALL-NEXT: [[TMP0:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) ; FUCHSIA-LIBCALL-NEXT: [[TMP0:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
; FUCHSIA-LIBCALL-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; FUCHSIA-LIBCALL-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; FUCHSIA-LIBCALL-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; FUCHSIA-LIBCALL-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; FUCHSIA-LIBCALL-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 44 ; FUCHSIA-LIBCALL-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 44
; FUCHSIA-LIBCALL-NEXT: [[TMP4:%.*]] = or i64 [[TMP0]], [[TMP3]] ; FUCHSIA-LIBCALL-NEXT: [[TMP4:%.*]] = or i64 [[TMP0]], [[TMP3]]
; FUCHSIA-LIBCALL-NEXT: call void @__hwasan_add_frame_record(i64 [[TMP4]]) ; FUCHSIA-LIBCALL-NEXT: call void @__hwasan_add_frame_record(i64 [[TMP4]])
; FUCHSIA-LIBCALL-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 20 ; FUCHSIA-LIBCALL-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 20
; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP5]] ; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP5]]
; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56 ; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56
; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16 ; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0 ; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64 ; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], 72057594037927935 ; FUCHSIA-LIBCALL-NEXT: [[X_NOTAG:%.*]] = and i64 [[TMP7]], 72057594037927935
; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = lshr i64 [[X_NOTAG]], 4
; FUCHSIA-LIBCALL-NEXT: [[X_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 56 ; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 56
; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[X]] to i64 ; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X_SHADOW]], i32 0
; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 72057594037927935 ; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP12]], align 1
; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4 ; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X]], i32 15
; FUCHSIA-LIBCALL-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr ; FUCHSIA-LIBCALL-NEXT: store i8 [[TMP11]], ptr [[TMP13]], align 1
; FUCHSIA-LIBCALL-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP15]], i32 0
; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP16]], align 1
; FUCHSIA-LIBCALL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[X]], i32 15
; FUCHSIA-LIBCALL-NEXT: store i8 [[TMP11]], ptr [[TMP17]], align 1
; FUCHSIA-LIBCALL-NEXT: call void @use(ptr [[X_HWASAN]]) ; FUCHSIA-LIBCALL-NEXT: call void @use(ptr [[X_HWASAN]])
; FUCHSIA-LIBCALL-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; FUCHSIA-LIBCALL-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64 ; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[X_SHADOW]], i8 [[TMP14]], i64 1, i1 false)
; FUCHSIA-LIBCALL-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
; FUCHSIA-LIBCALL-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
; FUCHSIA-LIBCALL-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP18]], i64 1, i1 false)
; FUCHSIA-LIBCALL-NEXT: ret void ; FUCHSIA-LIBCALL-NEXT: ret void
; ;
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @use(ptr %x) call void @use(ptr %x)
ret void ret void
} }

llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll

; Test that storage for allocas with disjoint lifetimes is reused with ; Test that storage for allocas with disjoint lifetimes is reused with
; use-after-scope. ; use-after-scope.
; RUN: opt -S -passes=hwasan %s -hwasan-use-after-scope -o - | \ ; RUN: opt -S -passes=hwasan %s -hwasan-use-after-scope -o - | \
; RUN: llc -no-stack-coloring=false -o - | \ ; RUN: llc -no-stack-coloring=false -o - | \
; RUN: FileCheck %s --check-prefix=COLOR ; RUN: FileCheck %s --check-prefix=COLOR
; RUN: opt -S -passes=hwasan -hwasan-use-after-scope %s -o - | \ ; RUN: opt -S -passes=hwasan -hwasan-use-after-scope %s -o - | \
; RUN: llc -no-stack-coloring=true -o - | \ ; RUN: llc -no-stack-coloring=true -o - | \
; RUN: FileCheck %s --check-prefix=NOCOLOR ; RUN: FileCheck %s --check-prefix=NOCOLOR
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-android29" target triple = "aarch64-unknown-linux-android29"
; REQUIRES: aarch64-registered-target ; REQUIRES: aarch64-registered-target
; COLOR: sub sp, sp, #240 ; COLOR: sub sp, sp, #240
; NOCOLOR: sub sp, sp, #384 ; NOCOLOR: sub sp, sp, #400
define i32 @myCall_w2(i32 %in) sanitize_hwaddress { define i32 @myCall_w2(i32 %in) sanitize_hwaddress {
entry: entry:
%a = alloca [17 x ptr], align 8 %a = alloca [17 x ptr], align 8
%a2 = alloca [16 x ptr], align 8 %a2 = alloca [16 x ptr], align 8
call void @llvm.lifetime.start.p0(i64 136, ptr %a) call void @llvm.lifetime.start.p0(i64 136, ptr %a)
%t1 = call i32 @foo(i32 %in, ptr %a) %t1 = call i32 @foo(i32 %in, ptr %a)
%t2 = call i32 @foo(i32 %in, ptr %a) %t2 = call i32 @foo(i32 %in, ptr %a)
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llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll

Show All 30 Lines
; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8 ; CHECK-NEXT: store i64 [[TMP14]], ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295 ; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1 ; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56 ; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16 ; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16
; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0 ; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[BUF]] to i64 ; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP19:%.*]] = and i64 [[TMP18]], 72057594037927935 ; CHECK-NEXT: [[BUF_NOTAG:%.*]] = and i64 [[TMP18]], 72057594037927935
; CHECK-NEXT: [[TMP19:%.*]] = lshr i64 [[BUF_NOTAG]], 4
; CHECK-NEXT: [[BUF_SHADOW:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP19]]
; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56 ; CHECK-NEXT: [[TMP20:%.*]] = shl i64 [[TMP17]], 56
; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP19]], [[TMP20]] ; CHECK-NEXT: [[TMP21:%.*]] = or i64 [[TMP18]], [[TMP20]]
; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr ; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8 ; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP17]] to i8
; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[BUF]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP22]], i64 256, i1 false)
; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf) ; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [ ; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
; CHECK-NEXT: i32 1, label [[RETURN:%.*]] ; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
; CHECK-NEXT: i32 2, label [[SW_BB1:%.*]] ; CHECK-NEXT: i32 2, label [[SW_BB1:%.*]]
; CHECK-NEXT: ] ; CHECK-NEXT: ]
; CHECK: sw.bb1: ; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; CHECK: while.body: ; CHECK: while.body:
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr @stackbuf, i32 19) ; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr @stackbuf, i32 19)
; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8 ; CHECK-NEXT: store ptr [[BUF_HWASAN]], ptr @stackbuf, align 8
; CHECK-NEXT: call void @may_jump() ; CHECK-NEXT: call void @may_jump()
; CHECK-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; CHECK: return: ; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[BUF]] to i64 ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[BUF_SHADOW]], i8 [[TMP23]], i64 256, i1 false)
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 256, i1 false)
; CHECK-NEXT: ret i1 [[RETVAL_0]] ; CHECK-NEXT: ret i1 [[RETVAL_0]]
; ;
entry: entry:
%buf = alloca [4096 x i8], align 1 %buf = alloca [4096 x i8], align 1
%call = call i32 @setjmp(ptr noundef @jbuf) %call = call i32 @setjmp(ptr noundef @jbuf)
switch i32 %call, label %while.body [ switch i32 %call, label %while.body [
i32 1, label %return i32 1, label %return
i32 2, label %sw.bb1 i32 2, label %sw.bb1
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llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll

Show All 27 Lines
; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: br label [[TMP11:%.*]] ; X86-SCOPE-NEXT: br label [[TMP11:%.*]]
; X86-SCOPE: 11: ; X86-SCOPE: 11:
; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
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; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]] ; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]]
; X86-NOSCOPE: 12: ; X86-NOSCOPE: 12:
; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]] ; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]]
; X86-NOSCOPE: 14: ; X86-NOSCOPE: 14:
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; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]] ; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]]
; AARCH64-SCOPE: 25: ; AARCH64-SCOPE: 25:
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4 ; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]] ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP37:%.*]], label [[TMP25]] ; AARCH64-SCOPE-NEXT: br i1 [[TMP27]], label [[TMP29:%.*]], label [[TMP25]]
; AARCH64-SCOPE: 37: ; AARCH64-SCOPE: 29:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0 ; AARCH64-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime( ; AARCH64-NOSCOPE-LABEL: @standard_lifetime(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
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; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: br label [[TMP26:%.*]]
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-NOSCOPE: 26:
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP27]], label [[TMP28:%.*]], label [[TMP26]]
; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]] ; AARCH64-NOSCOPE: 28:
; AARCH64-NOSCOPE: 30:
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP29]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0 ; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime( ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime(
; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
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; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]] ; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]]
; AARCH64-SHORT-SCOPE: 25: ; AARCH64-SHORT-SCOPE: 25:
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP27]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]] ; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP28]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP31]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP32]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP39:%.*]], label [[TMP25]] ; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP31:%.*]], label [[TMP25]]
; AARCH64-SHORT-SCOPE: 39: ; AARCH64-SHORT-SCOPE: 31:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime( ; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime(
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
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; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP28:%.*]]
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1 ; AARCH64-SHORT-NOSCOPE: 28:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP32:%.*]] ; AARCH64-SHORT-NOSCOPE: 30:
; AARCH64-SHORT-NOSCOPE: 32:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
; AARCH64-SHORT-NOSCOPE: 34:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP31]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
br label %2 br label %2
2: ; preds = %2, %0 2: ; preds = %2, %0
; We should tag the memory after the br (in the loop). ; We should tag the memory after the br (in the loop).
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
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; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: br label [[TMP11:%.*]] ; X86-SCOPE-NEXT: br label [[TMP11:%.*]]
; X86-SCOPE: 11: ; X86-SCOPE: 11:
; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP6]] to i8
; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; X86-SCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
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; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]] ; X86-NOSCOPE-NEXT: br label [[TMP12:%.*]]
; X86-NOSCOPE: 12: ; X86-NOSCOPE: 12:
; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP13:%.*]] = tail call i1 (...) @cond()
; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]] ; X86-NOSCOPE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP12]]
; X86-NOSCOPE: 14: ; X86-NOSCOPE: 14:
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; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]] ; AARCH64-SCOPE-NEXT: br label [[TMP25:%.*]]
; AARCH64-SCOPE: 25: ; AARCH64-SCOPE: 25:
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4 ; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]] ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: br i1 [[TMP31]], label [[TMP37:%.*]], label [[TMP25]] ; AARCH64-SCOPE-NEXT: br i1 [[TMP27]], label [[TMP29:%.*]], label [[TMP25]]
; AARCH64-SCOPE: 37: ; AARCH64-SCOPE: 29:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: ret i32 0 ; AARCH64-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-NOSCOPE-LABEL: @standard_lifetime_optnone( ; AARCH64-NOSCOPE-LABEL: @standard_lifetime_optnone(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
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; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: br label [[TMP26:%.*]]
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-NOSCOPE: 26:
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false) ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP27]], label [[TMP28:%.*]], label [[TMP26]]
; AARCH64-NOSCOPE-NEXT: br label [[TMP30:%.*]] ; AARCH64-NOSCOPE: 28:
; AARCH64-NOSCOPE: 30:
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP31]], label [[TMP32:%.*]], label [[TMP30]]
; AARCH64-NOSCOPE: 32:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP29]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = and i64 [[TMP34]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = lshr i64 [[TMP35]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP36]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP37]], i8 [[TMP33]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0 ; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone( ; AARCH64-SHORT-SCOPE-LABEL: @standard_lifetime_optnone(
; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]] ; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP25:%.*]]
; AARCH64-SHORT-SCOPE: 25: ; AARCH64-SHORT-SCOPE: 25:
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP27]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP29]] ; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP28]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP30]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP31]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP26]], ptr [[TMP32]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP33]], label [[TMP39:%.*]], label [[TMP25]] ; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP29]], label [[TMP31:%.*]], label [[TMP25]]
; AARCH64-SHORT-SCOPE: 39: ; AARCH64-SHORT-SCOPE: 31:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime_optnone( ; AARCH64-SHORT-NOSCOPE-LABEL: @standard_lifetime_optnone(
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
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; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP28:%.*]]
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1 ; AARCH64-SHORT-NOSCOPE: 28:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP29]], label [[TMP30:%.*]], label [[TMP28]]
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP32:%.*]] ; AARCH64-SHORT-NOSCOPE: 30:
; AARCH64-SHORT-NOSCOPE: 32:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP32]]
; AARCH64-SHORT-NOSCOPE: 34:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP31]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
br label %2 br label %2
2: ; preds = %2, %0 2: ; preds = %2, %0
; We should tag the memory after the br (in the loop). ; We should tag the memory after the br (in the loop).
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
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; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; X86-SCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
; X86-SCOPE-NEXT: ret i32 0 ; X86-SCOPE-NEXT: ret i32 0
; ;
; X86-NOSCOPE-LABEL: @multiple_lifetimes( ; X86-NOSCOPE-LABEL: @multiple_lifetimes(
; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null) ; X86-NOSCOPE-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP12]], i64 16)
; X86-NOSCOPE-NEXT: ret i32 0 ; X86-NOSCOPE-NEXT: ret i32 0
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; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = and i64 [[TMP31]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0 ; AARCH64-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes( ; AARCH64-NOSCOPE-LABEL: @multiple_lifetimes(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP26]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = and i64 [[TMP31]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP33]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0 ; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes( ; AARCH64-SHORT-SCOPE-LABEL: @multiple_lifetimes(
; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes( ; AARCH64-SHORT-NOSCOPE-LABEL: @multiple_lifetimes(
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
; We erase lifetime markers if we insert instrumentation outside of the ; We erase lifetime markers if we insert instrumentation outside of the
; lifetime. ; lifetime.
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
call void @use(ptr nonnull %1) #2 call void @use(ptr nonnull %1) #2
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1) call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1)
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; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]] ; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
; X86-SCOPE: 13: ; X86-SCOPE: 13:
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
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; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]] ; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
; X86-NOSCOPE: 13: ; X86-NOSCOPE: 13:
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-NOSCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; X86-NOSCOPE-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
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; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP29:%.*]]
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SCOPE: 27:
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
; AARCH64-SCOPE: 31:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0 ; AARCH64-SCOPE-NEXT: ret i32 0
; AARCH64-SCOPE: 37: ; AARCH64-SCOPE: 29:
; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
; AARCH64-SCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: ret i32 0 ; AARCH64-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-NOSCOPE-LABEL: @unreachable_exit( ; AARCH64-NOSCOPE-LABEL: @unreachable_exit(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
Show All 12 Lines
; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP29:%.*]]
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-NOSCOPE: 27:
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
; AARCH64-NOSCOPE: 31:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0 ; AARCH64-NOSCOPE-NEXT: ret i32 0
; AARCH64-NOSCOPE: 37: ; AARCH64-NOSCOPE: 29:
; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0 ; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit( ; AARCH64-SHORT-SCOPE-LABEL: @unreachable_exit(
; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP31:%.*]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-SCOPE: 29:
; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
; AARCH64-SHORT-SCOPE: 33:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
; AARCH64-SHORT-SCOPE: 39: ; AARCH64-SHORT-SCOPE: 31:
; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit( ; AARCH64-SHORT-NOSCOPE-LABEL: @unreachable_exit(
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP31:%.*]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-NOSCOPE: 29:
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
; AARCH64-SHORT-NOSCOPE: 33:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
; AARCH64-SHORT-NOSCOPE: 39: ; AARCH64-SHORT-NOSCOPE: 31:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
%2 = tail call i1 (...) @cond() #2 %2 = tail call i1 (...) @cond() #2
br i1 %2, label %3, label %4 br i1 %2, label %3, label %4
3: 3:
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; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-SCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-SCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-SCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-SCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-SCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-SCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-SCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-SCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-SCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-SCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]]) ; X86-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP4]])
; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-SCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-SCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() ; X86-SCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]] ; X86-SCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP15:%.*]]
; X86-SCOPE: 13: ; X86-SCOPE: 13:
; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
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; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0) ; X86-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64 ; X86-NOSCOPE-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57 ; X86-NOSCOPE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 57
; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63 ; X86-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP3]], 63
; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16 ; X86-NOSCOPE-NEXT: [[TMP4:%.*]] = alloca { i8, [15 x i8] }, align 16
; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag() ; X86-NOSCOPE-NEXT: [[TMP5:%.*]] = call i8 @__hwasan_generate_tag()
; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64 ; X86-NOSCOPE-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i64
; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64 ; X86-NOSCOPE-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP4]] to i64
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], -9079256848778919937 ; X86-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP7]], -9079256848778919937
; X86-NOSCOPE-NEXT: [[TMP8:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; X86-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = inttoptr i64 [[TMP8]] to ptr
; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57 ; X86-NOSCOPE-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 57
; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]] ; X86-NOSCOPE-NEXT: [[TMP10:%.*]] = or i64 [[TMP7]], [[TMP9]]
; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr ; X86-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8 ; X86-NOSCOPE-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16) ; X86-NOSCOPE-NEXT: call void @__hwasan_tag_memory(ptr [[TMP4]], i8 [[TMP11]], i64 16)
; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond() ; X86-NOSCOPE-NEXT: [[TMP12:%.*]] = tail call i1 (...) @cond()
; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP14:%.*]] ; X86-NOSCOPE-NEXT: br i1 [[TMP12]], label [[TMP13:%.*]], label [[TMP14:%.*]]
; X86-NOSCOPE: 13: ; X86-NOSCOPE: 13:
; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; X86-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; X86-NOSCOPE-NEXT: br label [[TMP15:%.*]] ; X86-NOSCOPE-NEXT: br label [[TMP15:%.*]]
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; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP29:%.*]]
; AARCH64-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SCOPE: 27:
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-SCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP37:%.*]]
; AARCH64-SCOPE: 31:
; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP28:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP28]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP34:%.*]] = and i64 [[TMP33]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; AARCH64-SCOPE-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: br label [[TMP43:%.*]] ; AARCH64-SCOPE-NEXT: br label [[TMP31:%.*]]
; AARCH64-SCOPE: 37: ; AARCH64-SCOPE: 29:
; AARCH64-SCOPE-NEXT: [[TMP38:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SCOPE-NEXT: [[TMP39:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: [[TMP40:%.*]] = and i64 [[TMP39]], 72057594037927935
; AARCH64-SCOPE-NEXT: [[TMP41:%.*]] = lshr i64 [[TMP40]], 4
; AARCH64-SCOPE-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP41]]
; AARCH64-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP42]], i8 [[TMP38]], i64 1, i1 false)
; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SCOPE-NEXT: br label [[TMP43]] ; AARCH64-SCOPE-NEXT: br label [[TMP31]]
; AARCH64-SCOPE: 43: ; AARCH64-SCOPE: 31:
; AARCH64-SCOPE-NEXT: ret i32 0 ; AARCH64-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-NOSCOPE-LABEL: @diamond_lifetime( ; AARCH64-NOSCOPE-LABEL: @diamond_lifetime(
; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-NOSCOPE-NEXT: [[TMP26:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-NOSCOPE-NEXT: br i1 [[TMP26]], label [[TMP27:%.*]], label [[TMP28:%.*]]
; AARCH64-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-NOSCOPE: 27:
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = tail call i1 (...) @cond()
; AARCH64-NOSCOPE-NEXT: br i1 [[TMP30]], label [[TMP31:%.*]], label [[TMP32:%.*]]
; AARCH64-NOSCOPE: 31:
; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-NOSCOPE-NEXT: br label [[TMP33:%.*]] ; AARCH64-NOSCOPE-NEXT: br label [[TMP29:%.*]]
; AARCH64-NOSCOPE: 32: ; AARCH64-NOSCOPE: 28:
; AARCH64-NOSCOPE-NEXT: br label [[TMP33]] ; AARCH64-NOSCOPE-NEXT: br label [[TMP29]]
; AARCH64-NOSCOPE: 33: ; AARCH64-NOSCOPE: 29:
; AARCH64-NOSCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-NOSCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-NOSCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; AARCH64-NOSCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-NOSCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
; AARCH64-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; AARCH64-NOSCOPE-NEXT: ret i32 0 ; AARCH64-NOSCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime( ; AARCH64-SHORT-SCOPE-LABEL: @diamond_lifetime(
; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-SCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-SCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-SCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-SCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-SCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1 ; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP31:%.*]]
; AARCH64-SHORT-SCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-SCOPE: 29:
; AARCH64-SHORT-SCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-SCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP39:%.*]]
; AARCH64-SHORT-SCOPE: 33:
; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-SCOPE-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP30:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP30]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP37]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP45:%.*]] ; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP33:%.*]]
; AARCH64-SHORT-SCOPE: 39: ; AARCH64-SHORT-SCOPE: 31:
; AARCH64-SHORT-SCOPE-NEXT: [[TMP40:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-SCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-SCOPE-NEXT: [[TMP41:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: [[TMP42:%.*]] = and i64 [[TMP41]], 72057594037927935
; AARCH64-SHORT-SCOPE-NEXT: [[TMP43:%.*]] = lshr i64 [[TMP42]], 4
; AARCH64-SHORT-SCOPE-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP43]]
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP44]], i8 [[TMP40]], i64 1, i1 false)
; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]]) ; AARCH64-SHORT-SCOPE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[TMP18]])
; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP45]] ; AARCH64-SHORT-SCOPE-NEXT: br label [[TMP33]]
; AARCH64-SHORT-SCOPE: 45: ; AARCH64-SHORT-SCOPE: 33:
; AARCH64-SHORT-SCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-SCOPE-NEXT: ret i32 0
; ;
; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime( ; AARCH64-SHORT-NOSCOPE-LABEL: @diamond_lifetime(
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP1:%.*]] = call ptr @llvm.thread.pointer()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]]) ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1]])
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; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP18:%.*]] = alloca { i8, [15 x i8] }, align 16
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag() ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP19:%.*]] = call i8 @__hwasan_generate_tag()
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP20:%.*]] = zext i8 [[TMP19]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[TMP18]] to i64
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_NOTAG:%.*]] = and i64 [[TMP21]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP22:%.*]] = lshr i64 [[ALLOCA_0_NOTAG]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_SHADOW:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP22]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP23:%.*]] = shl i64 [[TMP20]], 56
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP22]], [[TMP23]] ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP24:%.*]] = or i64 [[TMP21]], [[TMP23]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr ; AARCH64-SHORT-NOSCOPE-NEXT: [[ALLOCA_0_HWASAN:%.*]] = inttoptr i64 [[TMP24]] to ptr
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP25:%.*]] = trunc i64 [[TMP20]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[ALLOCA_0_SHADOW]], i32 0
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935 ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP26]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP28]] ; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP27]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP29]], i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP28:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 1, ptr [[TMP30]], align 1 ; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP28]], label [[TMP29:%.*]], label [[TMP30:%.*]]
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP18]], i32 15 ; AARCH64-SHORT-NOSCOPE: 29:
; AARCH64-SHORT-NOSCOPE-NEXT: store i8 [[TMP25]], ptr [[TMP31]], align 1
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = tail call i1 (...) @cond()
; AARCH64-SHORT-NOSCOPE-NEXT: br i1 [[TMP32]], label [[TMP33:%.*]], label [[TMP34:%.*]]
; AARCH64-SHORT-NOSCOPE: 33:
; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]]) ; AARCH64-SHORT-NOSCOPE-NEXT: call void @use(ptr nonnull [[ALLOCA_0_HWASAN]])
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP35:%.*]] ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP31:%.*]]
; AARCH64-SHORT-NOSCOPE: 34: ; AARCH64-SHORT-NOSCOPE: 30:
; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP35]] ; AARCH64-SHORT-NOSCOPE-NEXT: br label [[TMP31]]
; AARCH64-SHORT-NOSCOPE: 35: ; AARCH64-SHORT-NOSCOPE: 31:
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8 ; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP32:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[TMP18]] to i64 ; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[ALLOCA_0_SHADOW]], i8 [[TMP32]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
; AARCH64-SHORT-NOSCOPE-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP39]]
; AARCH64-SHORT-NOSCOPE-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0 ; AARCH64-SHORT-NOSCOPE-NEXT: ret i32 0
; ;
%1 = alloca i8, align 1 %1 = alloca i8, align 1
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1)
%2 = tail call i1 (...) @cond() #2 %2 = tail call i1 (...) @cond() #2
br i1 %2, label %3, label %4 br i1 %2, label %3, label %4
3: 3:
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