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Differential D139102

[AArch64] Inline AArch64TargetParser.def
ClosedPublic

Authored by tmatheson on Dec 1 2022, 4:53 AM.

Details

Reviewers
lenary
pratlucas
dmgreen
tschuett
DavidSpickett
Summary

Inline calls for the following macros and delete AArch64TargetParser.def:
AARCH64_ARCH, AARCH64_CPU_NAME, AARCH64_CPU_ALIAS, AARCH64_ARCH_EXT_NAME

Diff Detail

Event Timeline

tmatheson created this revision.Dec 1 2022, 4:53 AM
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tmatheson requested review of this revision.Dec 1 2022, 4:53 AM
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Harbormaster completed remote builds in B200492: Diff 479250.Dec 1 2022, 5:36 AM
DavidSpickett added a subscriber: andrewrk.Dec 1 2022, 5:41 AM

A momentous occasion :) Surprised we don't have more uses of this but that's probably because you've been fixing them too.

Please update the comment in lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s as well.

I will throw a bit of a wrench in here though.

@andrewrk I seem to remember that Zig uses these files for generating compiler options of its own? A basic search didn't show anything but we'd better check if you're using them still.

DavidSpickett added a comment.Dec 1 2022, 5:56 AM

Found it. This was the llvm dev thread: https://lists.llvm.org/pipermail/llvm-dev/2020-January/138548.html

And this is the file that was being generated: https://github.com/ziglang/zig/blob/c86589a738e5053a26b2be7d156bcfee1565f00b/lib/std/target/aarch64.zig

I don't see the scripting (if any) that made it though.

tmatheson updated this revision to Diff 479598.Dec 2 2022, 4:35 AM

Update lldb test

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tmatheson added a comment.Dec 2 2022, 4:39 AM

And this is the file that was being generated: https://github.com/ziglang/zig/blob/c86589a738e5053a26b2be7d156bcfee1565f00b/lib/std/target/aarch64.zig

Thanks for the heads up. It looks like that file hasn't been updated for a couple of years, and doesn't include any recent features, so unless we hear otherwise from @andrewrk I think we can go ahead. If some script _is_ manually parsing the .def, it ought to be easy enough to update it to read the .cpp instead (it probably shouldn't do either).

Please update the comment in lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s as well.

I have reordered the list to be alphabetical and updated the comment, added tests for recent features that were missed (CSSC, D128, RCPC3, THE, and a few others) and used CHECK-NEXT.

Herald added a subscriber: JDevlieghere. · View Herald TranscriptDec 2 2022, 4:39 AM
tschuett mentioned this in D139182: AArch64: add CodeGen support for FEAT_XS DSB instructions.Dec 2 2022, 4:43 AM
Harbormaster completed remote builds in B200755: Diff 479598.Dec 2 2022, 6:53 AM
DavidSpickett accepted this revision.Dec 5 2022, 1:30 AM

If some script _is_ manually parsing the .def, it ought to be easy enough to update it to read the .cpp instead (it probably shouldn't do either).

True. Hopefully the target parser library approach will give us a nice way to query all this stuff without manual conversion.

This LGTM with the small test change done.

lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s
28 ↗(On Diff #479598)

This one always trips me up because the offset changes when I update the test.

Can you move lbl to the start, or just use fn as the label, if that works?

This revision is now accepted and ready to land.Dec 5 2022, 1:30 AM
DavidSpickett added a comment.Dec 5 2022, 1:31 AM

And thanks for bringing the test up to date in general!

(that test is less checking the disassembler, more a reference of what lldb should be capable of, though it has found some bugs)

Matt added a subscriber: Matt.Dec 5 2022, 12:01 PM
andrewrk added a comment.Dec 5 2022, 9:06 PM
In D139102#3963388, @DavidSpickett wrote:

@andrewrk I seem to remember that Zig uses these files for generating compiler options of its own? A basic search didn't show anything but we'd better check if you're using them still.

Thanks for thinking of me.

Zig uses the .td files directly, with this script: https://github.com/ziglang/zig/blob/0.10.0/tools/update_cpu_features.zig

So, in this case, unless you're changing the data layout of AArch64.td, our script will be unaffected. Even if you did change it though, it would be OK - I have no expectation for this data to be stable, and this script is run offline only when upgrading to a new LLVM version. So I fully expect to have to rewrite this script in the future.

tmatheson mentioned this in D138792: [AArch64] Improve TargetParser API.Jan 13 2023, 6:25 AM
tmatheson mentioned this in rGf4225d325c19: [AArch64] Reland "Improve TargetParser API".Jan 14 2023, 6:44 AM
tmatheson closed this revision.Jan 14 2023, 6:45 AM

Landed as part of f4225d325c19ae0e5dbe39faa900d81e24559da0

Revision Contents

PathSize
llvm/
include/
llvm/
Support/
242 lines
lib/
Support/
42 lines

Diff 479250

llvm/include/llvm/Support/AArch64TargetParser.h

Show First 20 Lines • Show All 90 Lines • ▼ Show 20 Linesstruct ExtensionInfo {
StringRef Name; // Human readable name, e.g. "profile". StringRef Name; // Human readable name, e.g. "profile".
ArchExtKind ID; // Corresponding to the ArchExtKind, this extensions ArchExtKind ID; // Corresponding to the ArchExtKind, this extensions
// representation in the bitfield. // representation in the bitfield.
StringRef Feature; // -mattr enable string, e.g. "+spe" StringRef Feature; // -mattr enable string, e.g. "+spe"
StringRef NegFeature; // -mattr disable string, e.g. "-spe" StringRef NegFeature; // -mattr disable string, e.g. "-spe"
}; };
inline constexpr ExtensionInfo Extensions[] = { inline constexpr ExtensionInfo Extensions[] = {
#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ {"aes", AArch64::AEK_AES, "+aes", "-aes"},
{NAME, ID, FEATURE, NEGFEATURE}, {"b16b16", AArch64::AEK_B16B16, "+b16b16", "-b16b16"},
#include "AArch64TargetParser.def" {"bf16", AArch64::AEK_BF16, "+bf16", "-bf16"},
{"brbe", AArch64::AEK_BRBE, "+brbe", "-brbe"},
{"crc", AArch64::AEK_CRC, "+crc", "-crc"},
{"crypto", AArch64::AEK_CRYPTO, "+crypto", "-crypto"},
{"cssc", AArch64::AEK_CSSC, "+cssc", "-cssc"},
{"d128", AArch64::AEK_D128, "+d128", "-d128"},
{"dotprod", AArch64::AEK_DOTPROD, "+dotprod", "-dotprod"},
{"f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32mm"},
{"f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm"},
{"flagm", AArch64::AEK_FLAGM, "+flagm", "-flagm"},
{"fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8"},
{"fp16", AArch64::AEK_FP16, "+fullfp16", "-fullfp16"},
{"fp16fml", AArch64::AEK_FP16FML, "+fp16fml", "-fp16fml"},
{"hbc", AArch64::AEK_HBC, "+hbc", "-hbc"},
{"i8mm", AArch64::AEK_I8MM, "+i8mm", "-i8mm"},
{"ls64", AArch64::AEK_LS64, "+ls64", "-ls64"},
{"lse", AArch64::AEK_LSE, "+lse", "-lse"},
{"lse128", AArch64::AEK_LSE128, "+lse128", "-lse128"},
{"memtag", AArch64::AEK_MTE, "+mte", "-mte"},
{"mops", AArch64::AEK_MOPS, "+mops", "-mops"},
{"pauth", AArch64::AEK_PAUTH, "+pauth", "-pauth"},
{"pmuv3", AArch64::AEK_PERFMON, "+perfmon", "-perfmon"},
{"predres", AArch64::AEK_PREDRES, "+predres", "-predres"},
{"profile", AArch64::AEK_PROFILE, "+spe", "-spe"},
{"ras", AArch64::AEK_RAS, "+ras", "-ras"},
{"rcpc", AArch64::AEK_RCPC, "+rcpc", "-rcpc"},
{"rcpc3", AArch64::AEK_RCPC3, "+rcpc3", "-rcpc3"},
{"rdm", AArch64::AEK_RDM, "+rdm", "-rdm"},
{"rng", AArch64::AEK_RAND, "+rand", "-rand"},
{"sb", AArch64::AEK_SB, "+sb", "-sb"},
{"sha2", AArch64::AEK_SHA2, "+sha2", "-sha2"},
{"sha3", AArch64::AEK_SHA3, "+sha3", "-sha3"},
{"simd", AArch64::AEK_SIMD, "+neon", "-neon"},
{"sm4", AArch64::AEK_SM4, "+sm4", "-sm4"},
{"sme-f16f16", AArch64::AEK_SMEF16F16, "+sme-f16f16", "-sme-f16f16"},
{"sme-f64f64", AArch64::AEK_SMEF64F64, "+sme-f64f64", "-sme-f64f64"},
{"sme-i16i64", AArch64::AEK_SMEI16I64, "+sme-i16i64", "-sme-i16i64"},
{"sme", AArch64::AEK_SME, "+sme", "-sme"},
{"sme2", AArch64::AEK_SME2, "+sme2", "-sme2"},
{"sme2p1", AArch64::AEK_SME2p1, "+sme2p1", "-sme2p1"},
{"ssbs", AArch64::AEK_SSBS, "+ssbs", "-ssbs"},
{"sve", AArch64::AEK_SVE, "+sve", "-sve"},
{"sve2-aes", AArch64::AEK_SVE2AES, "+sve2-aes", "-sve2-aes"},
{"sve2-bitperm", AArch64::AEK_SVE2BITPERM, "+sve2-bitperm",
"-sve2-bitperm"},
{"sve2-sha3", AArch64::AEK_SVE2SHA3, "+sve2-sha3", "-sve2-sha3"},
{"sve2-sm4", AArch64::AEK_SVE2SM4, "+sve2-sm4", "-sve2-sm4"},
{"sve2", AArch64::AEK_SVE2, "+sve2", "-sve2"},
{"sve2p1", AArch64::AEK_SVE2p1, "+sve2p1", "-sve2p1"},
{"the", AArch64::AEK_THE, "+the", "-the"},
{"tme", AArch64::AEK_TME, "+tme", "-tme"},
// Special cases
{"none", AArch64::AEK_NONE, {}, {}},
{"invalid", AArch64::AEK_INVALID, {}, {}},
}; };
enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' }; enum ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' };
// Information about a specific architecture, e.g. V8.1-A // Information about a specific architecture, e.g. V8.1-A
struct ArchInfo { struct ArchInfo {
VersionTuple Version; // Architecture version, major + minor. VersionTuple Version; // Architecture version, major + minor.
ArchProfile Profile; // Architecuture profile ArchProfile Profile; // Architecuture profile
Show All 36 Linesstruct ArchInfo {
// Return ArchFeature without the leading "+". // Return ArchFeature without the leading "+".
constexpr StringRef getSubArch() const { return ArchFeature.substr(1); } constexpr StringRef getSubArch() const { return ArchFeature.substr(1); }
// Search for ArchInfo by SubArch name // Search for ArchInfo by SubArch name
static const ArchInfo &findBySubArch(StringRef SubArch); static const ArchInfo &findBySubArch(StringRef SubArch);
}; };
// Create ArchInfo structs named <ID> // clang-format off
#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE, \ inline constexpr ArchInfo INVALID = { VersionTuple{0, 0}, AProfile, "invalid", "+", (AArch64::AEK_NONE)};
ARCH_BASE_EXT) \ inline constexpr ArchInfo ARMV8A = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD), };
inline constexpr ArchInfo ID = {VersionTuple{MAJOR, MINOR}, PROFILE, NAME, \ inline constexpr ArchInfo ARMV8_1A = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::AEK_CRC | AArch64::AEK_LSE | AArch64::AEK_RDM)};
ARCH_FEATURE, ARCH_BASE_EXT}; inline constexpr ArchInfo ARMV8_2A = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | AArch64::AEK_RAS)};
#include "AArch64TargetParser.def" inline constexpr ArchInfo ARMV8_3A = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | AArch64::AEK_RCPC)};
#undef AARCH64_ARCH inline constexpr ArchInfo ARMV8_4A = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | AArch64::AEK_DOTPROD)};
inline constexpr ArchInfo ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)};
constexpr unsigned BaseNoCrypto = ARMV8_5A.DefaultExts ^ AArch64::AEK_CRYPTO; // 8.6 onwards has no AEK_CRYPTO
inline constexpr ArchInfo ARMV8_6A = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (BaseNoCrypto | AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM)};
inline constexpr ArchInfo ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)};
inline constexpr ArchInfo ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts)};
inline constexpr ArchInfo ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts)};
inline constexpr ArchInfo ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (BaseNoCrypto | AArch64::AEK_SVE2)};
inline constexpr ArchInfo ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)};
inline constexpr ArchInfo ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)};
inline constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts)};
inline constexpr ArchInfo ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts)};
// For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions.
inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", ((BaseNoCrypto ^ AArch64::AEK_LSE) | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SB), };
// clang-format on
// The set of all architectures // The set of all architectures
inline constexpr std::array<const ArchInfo *, 17> ArchInfos = { static constexpr std::array<const ArchInfo *, 17> ArchInfos = {
#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE, \ &INVALID, &ARMV8A, &ARMV8_1A, &ARMV8_2A, &ARMV8_3A, &ARMV8_4A,
ARCH_BASE_EXT) \ &ARMV8_5A, &ARMV8_6A, &ARMV8_7A, &ARMV8_8A, &ARMV8_9A, &ARMV9A,
&ID, &ARMV9_1A, &ARMV9_2A, &ARMV9_3A, &ARMV9_4A, &ARMV8R,
#include "AArch64TargetParser.def"
}; };
// Details of a specific CPU. // Details of a specific CPU.
struct CpuInfo { struct CpuInfo {
StringRef Name; // Name, as written for -mcpu. StringRef Name; // Name, as written for -mcpu.
const ArchInfo &Arch; const ArchInfo &Arch;
uint64_t DefaultExtensions; uint64_t DefaultExtensions; // Default extensions for this CPU. These will be
// ORd with the architecture defaults.
}; };
inline constexpr CpuInfo CpuInfos[] = { inline constexpr CpuInfo CpuInfos[] = {
#define AARCH64_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT) \ {"cortex-a34", ARMV8A, (AArch64::AEK_CRC)},
{NAME, ARCH_ID, DEFAULT_EXT}, {"cortex-a35", ARMV8A, (AArch64::AEK_CRC)},
#include "AArch64TargetParser.def" {"cortex-a53", ARMV8A, (AArch64::AEK_CRC)},
{"cortex-a55", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC)},
{"cortex-a510", ARMV9A,
(AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SB |
AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML)},
{"cortex-a57", ARMV8A, (AArch64::AEK_CRC)},
{"cortex-a65", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RCPC |
AArch64::AEK_SSBS)},
{"cortex-a65ae", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RCPC |
AArch64::AEK_SSBS)},
{"cortex-a72", ARMV8A, (AArch64::AEK_CRC)},
{"cortex-a73", ARMV8A, (AArch64::AEK_CRC)},
{"cortex-a75", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC)},
{"cortex-a76", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS)},
{"cortex-a76ae", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS)},
{"cortex-a77", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SSBS)},
{"cortex-a78", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE)},
{"cortex-a78c", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE | AArch64::AEK_FLAGM |
AArch64::AEK_PAUTH | AArch64::AEK_FP16FML)},
{"cortex-a710", ARMV9A,
(AArch64::AEK_MTE | AArch64::AEK_PAUTH | AArch64::AEK_FLAGM |
AArch64::AEK_SB | AArch64::AEK_I8MM | AArch64::AEK_FP16FML |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_BF16)},
{"cortex-a715", ARMV9A,
(AArch64::AEK_SB | AArch64::AEK_SSBS | AArch64::AEK_MTE |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PAUTH |
AArch64::AEK_I8MM | AArch64::AEK_PREDRES | AArch64::AEK_PERFMON |
AArch64::AEK_PROFILE | AArch64::AEK_SVE | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_BF16 | AArch64::AEK_FLAGM)},
{"cortex-r82", ARMV8R, (AArch64::AEK_LSE)},
{"cortex-x1", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE)},
{"cortex-x1c", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PAUTH | AArch64::AEK_PROFILE)},
{"cortex-x2", ARMV9A,
(AArch64::AEK_MTE | AArch64::AEK_BF16 | AArch64::AEK_I8MM |
AArch64::AEK_PAUTH | AArch64::AEK_SSBS | AArch64::AEK_SB |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML)},
{"cortex-x3", ARMV9A,
(AArch64::AEK_SVE | AArch64::AEK_PERFMON | AArch64::AEK_PROFILE |
AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_MTE |
AArch64::AEK_SVE2BITPERM | AArch64::AEK_SB | AArch64::AEK_PAUTH |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PREDRES |
AArch64::AEK_FLAGM | AArch64::AEK_SSBS)},
{"neoverse-e1", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_RCPC |
AArch64::AEK_SSBS)},
{"neoverse-n1", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_PROFILE |
AArch64::AEK_RCPC | AArch64::AEK_SSBS)},
{"neoverse-n2", ARMV8_5A,
(AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_I8MM | AArch64::AEK_MTE | AArch64::AEK_SB |
AArch64::AEK_SSBS | AArch64::AEK_SVE | AArch64::AEK_SVE2 |
AArch64::AEK_SVE2BITPERM)},
{"neoverse-512tvb", ARMV8_4A,
(AArch64::AEK_SVE | AArch64::AEK_SSBS | AArch64::AEK_FP16 |
AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM)},
{"neoverse-v1", ARMV8_4A,
(AArch64::AEK_SVE | AArch64::AEK_SSBS | AArch64::AEK_FP16 |
AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM)},
{"neoverse-v2", ARMV9A,
(AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SSBS |
AArch64::AEK_FP16 | AArch64::AEK_BF16 | AArch64::AEK_RAND |
AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML | AArch64::AEK_I8MM | AArch64::AEK_MTE)},
{"cyclone", ARMV8A, (AArch64::AEK_NONE)},
{"apple-a7", ARMV8A, (AArch64::AEK_NONE)},
{"apple-a8", ARMV8A, (AArch64::AEK_NONE)},
{"apple-a9", ARMV8A, (AArch64::AEK_NONE)},
{"apple-a10", ARMV8A, (AArch64::AEK_CRC | AArch64::AEK_RDM)},
{"apple-a11", ARMV8_2A, (AArch64::AEK_FP16)},
{"apple-a12", ARMV8_3A, (AArch64::AEK_FP16)},
{"apple-a13", ARMV8_4A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3)},
{"apple-a14", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3)},
{"apple-a15", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 |
AArch64::AEK_BF16 | AArch64::AEK_I8MM)},
{"apple-a16", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 |
AArch64::AEK_BF16 | AArch64::AEK_I8MM)},
{"apple-m1", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3)},
{"apple-m2", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 |
AArch64::AEK_BF16 | AArch64::AEK_I8MM)},
{"apple-s4", ARMV8_3A, (AArch64::AEK_FP16)},
{"apple-s5", ARMV8_3A, (AArch64::AEK_FP16)},
{"exynos-m3", ARMV8A, (AArch64::AEK_CRC)},
{"exynos-m4", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16)},
{"exynos-m5", ARMV8_2A, (AArch64::AEK_DOTPROD | AArch64::AEK_FP16)},
{"falkor", ARMV8A, (AArch64::AEK_CRC | AArch64::AEK_RDM)},
{"saphira", ARMV8_3A, (AArch64::AEK_PROFILE)},
{"kryo", ARMV8A, (AArch64::AEK_CRC)},
{"thunderx2t99", ARMV8_1A, (AArch64::AEK_NONE)},
{"thunderx3t110", ARMV8_3A, (AArch64::AEK_NONE)},
{"thunderx", ARMV8A, (AArch64::AEK_CRC)},
{"thunderxt88", ARMV8A, (AArch64::AEK_CRC)},
{"thunderxt81", ARMV8A, (AArch64::AEK_CRC)},
{"thunderxt83", ARMV8A, (AArch64::AEK_CRC)},
{"tsv110", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 | AArch64::AEK_FP16FML |
AArch64::AEK_PROFILE)},
{"a64fx", ARMV8_2A, (AArch64::AEK_FP16 | AArch64::AEK_SVE)},
{"carmel", ARMV8_2A, (AArch64::AEK_FP16)},
{"ampere1", ARMV8_6A,
(AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS)},
// Invalid CPU
{"invalid", INVALID, (AArch64::AEK_INVALID)},
}; };
// An alias for a CPU. // An alias for a CPU.
struct CpuAlias { struct CpuAlias {
StringRef Alias; StringRef Alias;
StringRef Name; StringRef Name;
}; };
inline constexpr CpuAlias CpuAliases[] = { inline constexpr CpuAlias CpuAliases[] = {{"grace", "neoverse-v2"}};
#define AARCH64_CPU_ALIAS(ALIAS, NAME) {ALIAS, NAME},
#include "AArch64TargetParser.def"
};
bool getExtensionFeatures(uint64_t Extensions, bool getExtensionFeatures(uint64_t Extensions,
std::vector<StringRef> &Features); std::vector<StringRef> &Features);
StringRef getArchExtFeature(StringRef ArchExt); StringRef getArchExtFeature(StringRef ArchExt);
StringRef resolveCPUAlias(StringRef CPU); StringRef resolveCPUAlias(StringRef CPU);
// Information by Name // Information by Name
Show All 17 Lines

llvm/include/llvm/Support/AArch64TargetParser.def

  • This file was deleted.
//===- AARCH64TargetParser.def - AARCH64 target parsing defines ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides defines to build up the AARCH64 target parser's logic.
//
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
#ifndef AARCH64_ARCH
#define AARCH64_ARCH(MAJOR, MINOR, PROFILE, NAME, ID, ARCH_FEATURE, ARCH_BASE_EXT)
#endif
// NOTE: The order and the grouping of the elements matter to make ArchKind iterable.
// List is organised as armv8a -> armv8n-a, armv9a -> armv9m-a and armv8-r.
AARCH64_ARCH(0, 0, InvalidProfile, "invalid", INVALID, "+",
AArch64::AEK_NONE)
AARCH64_ARCH(8, 0, AProfile, "armv8-a", ARMV8A, "+v8a",
(AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD))
AARCH64_ARCH(8, 1, AProfile, "armv8.1-a", ARMV8_1A, "+v8.1a",
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_LSE | AArch64::AEK_RDM))
AARCH64_ARCH(8, 2, AProfile, "armv8.2-a", ARMV8_2A, "+v8.2a",
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM))
AARCH64_ARCH(8, 3, AProfile, "armv8.3-a", ARMV8_3A, "+v8.3a",
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC))
AARCH64_ARCH(8, 4, AProfile, "armv8.4-a", ARMV8_4A, "+v8.4a",
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD))
AARCH64_ARCH(8, 5, AProfile, "armv8.5-a", ARMV8_5A, "+v8.5a",
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD))
AARCH64_ARCH(8, 6, AProfile, "armv8.6-a", ARMV8_6A, "+v8.6a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH(8, 7, AProfile, "armv8.7-a", ARMV8_7A, "+v8.7a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH(8, 8, AProfile, "armv8.8-a", ARMV8_8A, "+v8.8a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH(8, 9, AProfile, "armv8.9-a", ARMV8_9A, "+v8.9a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH(9, 0, AProfile, "armv9-a", ARMV9A, "+v9a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SVE2))
AARCH64_ARCH(9, 1, AProfile, "armv9.1-a", ARMV9_1A, "+v9.1a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
AARCH64_ARCH(9, 2, AProfile, "armv9.2-a", ARMV9_2A, "+v9.2a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
AARCH64_ARCH(9, 3, AProfile, "armv9.3-a", ARMV9_3A, "+v9.3a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
AARCH64_ARCH(9, 4, AProfile, "armv9.4-a", ARMV9_4A, "+v9.4a",
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2))
// For v8-R, we do not enable crypto and align with GCC that enables a more
// minimal set of optional architecture extensions.
AARCH64_ARCH(8, 0, RProfile, "armv8-r", ARMV8R, "+v8r",
(AArch64::AEK_CRC | AArch64::AEK_RDM | AArch64::AEK_SSBS |
AArch64::AEK_DOTPROD | AArch64::AEK_FP | AArch64::AEK_SIMD |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_RAS |
AArch64::AEK_RCPC | AArch64::AEK_SB))
#undef AARCH64_ARCH
#ifndef AARCH64_ARCH_EXT_NAME
#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)
#endif
AARCH64_ARCH_EXT_NAME("invalid", AArch64::AEK_INVALID, {}, {})
AARCH64_ARCH_EXT_NAME("none", AArch64::AEK_NONE, {}, {})
AARCH64_ARCH_EXT_NAME("crc", AArch64::AEK_CRC, "+crc", "-crc")
AARCH64_ARCH_EXT_NAME("lse", AArch64::AEK_LSE, "+lse", "-lse")
AARCH64_ARCH_EXT_NAME("rdm", AArch64::AEK_RDM, "+rdm", "-rdm")
AARCH64_ARCH_EXT_NAME("crypto", AArch64::AEK_CRYPTO, "+crypto", "-crypto")
AARCH64_ARCH_EXT_NAME("sm4", AArch64::AEK_SM4, "+sm4", "-sm4")
AARCH64_ARCH_EXT_NAME("sha3", AArch64::AEK_SHA3, "+sha3", "-sha3")
AARCH64_ARCH_EXT_NAME("sha2", AArch64::AEK_SHA2, "+sha2", "-sha2")
AARCH64_ARCH_EXT_NAME("aes", AArch64::AEK_AES, "+aes", "-aes")
AARCH64_ARCH_EXT_NAME("dotprod", AArch64::AEK_DOTPROD, "+dotprod", "-dotprod")
AARCH64_ARCH_EXT_NAME("fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8")
AARCH64_ARCH_EXT_NAME("simd", AArch64::AEK_SIMD, "+neon", "-neon")
AARCH64_ARCH_EXT_NAME("fp16", AArch64::AEK_FP16, "+fullfp16", "-fullfp16")
AARCH64_ARCH_EXT_NAME("fp16fml", AArch64::AEK_FP16FML, "+fp16fml", "-fp16fml")
AARCH64_ARCH_EXT_NAME("profile", AArch64::AEK_PROFILE, "+spe", "-spe")
AARCH64_ARCH_EXT_NAME("ras", AArch64::AEK_RAS, "+ras", "-ras")
AARCH64_ARCH_EXT_NAME("sve", AArch64::AEK_SVE, "+sve", "-sve")
AARCH64_ARCH_EXT_NAME("sve2", AArch64::AEK_SVE2, "+sve2", "-sve2")
AARCH64_ARCH_EXT_NAME("sve2-aes", AArch64::AEK_SVE2AES, "+sve2-aes", "-sve2-aes")
AARCH64_ARCH_EXT_NAME("sve2-sm4", AArch64::AEK_SVE2SM4, "+sve2-sm4", "-sve2-sm4")
AARCH64_ARCH_EXT_NAME("sve2-sha3", AArch64::AEK_SVE2SHA3, "+sve2-sha3", "-sve2-sha3")
AARCH64_ARCH_EXT_NAME("sve2-bitperm", AArch64::AEK_SVE2BITPERM, "+sve2-bitperm", "-sve2-bitperm")
AARCH64_ARCH_EXT_NAME("sve2p1", AArch64::AEK_SVE2p1, "+sve2p1", "-sve2p1")
AARCH64_ARCH_EXT_NAME("b16b16", AArch64::AEK_B16B16, "+b16b16", "-b16b16")
AARCH64_ARCH_EXT_NAME("rcpc", AArch64::AEK_RCPC, "+rcpc", "-rcpc")
AARCH64_ARCH_EXT_NAME("rng", AArch64::AEK_RAND, "+rand", "-rand")
AARCH64_ARCH_EXT_NAME("memtag", AArch64::AEK_MTE, "+mte", "-mte")
AARCH64_ARCH_EXT_NAME("ssbs", AArch64::AEK_SSBS, "+ssbs", "-ssbs")
AARCH64_ARCH_EXT_NAME("sb", AArch64::AEK_SB, "+sb", "-sb")
AARCH64_ARCH_EXT_NAME("predres", AArch64::AEK_PREDRES, "+predres", "-predres")
AARCH64_ARCH_EXT_NAME("bf16", AArch64::AEK_BF16, "+bf16", "-bf16")
AARCH64_ARCH_EXT_NAME("i8mm", AArch64::AEK_I8MM, "+i8mm", "-i8mm")
AARCH64_ARCH_EXT_NAME("f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32mm")
AARCH64_ARCH_EXT_NAME("f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm")
AARCH64_ARCH_EXT_NAME("tme", AArch64::AEK_TME, "+tme", "-tme")
AARCH64_ARCH_EXT_NAME("ls64", AArch64::AEK_LS64, "+ls64", "-ls64")
AARCH64_ARCH_EXT_NAME("brbe", AArch64::AEK_BRBE, "+brbe", "-brbe")
AARCH64_ARCH_EXT_NAME("pauth", AArch64::AEK_PAUTH, "+pauth", "-pauth")
AARCH64_ARCH_EXT_NAME("flagm", AArch64::AEK_FLAGM, "+flagm", "-flagm")
AARCH64_ARCH_EXT_NAME("sme", AArch64::AEK_SME, "+sme", "-sme")
AARCH64_ARCH_EXT_NAME("sme-f64f64", AArch64::AEK_SMEF64F64, "+sme-f64f64", "-sme-f64f64")
AARCH64_ARCH_EXT_NAME("sme-i16i64", AArch64::AEK_SMEI16I64, "+sme-i16i64", "-sme-i16i64")
AARCH64_ARCH_EXT_NAME("sme-f16f16", AArch64::AEK_SMEF16F16, "+sme-f16f16", "-sme-f16f16")
AARCH64_ARCH_EXT_NAME("sme2", AArch64::AEK_SME2, "+sme2", "-sme2")
AARCH64_ARCH_EXT_NAME("sme2p1", AArch64::AEK_SME2p1, "+sme2p1", "-sme2p1")
AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS, "+mops", "-mops")
AARCH64_ARCH_EXT_NAME("pmuv3", AArch64::AEK_PERFMON, "+perfmon", "-perfmon")
AARCH64_ARCH_EXT_NAME("cssc", AArch64::AEK_CSSC, "+cssc", "-cssc")
AARCH64_ARCH_EXT_NAME("rcpc3", AArch64::AEK_RCPC3, "+rcpc3", "-rcpc3")
AARCH64_ARCH_EXT_NAME("the", AArch64::AEK_THE, "+the", "-the")
AARCH64_ARCH_EXT_NAME("d128", AArch64::AEK_D128, "+d128", "-d128")
AARCH64_ARCH_EXT_NAME("lse128", AArch64::AEK_LSE128, "+lse128", "-lse128")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_EXT)
#endif
AARCH64_CPU_NAME("cortex-a34", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a35", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a53", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a55", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC))
AARCH64_CPU_NAME("cortex-a510", ARMV9A,
(AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SB |
AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("cortex-a57", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a65", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_RCPC | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a65ae", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_RCPC | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a72", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a73", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a75", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC))
AARCH64_CPU_NAME("cortex-a76", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a76ae", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a77", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a78", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("cortex-a78c", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE | AArch64::AEK_FLAGM |
AArch64::AEK_PAUTH | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("cortex-a710", ARMV9A,
(AArch64::AEK_MTE | AArch64::AEK_PAUTH | AArch64::AEK_FLAGM |
AArch64::AEK_SB | AArch64::AEK_I8MM | AArch64::AEK_FP16FML |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_BF16))
AARCH64_CPU_NAME("cortex-a715", ARMV9A,
(AArch64::AEK_SB | AArch64::AEK_SSBS | AArch64::AEK_MTE |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PAUTH |
AArch64::AEK_I8MM | AArch64::AEK_PREDRES | AArch64::AEK_PERFMON |
AArch64::AEK_PROFILE | AArch64::AEK_SVE | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_BF16 | AArch64::AEK_FLAGM))
AARCH64_CPU_NAME("cortex-r82", ARMV8R,
(AArch64::AEK_LSE))
AARCH64_CPU_NAME("cortex-x1", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("cortex-x1c", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PAUTH | AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("cortex-x2", ARMV9A,
(AArch64::AEK_MTE | AArch64::AEK_BF16 | AArch64::AEK_I8MM |
AArch64::AEK_PAUTH | AArch64::AEK_SSBS | AArch64::AEK_SB |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("cortex-x3", ARMV9A,
(AArch64::AEK_SVE | AArch64::AEK_PERFMON | AArch64::AEK_PROFILE |
AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_MTE |
AArch64::AEK_SVE2BITPERM | AArch64::AEK_SB | AArch64::AEK_PAUTH |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_PREDRES |
AArch64::AEK_FLAGM | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("neoverse-e1", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_RCPC | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("neoverse-n1", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_PROFILE | AArch64::AEK_RCPC |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("neoverse-n2", ARMV8_5A,
(AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_I8MM | AArch64::AEK_MTE |
AArch64::AEK_SB | AArch64::AEK_SSBS |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM))
AARCH64_CPU_NAME("neoverse-512tvb", ARMV8_4A,
(AArch64::AEK_SVE | AArch64::AEK_SSBS |
AArch64::AEK_FP16 | AArch64::AEK_BF16 |
AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("neoverse-v1", ARMV8_4A,
(AArch64::AEK_SVE | AArch64::AEK_SSBS |
AArch64::AEK_FP16 | AArch64::AEK_BF16 |
AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("neoverse-v2", ARMV9A,
(AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SSBS |
AArch64::AEK_FP16 | AArch64::AEK_BF16 | AArch64::AEK_RAND |
AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_SVE2BITPERM | AArch64::AEK_FP16FML |
AArch64::AEK_I8MM | AArch64::AEK_MTE))
AARCH64_CPU_NAME("cyclone", ARMV8A,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a7", ARMV8A,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a8", ARMV8A,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a9", ARMV8A,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a10", ARMV8A,
(AArch64::AEK_CRC | AArch64::AEK_RDM))
AARCH64_CPU_NAME("apple-a11", ARMV8_2A,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-a12", ARMV8_3A,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-a13", ARMV8_4A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3))
AARCH64_CPU_NAME("apple-a14", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3))
AARCH64_CPU_NAME("apple-a15", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 |
AArch64::AEK_BF16 | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("apple-a16", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 |
AArch64::AEK_BF16 | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("apple-m1", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3))
AARCH64_CPU_NAME("apple-m2", ARMV8_5A,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3 |
AArch64::AEK_BF16 | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("apple-s4", ARMV8_3A,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-s5", ARMV8_3A,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("exynos-m3", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("exynos-m4", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16))
AARCH64_CPU_NAME("exynos-m5", ARMV8_2A,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16))
AARCH64_CPU_NAME("falkor", ARMV8A,
(AArch64::AEK_CRC | AArch64::AEK_RDM))
AARCH64_CPU_NAME("saphira", ARMV8_3A,
(AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("kryo", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderx2t99", ARMV8_1A,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("thunderx3t110", ARMV8_3A,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("thunderx", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderxt88", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderxt81", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderxt83", ARMV8A,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("tsv110", ARMV8_2A,
(AArch64::AEK_DOTPROD |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML |
AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("a64fx", ARMV8_2A,
(AArch64::AEK_FP16 | AArch64::AEK_SVE))
AARCH64_CPU_NAME("carmel", ARMV8_2A,
AArch64::AEK_FP16)
AARCH64_CPU_NAME("ampere1", ARMV8_6A,
(AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS))
// Invalid CPU
AARCH64_CPU_NAME("invalid", INVALID, AArch64::AEK_INVALID)
#undef AARCH64_CPU_NAME
#ifndef AARCH64_CPU_ALIAS
#define AARCH64_CPU_ALIAS(ALIAS,NAME)
#endif
AARCH64_CPU_ALIAS("grace", "neoverse-v2")
#undef AARCH64_CPU_ALIAS

llvm/lib/Support/AArch64TargetParser.cpp

Show All 24 Linesstatic unsigned checkArchVersion(llvm::StringRef Arch) {
return 0; return 0;
} }
uint64_t AArch64::getDefaultExtensions(StringRef CPU, uint64_t AArch64::getDefaultExtensions(StringRef CPU,
const AArch64::ArchInfo &AI) { const AArch64::ArchInfo &AI) {
if (CPU == "generic") if (CPU == "generic")
return AI.DefaultExts; return AI.DefaultExts;
return StringSwitch<uint64_t>(CPU) // Note: this now takes cpu aliases into account
#define AARCH64_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT) \ const CpuInfo &Cpu = parseCpu(CPU);
.Case(NAME, ARCH_ID.DefaultExts | DEFAULT_EXT) return Cpu.Arch.DefaultExts | Cpu.DefaultExtensions;
#include "../../include/llvm/Support/AArch64TargetParser.def"
.Default(AArch64::AEK_INVALID);
} }
const AArch64::ArchInfo &AArch64::getArchForCpu(StringRef CPU) { const AArch64::ArchInfo &AArch64::getArchForCpu(StringRef CPU) {
if (CPU == "generic") if (CPU == "generic")
return ARMV8A; return ARMV8A;
return *StringSwitch<const AArch64::ArchInfo *>(CPU) // Note: this now takes cpu aliases into account
#define AARCH64_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT) .Case(NAME, &ARCH_ID) const CpuInfo &Cpu = parseCpu(CPU);
#include "../../include/llvm/Support/AArch64TargetParser.def" return Cpu.Arch;
.Default(&INVALID);
} }
const AArch64::ArchInfo &AArch64::ArchInfo::findBySubArch(StringRef SubArch) { const AArch64::ArchInfo &AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
for (const auto *A : AArch64::ArchInfos) for (const auto *A : AArch64::ArchInfos)
if (A->getSubArch() == SubArch) if (A->getSubArch() == SubArch)
return *A; return *A;
return AArch64::INVALID; return AArch64::INVALID;
} }
bool AArch64::getExtensionFeatures(uint64_t Extensions, bool AArch64::getExtensionFeatures(uint64_t InputExts,
std::vector<StringRef> &Features) { std::vector<StringRef> &Features) {
if (Extensions == AArch64::AEK_INVALID) if (InputExts == AArch64::AEK_INVALID)
return false; return false;
#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ for (const auto &E : Extensions)
if (Extensions & ID) { \ /* INVALID and NONE have no feature name. */
const char *feature = FEATURE; \ if ((InputExts & E.ID) && !E.Feature.empty())
/* INVALID and NONE have no feature name. */ \ Features.push_back(E.Feature);
if (feature) \
Features.push_back(feature); \
}
#include "../../include/llvm/Support/AArch64TargetParser.def"
return true; return true;
} }
StringRef AArch64::resolveCPUAlias(StringRef CPU) { StringRef AArch64::resolveCPUAlias(StringRef Name) {
return StringSwitch<StringRef>(CPU) for (const auto &A : CpuAliases)
#define AARCH64_CPU_ALIAS(ALIAS,NAME) \ if (A.Alias == Name)
.Case(ALIAS, NAME) return A.Name;
#include "../../include/llvm/Support/AArch64TargetParser.def" return Name;
.Default(CPU);
} }
StringRef AArch64::getArchExtFeature(StringRef ArchExt) { StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
if (ArchExt.startswith("no")) { if (ArchExt.startswith("no")) {
StringRef ArchExtBase(ArchExt.substr(2)); StringRef ArchExtBase(ArchExt.substr(2));
for (const auto &AE : Extensions) { for (const auto &AE : Extensions) {
if (!AE.NegFeature.empty() && ArchExtBase == AE.Name) if (!AE.NegFeature.empty() && ArchExtBase == AE.Name)
return AE.NegFeature; return AE.NegFeature;
▲ Show 20 Lines • Show All 58 Lines • Show Last 20 Lines
llvm/include/llvm/Support/AArch64TargetParser.h