[AArch64] Lower vector trunc using tbl.

[fhahn]

Summary

Similar to using tbl to lower vector ZExts, tbl4 can be used to lower
vector truncates.

The initial version support i32->i8 conversions.

Depends on D120571

[t.p.northover]

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

13216–13217

Further to our big-endian discussion, I think this bitcast will put the least significant byte into elements 3, 7, 11, 15. So the for loop below should account for that.

13289

Shouldn't this be part of the patch that adds the code above?

13292

Destination type wrong.

[fhahn]

Thanks Tim, I updated the code to account for big-endian targets by adjusting the mask as suggested offline.

[fhahn]

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

13216–13217

Thanks, I adjusted the loop below to use Idx+3 for the mask to account for that on big-endian.

13289

Yes, moved to D133494.

13292

Thanks, should be fixed!

[t.p.northover]

Thanks Florian, think this one looks good now.