[RISCV][NFC] Refactor fadd test to match the code.

[jacquesguan]

Summary

Change fadd test case in D122563 to match the fold base case.

[reames]

LGTM

However, we really should have tests for both forms. Please land, but then add another test with the source operand being used instead. Please add a corresponding test for each intrinsic with a scalar fold start operand.

llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll

256

Use fast here.

[jacquesguan]

Address comment.

llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll

 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vsetivli zero, 1, e32, m1, ta, mu
 ; CHECK-NEXT:    vfmv.s.f v9, fa0
 ; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
 ; CHECK-NEXT:    vfredusum.vs v8, v8, v9
 ; CHECK-NEXT:    vfmv.f.s fa0, v8
 ; CHECK-NEXT:    ret
 entry:
-  %rdx = call fast float @llvm.vector.reduce.fadd.v4f32(float %x, <4 x float> %v)
-  ret float %rdx
+  %rdx = call fast float @llvm.vector.reduce.fadd.v4f32(float 0.0, <4 x float> %v)
+  %res = fadd reassoc nsz float %rdx, %x
+  ret float %res
 }
 
 define float @reduce_fmax(float %x, <4 x float> %v) {
 ; CHECK-LABEL: reduce_fmax:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    vsetivli zero, 1, e32, m1, ta, mu
 ; CHECK-NEXT:    vfmv.s.f v9, fa0
 ; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu