[RISCV] Assemble `call foo` to R_RISCV_CALL_PLT

[MaskRay]

Summary

R_RISCV_CALL/R_RISCV_CALL_PLT distinction isn't necessary. R_RISCV_CALL has been
deprecated as a resolution to
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/98 .

ld.lld and mold treat the two relocation types the same. GNU ld has a custom
handling for undefined weak functions which is unnecessary: calling an
unresolved undefined weak function is UB and GNU ld can handle the case without
a relocation error (such a function call is usually guarded by a zero value
check and should be allowed).

This patch assembles call foo to use R_RISCV_CALL_PLT instead of the
deprecated R_RISCV_CALL.

Note: the code generator still differentiates call foo and (maybe preemptible)
call foo@plt, but the difference is purely aesthetic.

Note: D105429 does not support R_RISCV_CALL_PLT correctly. Changed the test to
force R_RISCV_CALL for now.

[jrtc27]

llvm/test/CodeGen/RISCV/branch-relaxation.ll

38 ↗

(On Diff #455072)

This seems dodgy

[MaskRay]

llvm/test/CodeGen/RISCV/branch-relaxation.ll

38 ↗

(On Diff #455072)

This is fine. Linkers don't care whether the R_RISCV_CALL_PLT target is temporary label/local/non-preemptible.

[MaskRay]

An alternative is to (a) replace assembler to ignore @plt (b) unify riscv-call and riscv-plt. It will touch many more tests, and omitting @plt uses the deprecated R_RISCV_CALL with GNU assembler (not a big issue).

[MaskRay]

Change assembler instead.

We need to change binutils gas as well.

[MaskRay]

Ping

[kito-cheng]

LGTM, thanks, I've talked to Nelson about that, so he might update that on binutils side soon.

lld/test/ELF/riscv-call.s

 # LIMITS:      97 f0 ff 7f     auipc   ra, 524287
 # LIMITS-NEXT: e7 80 f0 7f     jalr    2047(ra)
 # LIMITS-NEXT: 97 00 00 80     auipc   ra, 524288
 # LIMITS-NEXT: e7 80 00 80     jalr    -2048(ra)
 
 # RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o %t
 # RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o /dev/null 2>&1 | \
 # RUN:   FileCheck --check-prefix=ERROR %s
-# ERROR: relocation R_RISCV_CALL out of range: 524288 is not in [-524288, 524287]; references foo
-# ERROR: relocation R_RISCV_CALL out of range: -524289 is not in [-524288, 524287]; references bar
+# ERROR: relocation R_RISCV_CALL_PLT out of range: 524288 is not in [-524288, 524287]; references foo
+# ERROR: relocation R_RISCV_CALL_PLT out of range: -524289 is not in [-524288, 524287]; references bar
 
 .global _start
 _start:
     call    foo
     call    bar

lld/test/ELF/riscv-undefined-weak.s

 # PLT-NEXT:    sd a2, -798(t1)
 relative:
   la a1, target
   sd a2, target+2, t1
 
 ## Branch relocations
 ## If .dynsym does not exist, an undefined weak symbol is non-preemptible.
 ## Treat them as PC relative relocations.
-# RELOC:      0x18 R_RISCV_CALL target 0x0
+# RELOC:      0x18 R_RISCV_CALL_PLT target 0x0
 # RELOC-NEXT: 0x20 R_RISCV_JAL target 0x0
 # RELOC-NEXT: 0x24 R_RISCV_BRANCH target 0x0
 
 # PC-LABEL:    <branch>:
 # PC-NEXT:     auipc ra, 0
 # PC-NEXT:     jalr ra
 # PC-NEXT:     [[#%x,ADDR:]]:
 # PC-SAME:                    j 0x[[#ADDR]]

llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp

case RISCV::fixup_riscv_jal:
       return ELF::R_RISCV_JAL;
     case RISCV::fixup_riscv_branch:
       return ELF::R_RISCV_BRANCH;
     case RISCV::fixup_riscv_rvc_jump:
       return ELF::R_RISCV_RVC_JUMP;
     case RISCV::fixup_riscv_rvc_branch:
       return ELF::R_RISCV_RVC_BRANCH;
     case RISCV::fixup_riscv_call:
-      return ELF::R_RISCV_CALL;
+      return ELF::R_RISCV_CALL_PLT;
     case RISCV::fixup_riscv_call_plt:
       return ELF::R_RISCV_CALL_PLT;
     case RISCV::fixup_riscv_add_8:
       return ELF::R_RISCV_ADD8;
     case RISCV::fixup_riscv_sub_8:
       return ELF::R_RISCV_SUB8;
     case RISCV::fixup_riscv_add_16:
       return ELF::R_RISCV_ADD16;

llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_indirect.s

test_pcrel32:
         auipc a0, %pcrel_hi(external_data)
         lw  a0, %pcrel_lo(test_pcrel32)(a0)
 
         .size   test_pcrel32, .-test_pcrel32
 
 # Test R_RISCV_CALL
 # jitlink-check: decode_operand(test_call, 1) = ((external_func - test_call) + 0x800)[31:12]
 # jitlink-check: decode_operand(test_call+4, 2)[11:0] = (external_func - test_call)[11:0]
-        .globl test_call
+        .globl test_call, external_func
         .p2align  1
         .type  test_call,@function
 test_call:
-        call external_func
+        .reloc ., R_RISCV_CALL, external_func
+        auipc ra, 0
+        jalr ra
         ret
         .size test_call, .-test_call

llvm/test/MC/RISCV/function-call.s

 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
 # RUN:     | llvm-objdump -d - | FileCheck --check-prefix=INSTR %s
 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
 # RUN: llvm-mc -triple riscv32 < %s -show-encoding \
 # RUN:     | FileCheck -check-prefix=FIXUP %s
 
 .long foo
 
 call foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
 call bar
-# RELOC: R_RISCV_CALL bar 0x0
+# RELOC: R_RISCV_CALL_PLT bar 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
 
 # Ensure that calls to functions whose names coincide with register names work.
 
 call zero
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
 
 call f1
-# RELOC: R_RISCV_CALL f1 0x0
+# RELOC: R_RISCV_CALL_PLT f1 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: f1, kind: fixup_riscv_call
 
 call ra
-# RELOC: R_RISCV_CALL ra 0x0
+# RELOC: R_RISCV_CALL_PLT ra 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: ra, kind: fixup_riscv_call
 
 call mstatus
-# RELOC: R_RISCV_CALL mstatus 0x0
+# RELOC: R_RISCV_CALL_PLT mstatus 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: mstatus, kind: fixup_riscv_call
 
 # Ensure that calls to procedure linkage table symbols work.
 
 call foo@plt
 # RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc ra, 0
 # INSTR: jalr  ra
 # FIXUP: fixup A - offset: 0, value: foo@plt, kind: fixup_riscv_call_plt
 
 # Ensure that an explicit register operand can be parsed.
 
 call a0, foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc a0, 0
 # INSTR: jalr  a0
 # FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
 
 call a0, foo@plt
 # RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc a0, 0
 # INSTR: jalr  a0
 # FIXUP: fixup A - offset: 0, value: foo@plt, kind: fixup_riscv_call_plt

llvm/test/MC/RISCV/linker-relaxation.s

 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=RELAX-RELOC %s
 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=NORELAX-RELOC %s
 # RUN: llvm-mc -triple riscv32 -mattr=+relax < %s -show-encoding \
 # RUN:     | FileCheck -check-prefix=RELAX-FIXUP %s
 # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+relax < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=RELAX-RELOC %s
 # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-relax < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=NORELAX-RELOC %s
 # RUN: llvm-mc -triple riscv64 -mattr=+relax < %s -show-encoding \
 # RUN:     | FileCheck -check-prefix=RELAX-FIXUP %s
 
 .long foo
 
 call foo
-# NORELAX-RELOC: R_RISCV_CALL foo 0x0
+# NORELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
 # NORELAX-RELOC-NOT: R_RISCV_RELAX
-# RELAX-RELOC: R_RISCV_CALL foo 0x0
+# RELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
 # RELAX-RELOC: R_RISCV_RELAX - 0x0
 # RELAX-FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
 # RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
 
 lui t1, %hi(foo)
 # NORELAX-RELOC: R_RISCV_HI20 foo 0x0
 # NORELAX-RELOC-NOT: R_RISCV_RELAX
 # RELAX-RELOC: R_RISCV_HI20 foo 0x0

 # NORELAX-RELOC-NOT: R_RISCV_BRANCH
 # RELAX-RELOC: R_RISCV_BRANCH bar 0x0
 # RELAX-FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_branch
 # RELAX-FIXUP-NOT: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
 
 call bar
 # NORELAX-RELOC-NOT: R_RISCV_CALL
 # NORELAX-RELOC-NOT: R_RISCV_RELAX
-# RELAX-RELOC: R_RISCV_CALL bar 0x0
+# RELAX-RELOC: R_RISCV_CALL_PLT bar 0x0
 # RELAX-RELOC: R_RISCV_RELAX - 0x0
 # RELAX-FIXUP: fixup A - offset: 0, value: bar, kind: fixup_riscv_call
 # RELAX-FIXUP: fixup B - offset: 0, value: 0, kind: fixup_riscv_relax
 
 lui t1, %hi(bar)
 # NORELAX-RELOC: R_RISCV_HI20 bar 0x0
 # NORELAX-RELOC-NOT: R_RISCV_RELAX
 # RELAX-RELOC: R_RISCV_HI20 bar 0x0

llvm/test/MC/RISCV/option-pushpop.s

 # RUN:     | FileCheck -check-prefixes=CHECK-BYTES,CHECK-ALIAS %s
 
 # Test the operation of the push and pop assembler directives when
 # using .option relax and .option rvc. Checks that using .option pop
 # correctly restores all target features to their state at the point
 # where .option pop was last used.
 
 # CHECK-INST: call foo
-# CHECK-RELOC: R_RISCV_CALL foo 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT foo 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call foo
 
 # CHECK-INST: addi s0, sp, 1020
 # CHECK-BYTES: 13 04 c1 3f
 # CHECK-ALIAS: addi s0, sp, 1020
 addi s0, sp, 1020
 
 .option push    # Push relax=false, rvc=false
 # CHECK-INST: .option push
 
 .option relax
 # CHECK-INST: .option relax
 # CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
 # CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
 call bar
 
 .option push    # Push relax=true, rvc=false
 # CHECK-INST: .option push
 
 .option rvc
 # CHECK-INST: .option rvc
 # CHECK-INST: c.addi4spn s0, sp, 1020
 # CHECK-BYTES: e0 1f
 # CHECK-ALIAS: addi s0, sp, 1020
 addi s0, sp, 1020
 
 .option pop     # Pop relax=true, rvc=false
 # CHECK-INST: .option pop
 # CHECK-INST: addi s0, sp, 1020
 # CHECK-BYTES: 13 04 c1 3f
 # CHECK-ALIAS: addi s0, sp, 1020
 addi s0, sp, 1020
 
 # CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
 # CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
 call bar
 
 .option pop     # Pop relax=false, rvc=false
 # CHECK-INST: .option pop
 # CHECK-INST: call baz
-# CHECK-RELOC: R_RISCV_CALL baz 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT baz 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call baz
 
 # CHECK-INST: addi s0, sp, 1020
 # CHECK-BYTES: 13 04 c1 3f
 # CHECK-ALIAS: addi s0, sp, 1020
 addi s0, sp, 1020
 

llvm/test/MC/RISCV/option-relax.s

 # linker-relaxation.s and fixups-expr.s for behaviour of the relax
 # attribute.
 
 .L1:
 .option norelax
 # CHECK-INST: .option norelax
 
 # CHECK-INST: call foo
-# CHECK-RELOC: R_RISCV_CALL foo 0x0
+# CHECK-RELOC: R_RISCV_CALL_PLT foo 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call foo
 
 # CHECK-RELOC-NEXT: R_RISCV_ADD64
 # CHECK-RELOC-NEXT: R_RISCV_SUB64
 .dword .L2-.L1
 # CHECK-RELOC-NEXT: R_RISCV_JAL
 jal zero, .L1
 # CHECK-RELOC-NEXT: R_RISCV_BRANCH
 beq s1, s1, .L1
 
 .L2:
 .option relax
 # CHECK-INST: .option relax
 
 # CHECK-INST: call bar
-# CHECK-RELOC-NEXT: R_RISCV_CALL bar 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
 # CHECK-RELOC-NEXT: R_RISCV_RELAX - 0x0
 call bar
 
 # CHECK-RELOC-NEXT: R_RISCV_ADD64
 # CHECK-RELOC-NEXT: R_RISCV_SUB64
 .dword .L2-.L1
 # CHECK-RELOC-NEXT: R_RISCV_JAL
 jal zero, .L1
 # CHECK-RELOC-NEXT: R_RISCV_BRANCH
 beq s1, s1, .L1
 
 .option norelax
 # CHECK-INST: .option norelax
 
 # CHECK-INST: call baz
-# CHECK-RELOC-NEXT: R_RISCV_CALL baz 0x0
+# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT baz 0x0
 # CHECK-RELOC-NOT: R_RISCV_RELAX - 0x0
 call baz
 
 # CHECK-RELOC-NEXT: R_RISCV_ADD64
 # CHECK-RELOC-NEXT: R_RISCV_SUB64
 .dword .L2-.L1
 # CHECK-RELOC-NEXT: R_RISCV_JAL
 jal zero, .L1
 # CHECK-RELOC-NEXT: R_RISCV_BRANCH
 beq s1, s1, .L1
 
 1:
 # CHECK-RELOC-NEXT: R_RISCV_PCREL_HI20 .L1
 auipc t1, %pcrel_hi(.L1)
 # CHECK-RELOC-NEXT: R_RISCV_PCREL_LO12_I .Ltmp0
 addi t1, t1, %pcrel_lo(1b)

llvm/test/MC/RISCV/pseudo-jump.s

 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
 # RUN:     | llvm-objdump -d - | FileCheck --check-prefix=INSTR %s
 # RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
 # RUN: llvm-mc -triple riscv32 < %s -show-encoding \
 # RUN:     | FileCheck -check-prefix=FIXUP %s
 
 .long foo
 
 jump foo, x31
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc t6, 0
 # INSTR: jr  t6
 # FIXUP: fixup A - offset: 0, value: foo, kind: fixup_riscv_call
 
 # Ensure that jumps to symbols whose names coincide with register names work.
 
 jump zero, x1
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
 # INSTR: auipc ra, 0
 # INSTR: ret
 # FIXUP: fixup A - offset: 0, value: zero, kind: fixup_riscv_call
 
 1:
 jump 1b, x31
 # INSTR: auipc t6, 0
 # INSTR: jr  t6
 # FIXUP: fixup A - offset: 0, value: .Ltmp0, kind: fixup_riscv_call

llvm/test/MC/RISCV/tail-call.s

 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
 # RUN:   | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
 # RUN: llvm-mc -triple riscv64 < %s -show-encoding \
 # RUN:   | FileCheck -check-prefix=FIXUP %s
 
 .long foo
 
 tail foo
-# RELOC: R_RISCV_CALL foo 0x0
+# RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: foo, kind:
 tail bar
-# RELOC: R_RISCV_CALL bar 0x0
+# RELOC: R_RISCV_CALL_PLT bar 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: bar, kind:
 
 # Ensure that tail calls to functions whose names coincide with register names
 # work.
 
 tail zero
-# RELOC: R_RISCV_CALL zero 0x0
+# RELOC: R_RISCV_CALL_PLT zero 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: zero, kind:
 
 tail f1
-# RELOC: R_RISCV_CALL f1 0x0
+# RELOC: R_RISCV_CALL_PLT f1 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: f1, kind:
 
 tail ra
-# RELOC: R_RISCV_CALL ra 0x0
+# RELOC: R_RISCV_CALL_PLT ra 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: ra, kind:
 
 tail foo@plt
 # RELOC: R_RISCV_CALL_PLT foo 0x0
 # INSTR: auipc t1, 0
 # INSTR: jr  t1
 # FIXUP: fixup A - offset: 0, value: foo@plt, kind: