We always assume the vector register is dead or killed while
inserting the VGPR spills in the prolog. It is not always
true. Used the entry block liveIn data while setting the flag.
Details
Details
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Diff Detail
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- rG LLVM Github Monorepo
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llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir | ||
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2 | Can you precommit this test so we can see the diff? |
llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir | ||
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2 | Prior to this patch, the test would end up with a verifier error complaining undefined register used. |
Comment Actions
Fixed the title and summary to avoid the use of "custom" while refering PrologEpilog spills.
Can you precommit this test so we can see the diff?