[RISCV] Support getHostCpuName for sifive-u74

[luismarques]

This seems in line with what's done for the other archs, so overall seems fine.

llvm/lib/Support/Host.cpp

383–401

It seems a bit silly to allocate memory for all the line references if we are only going to care about one of them. Do you expect we'll need some of the other lines as well in the future?

[StephenFan]

llvm/lib/Support/Host.cpp

383–401

Yes, I think we will have more and more RISC-V development boards in the future.

[luismarques]

llvm/lib/Support/Host.cpp

383–401

And those other boards can't be recognized from the uarch line?

[StephenFan]

llvm/lib/Support/Host.cpp

383–401

I think they can. But I don't have those boards currently.

[kito-cheng]

llvm/lib/Support/Host.cpp

383–401

I've confirmed with my colleague, sifive,u74-mc is right, and he suggest we should recognize sifive,bullet0[1] too, because that what upstream linux use, and sifive,u74-mc are used in SiFive's OpenEmbedded release[2].

[1] https://github.com/torvalds/linux/blob/master/arch/riscv/boot/dts/sifive/fu740-c000.dtsi#L42
[2] https://github.com/sifive/meta-sifive/blob/2022.03/recipes-kernel/linux/files/0001-riscv-sifive-fu740-cpu-1-2-3-4-set-compatible-to-sif.patch

[StephenFan]

Thanks for confirming it! @kito-cheng

ChangeLog:

Add "sifive,bullet0"

[kito-cheng]

LGTM

[MaskRay]

llvm/lib/Support/Host.cpp

385

It's unnecessary to optimize for avoiding the memory allocation.

[MaskRay]

llvm/unittests/Support/Host.cpp

378

StringLiteral

[StephenFan]

1. Replace std::string to StringRef
2. Remove size value for SmallVector

llvm/include/llvm/Support/Host.h

namespace sys {
   /// Returns -1 if unknown for the current host system.
   int getHostNumPhysicalCores();
 
   namespace detail {
   /// Helper functions to extract HostCPUName from /proc/cpuinfo on linux.
   StringRef getHostCPUNameForPowerPC(StringRef ProcCpuinfoContent);
   StringRef getHostCPUNameForARM(StringRef ProcCpuinfoContent);
   StringRef getHostCPUNameForS390x(StringRef ProcCpuinfoContent);
+  StringRef getHostCPUNameForRISCV(StringRef ProcCpuinfoContent);
   StringRef getHostCPUNameForBPF();
 
   /// Helper functions to extract CPU details from CPUID on x86.
   namespace x86 {
   enum class VendorSignatures {
     UNKNOWN,
     GENUINE_INTEL,
     AUTHENTIC_AMD,

llvm/lib/Support/Host.cpp

if (Lines[I].startswith("processor ")) {
       }
       break;
     }
   }
 
   return "generic";
 }
 
+StringRef sys::detail::getHostCPUNameForRISCV(StringRef ProcCpuinfoContent) {
+  // There are 24 lines in /proc/cpuinfo
+  SmallVector<StringRef> Lines;
+  ProcCpuinfoContent.split(Lines, "\n");
+
+  // Look for uarch line to determine cpu name
+  StringRef UArch;
+  for (unsigned I = 0, E = Lines.size(); I != E; ++I) {
+    if (Lines[I].startswith("uarch")) {
+      UArch = Lines[I].substr(5).ltrim("\t :");
+      break;
+    }
+  }
+
+  return StringSwitch<const char *>(UArch)
+      .Case("sifive,u74-mc", "sifive-u74")
+      .Case("sifive,bullet0", "sifive-u74")
+      .Default("generic");
+}
+
 StringRef sys::detail::getHostCPUNameForBPF() {
 #if !defined(__linux__) || !defined(__x86_64__)
   return "generic";
 #else
   uint8_t v3_insns[40] __attribute__ ((aligned (8))) =
       /* BPF_MOV64_IMM(BPF_REG_0, 0) */
     { 0xb7, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
       /* BPF_MOV64_IMM(BPF_REG_2, 1) */

 #endif
     return "pwr10";
   default:
     return "generic";
   }
 }
 #elif defined(__riscv)
 StringRef sys::getHostCPUName() {
+#if defined(__linux__)
+  std::unique_ptr<llvm::MemoryBuffer> P = getProcCpuinfoContent();
+  StringRef Content = P ? P->getBuffer() : "";
+  return detail::getHostCPUNameForRISCV(Content);
+#else
 #if __riscv_xlen == 64
   return "generic-rv64";
 #elif __riscv_xlen == 32
   return "generic-rv32";
 #else
 #error "Unhandled value of __riscv_xlen"
 #endif
+#endif
 }
 #else
 StringRef sys::getHostCPUName() { return "generic"; }
 namespace llvm {
 namespace sys {
 namespace detail {
 namespace x86 {
 

llvm/unittests/Support/Host.cpp

for (size_t J = 0; J < VectorSupport.size(); J++) {
                                        "\n" + DummyBaseMachineInfo +
                                        ModelIDs[I];
       EXPECT_EQ(sys::detail::getHostCPUNameForS390x(DummyCPUInfo),
                 ExpectedCPUs[CheckIndex++]);
     }
   }
 }
 
+TEST(getLinuxHostCPUName, RISCV) {
+  const StringRef SifiveU74MCProcCPUInfo = R"(
+processor       : 0
+hart            : 2
+isa             : rv64imafdc
+mmu             : sv39
+uarch           : sifive,u74-mc
+)";
+  EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveU74MCProcCPUInfo),
+            "sifive-u74");
+  EXPECT_EQ(
+      sys::detail::getHostCPUNameForRISCV("uarch           : sifive,bullet0\n"),
+      "sifive-u74");
+}
+
 static bool runAndGetCommandOutput(
     const char *ExePath, ArrayRef<llvm::StringRef> argv,
     std::unique_ptr<char[]> &Buffer, off_t &Size) {
   bool Success = false;
   [ExePath, argv, &Buffer, &Size, &Success] {
     using namespace llvm::sys;
     SmallString<128> TestDirectory;
     ASSERT_NO_ERROR(fs::createUniqueDirectory("host_test", TestDirectory));