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Differential D118680

[Intrinsics] Add `nocallback` to the default intrinsic attributes
ClosedPublic

Authored by jdoerfert on Jan 31 2022, 11:06 PM.

Details

Reviewers
uenoku
sstefan1
baziotis
nikic
arsenm
spatel
Commits
rG7aea3ea8c3b3: [Intrinsics] Add `nocallback` to the default intrinsic attributes
Summary

Most intrinsics, especially "default" ones, will not call back into the
IR module. nocallback encodes this nicely. As it was not used before,
this patch also makes use of nocallback in the Attributor which
results in many more norecurse deductions.

Tablegen part is mechanical, test updates by script.

Diff Detail

Unit TestsFailed

TimeTest
60,140 msx64 debian > AddressSanitizer-x86_64-linux-dynamic.TestCases::scariness_score_test.cpp
60,120 msx64 debian > AddressSanitizer-x86_64-linux.TestCases::scariness_score_test.cpp
60,020 msx64 debian > libFuzzer.libFuzzer::fuzzer-leak.test
60,050 msx64 debian > libFuzzer.libFuzzer::large.test
60,020 msx64 debian > libFuzzer.libFuzzer::minimize_crash.test

Event Timeline

jdoerfert created this revision.Jan 31 2022, 11:06 PM
Herald added a reviewer: uenoku. · View Herald TranscriptJan 31 2022, 11:06 PM
Herald added subscribers: ormris, okura, kuter and 3 others. · View Herald Transcript
jdoerfert requested review of this revision.Jan 31 2022, 11:06 PM
Herald added a reviewer: sstefan1. · View Herald TranscriptJan 31 2022, 11:06 PM
Herald added a reviewer: baziotis. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
Harbormaster completed remote builds in B146824: Diff 404815.Jan 31 2022, 11:07 PM
ormris removed a subscriber: ormris.Feb 1 2022, 9:49 AM
wsmoses added a subscriber: wsmoses.Feb 16 2022, 8:52 PM
jdoerfert added reviewers: nikic, arsenm, spatel.Mar 18 2022, 4:16 PM
Herald added a project: Restricted Project. · View Herald TranscriptMar 18 2022, 4:16 PM
Herald added a subscriber: wdng. · View Herald Transcript
arsenm accepted this revision.Mar 21 2022, 9:51 AM
This revision is now accepted and ready to land.Mar 21 2022, 9:51 AM
jdoerfert updated this revision to Diff 417753.Mar 23 2022, 2:41 PM

Rebase

Harbormaster completed remote builds in B155949: Diff 417753.Mar 23 2022, 3:19 PM
This revision was landed with ongoing or failed builds.Mar 24 2022, 11:51 AM
Closed by commit rG7aea3ea8c3b3: [Intrinsics] Add `nocallback` to the default intrinsic attributes (authored by jdoerfert). · Explain Why
This revision was automatically updated to reflect the committed changes.
jdoerfert added a commit: rG7aea3ea8c3b3: [Intrinsics] Add `nocallback` to the default intrinsic attributes.
Herald added a project: Restricted Project. · View Herald TranscriptMar 24 2022, 11:51 AM
Herald added a subscriber: cfe-commits. · View Herald Transcript
jdoerfert added a reverting change: rGc5f789050daa: Revert "[Intrinsics] Add `nocallback` to the default intrinsic attributes".Mar 24 2022, 12:05 PM
jdoerfert reopened this revision.Mar 24 2022, 4:01 PM
This revision is now accepted and ready to land.Mar 24 2022, 4:01 PM
jdoerfert updated this revision to Diff 418068.Mar 24 2022, 4:02 PM

Add more test updates

Herald added subscribers: jeroen.dobbelaere, wenlei, kerbowa and 2 others. · View Herald TranscriptMar 24 2022, 4:02 PM
Harbormaster completed remote builds in B156163: Diff 418068.Mar 24 2022, 4:46 PM
jdoerfert updated this revision to Diff 418096.Mar 24 2022, 5:43 PM

Fix one more test

Harbormaster completed remote builds in B156186: Diff 418096.Mar 24 2022, 6:32 PM
jdoerfert closed this revision.Mar 25 2022, 7:53 AM

closed by a81fff8afd06fab8818db521cc79bf933c700e24

jdoerfert mentioned this in D129516: [Intrinsics] Add `nocallback` to the memset/cpy/move intrinsics.Jul 11 2022, 2:06 PM
jdoerfert mentioned this in rGdfac03027186: [Intrinsics] Add `nocallback` to the memset/cpy/move intrinsics.Jul 21 2022, 8:53 PM
jdoerfert mentioned this in D131628: [LangRef] Add description for nocallback attribute.Aug 11 2022, 8:11 AM

Revision Contents

PathSize
clang/
test/
CodeGen/
2 lines
2 lines
llvm/
include/
llvm/
IR/
3 lines
lib/
Transforms/
IPO/
4 lines
test/
Analysis/
BasicAA/
4 lines
TypeBasedAliasAnalysis/
4 lines
Assembler/
8 lines
Bindings/
llvm-c/
6 lines
Bitcode/
6 lines
6 lines
6 lines
6 lines
6 lines
6 lines
6 lines
6 lines
4 lines
CodeGen/
AMDGPU/
2 lines
Feature/
2 lines
Instrumentation/
MemorySanitizer/
2 lines
Other/
4 lines
Transforms/
Attributor/
ArgumentPromotion/
X86/
2 lines
14 lines
13 lines
8 lines
4 lines
2 lines
12 lines
8 lines
10 lines
4 lines
125 lines
39 lines
368 lines
14 lines
2 lines
57 lines
1405 lines
210 lines
295 lines
DeadArgElim/
2 lines
2 lines
Inline/
2 lines
InstCombine/
AArch64/
2 lines
LowerMatrixIntrinsics/
2 lines
ObjCARC/
2 lines
2 lines
OpenMP/
2 lines
8 lines
4 lines
SampleProfile/
2 lines
SimplifyCFG/
X86/
2 lines
Verifier/
2 lines
tools/
UpdateTestChecks/
update_test_checks/
Inputs/
4 lines
llvm-reduce/
8 lines
2 lines
utils/
TableGen/
3 lines
3 lines
13 lines

Diff 418096

clang/test/CodeGen/builtin-sqrt.c

// RUN: %clang_cc1 -fmath-errno -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=HAS_ERRNO // RUN: %clang_cc1 -fmath-errno -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=HAS_ERRNO
// RUN: %clang_cc1 -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=NO_ERRNO // RUN: %clang_cc1 -triple x86_64-apple-darwin %s -emit-llvm -o - | FileCheck %s --check-prefix=NO_ERRNO
float foo(float X) { float foo(float X) {
// HAS_ERRNO: call float @sqrtf(float // HAS_ERRNO: call float @sqrtf(float
// NO_ERRNO: call float @llvm.sqrt.f32(float // NO_ERRNO: call float @llvm.sqrt.f32(float
return __builtin_sqrtf(X); return __builtin_sqrtf(X);
} }
// HAS_ERRNO: declare float @sqrtf(float noundef) [[ATTR:#[0-9]+]] // HAS_ERRNO: declare float @sqrtf(float noundef) [[ATTR:#[0-9]+]]
// HAS_ERRNO-NOT: attributes [[ATTR]] = {{{.*}} readnone // HAS_ERRNO-NOT: attributes [[ATTR]] = {{{.*}} readnone
// NO_ERRNO: declare float @llvm.sqrt.f32(float) [[ATTR:#[0-9]+]] // NO_ERRNO: declare float @llvm.sqrt.f32(float) [[ATTR:#[0-9]+]]
// NO_ERRNO: attributes [[ATTR]] = { nofree nosync nounwind readnone {{.*}}} // NO_ERRNO: attributes [[ATTR]] = { nocallback nofree nosync nounwind readnone {{.*}}}

clang/test/CodeGen/libcalls.c

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// CHECK-NO: declare float @llvm.log.f32(float) [[NUW_RNI]] // CHECK-NO: declare float @llvm.log.f32(float) [[NUW_RNI]]
// CHECK-YES: declare double @log(double noundef) [[NUW]] // CHECK-YES: declare double @log(double noundef) [[NUW]]
// CHECK-YES: declare x86_fp80 @logl(x86_fp80 noundef) [[NUW]] // CHECK-YES: declare x86_fp80 @logl(x86_fp80 noundef) [[NUW]]
// CHECK-YES: declare float @logf(float noundef) [[NUW]] // CHECK-YES: declare float @logf(float noundef) [[NUW]]
} }
// CHECK-YES: attributes [[NUW]] = { nounwind "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+x87" } // CHECK-YES: attributes [[NUW]] = { nounwind "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+x87" }
// CHECK-NO-DAG: attributes [[NUW_RN]] = { nounwind readnone{{.*}} } // CHECK-NO-DAG: attributes [[NUW_RN]] = { nounwind readnone{{.*}} }
// CHECK-NO-DAG: attributes [[NUW_RNI]] = { nofree nosync nounwind readnone speculatable willreturn } // CHECK-NO-DAG: attributes [[NUW_RNI]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }

llvm/include/llvm/IR/Intrinsics.td

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// ReadNone - The specified argument pointer is not dereferenced by the // ReadNone - The specified argument pointer is not dereferenced by the
// intrinsic. // intrinsic.
class ReadNone<AttrIndex idx> : IntrinsicProperty { class ReadNone<AttrIndex idx> : IntrinsicProperty {
int ArgNo = idx.Value; int ArgNo = idx.Value;
} }
def IntrNoReturn : IntrinsicProperty; def IntrNoReturn : IntrinsicProperty;
// Applied by default.
def IntrNoCallback : IntrinsicProperty<1>;
// IntrNoSync - Threads executing the intrinsic will not synchronize using // IntrNoSync - Threads executing the intrinsic will not synchronize using
// memory or other means. Applied by default. // memory or other means. Applied by default.
def IntrNoSync : IntrinsicProperty<1>; def IntrNoSync : IntrinsicProperty<1>;
// Applied by default. // Applied by default.
def IntrNoFree : IntrinsicProperty<1>; def IntrNoFree : IntrinsicProperty<1>;
// Applied by default. // Applied by default.
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llvm/lib/Transforms/IPO/AttributorAttributes.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 9,696 Lines • ▼ Show 20 Lines bool checkIfReachable(Attributor &A, const AAFunctionReachability &AA,
return true; return true;
} }
SmallVector<const AAFunctionReachability *, 8> Deps; SmallVector<const AAFunctionReachability *, 8> Deps;
for (auto &AAEdges : AAEdgesList) { for (auto &AAEdges : AAEdgesList) {
const SetVector<Function *> &Edges = AAEdges->getOptimisticEdges(); const SetVector<Function *> &Edges = AAEdges->getOptimisticEdges();
for (Function *Edge : Edges) { for (Function *Edge : Edges) {
// Functions that do not call back into the module can be ignored.
if (Edge->hasFnAttribute(Attribute::NoCallback))
continue;
// We don't need a dependency if the result is reachable. // We don't need a dependency if the result is reachable.
const AAFunctionReachability &EdgeReachability = const AAFunctionReachability &EdgeReachability =
A.getAAFor<AAFunctionReachability>( A.getAAFor<AAFunctionReachability>(
AA, IRPosition::function(*Edge), DepClassTy::NONE); AA, IRPosition::function(*Edge), DepClassTy::NONE);
Deps.push_back(&EdgeReachability); Deps.push_back(&EdgeReachability);
if (EdgeReachability.canReach(A, Fn)) if (EdgeReachability.canReach(A, Fn))
return true; return true;
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llvm/test/Analysis/BasicAA/intrinsics.ll

Show All 16 Linesentry:
%b = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* %p, i32 16, <8 x i1> %m, <8 x i16> %pt) nounwind %b = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* %p, i32 16, <8 x i1> %m, <8 x i16> %pt) nounwind
%c = add <8 x i16> %a, %b %c = add <8 x i16> %a, %b
ret <8 x i16> %c ret <8 x i16> %c
} }
declare <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>) nounwind readonly declare <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>) nounwind readonly
declare void @llvm.masked.store.v8i16.p0v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>) nounwind declare void @llvm.masked.store.v8i16.p0v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>) nounwind
; CHECK: attributes #0 = { argmemonly nofree nosync nounwind readonly willreturn } ; CHECK: attributes #0 = { argmemonly nocallback nofree nosync nounwind readonly willreturn }
; CHECK: attributes #1 = { argmemonly nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #1 = { argmemonly nocallback nofree nosync nounwind willreturn writeonly }
; CHECK: attributes [[ATTR]] = { nounwind } ; CHECK: attributes [[ATTR]] = { nounwind }

llvm/test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll

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%b = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* %p, i32 16, <8 x i1> %m, <8 x i16> %pt) nounwind, !tbaa !2 %b = call <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>* %p, i32 16, <8 x i1> %m, <8 x i16> %pt) nounwind, !tbaa !2
%c = add <8 x i16> %a, %b %c = add <8 x i16> %a, %b
ret <8 x i16> %c ret <8 x i16> %c
} }
declare <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>) nounwind readonly declare <8 x i16> @llvm.masked.load.v8i16.p0v8i16(<8 x i16>*, i32, <8 x i1>, <8 x i16>) nounwind readonly
declare void @llvm.masked.store.v8i16.p0v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>) nounwind declare void @llvm.masked.store.v8i16.p0v8i16(<8 x i16>, <8 x i16>*, i32, <8 x i1>) nounwind
; CHECK: attributes #0 = { argmemonly nofree nosync nounwind readonly willreturn } ; CHECK: attributes #0 = { argmemonly nocallback nofree nosync nounwind readonly willreturn }
; CHECK: attributes #1 = { argmemonly nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #1 = { argmemonly nocallback nofree nosync nounwind willreturn writeonly }
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }
!0 = !{!"tbaa root"} !0 = !{!"tbaa root"}
!1 = !{!3, !3, i64 0} !1 = !{!3, !3, i64 0}
!2 = !{!4, !4, i64 0} !2 = !{!4, !4, i64 0}
!3 = !{!"A", !0} !3 = !{!"A", !0}
!4 = !{!"B", !0} !4 = !{!"B", !0}

llvm/test/Assembler/aarch64-intrinsics-attributes.ll

; REQUIRES: aarch64-registered-target ; REQUIRES: aarch64-registered-target
; RUN: llvm-as < %s | llvm-dis | FileCheck %s ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
; Make sure some AArch64 intrinsics have the expected attributes. ; Make sure some AArch64 intrinsics have the expected attributes.
; CHECK: declare i64 @llvm.aarch64.ldxr.p0i64(i64*) [[NOFREE_NOUNWIND_WILLRETURN:#[0-9]+]] ; CHECK: declare i64 @llvm.aarch64.ldxr.p0i64(i64*) [[NOFREE_NOUNWIND_WILLRETURN:#[0-9]+]]
declare i64 @llvm.aarch64.ldxr.p0i64(i64*) declare i64 @llvm.aarch64.ldxr.p0i64(i64*)
; CHECK: declare i32 @llvm.aarch64.stxp(i64, i64, i32*) [[NOFREE_NOUNWIND_WILLRETURN]] ; CHECK: declare i32 @llvm.aarch64.stxp(i64, i64, i32*) [[NOFREE_NOUNWIND_WILLRETURN]]
declare i32 @llvm.aarch64.stxp(i64, i64, i32*) declare i32 @llvm.aarch64.stxp(i64, i64, i32*)
; CHECK: declare i32 @llvm.aarch64.dsb(i32) [[NOFREE_NOUNWIND_WILLRETURN]] ; CHECK: declare i32 @llvm.aarch64.dsb(i32) [[NOFREE_NOUNWIND_WILLRETURN]]
declare i32 @llvm.aarch64.dsb(i32) declare i32 @llvm.aarch64.dsb(i32)
; CHECK: declare i64 @llvm.aarch64.neon.sqdmulls.scalar(i32, i32) [[NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN:#[0-9]+]] ; CHECK: declare i64 @llvm.aarch64.neon.sqdmulls.scalar(i32, i32) [[NO_CALLBACK_NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN:#[0-9]+]]
declare i64 @llvm.aarch64.neon.sqdmulls.scalar(i32, i32) declare i64 @llvm.aarch64.neon.sqdmulls.scalar(i32, i32)
; CHECK: declare <4 x i32> @llvm.aarch64.neon.shadd.v4i32(<4 x i32>, <4 x i32>) [[NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN]] ; CHECK: declare <4 x i32> @llvm.aarch64.neon.shadd.v4i32(<4 x i32>, <4 x i32>) [[NO_CALLBACK_NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN]]
declare <4 x i32> @llvm.aarch64.neon.shadd.v4i32(<4 x i32>, <4 x i32>) declare <4 x i32> @llvm.aarch64.neon.shadd.v4i32(<4 x i32>, <4 x i32>)
; CHECK: declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32) [[NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN]] ; CHECK: declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32) [[NO_CALLBACK_NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN]]
declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32) declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32)
; CHECK: attributes [[NOFREE_NOUNWIND_WILLRETURN]] = { nofree nounwind willreturn } ; CHECK: attributes [[NOFREE_NOUNWIND_WILLRETURN]] = { nofree nounwind willreturn }
; CHECK: attributes [[NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes [[NO_CALLBACK_NOFREE_NOSYNC_NOUNWIND_READNONE_WILLRETURN]] = { nocallback nofree nosync nounwind readnone willreturn }

llvm/test/Bindings/llvm-c/debug_info.ll

; RUN: llvm-c-test --test-dibuilder | FileCheck %s ; RUN: llvm-c-test --test-dibuilder | FileCheck %s
; CHECK: ; ModuleID = 'debuginfo.c' ; CHECK: ; ModuleID = 'debuginfo.c'
; CHECK-NEXT: source_filename = "debuginfo.c" ; CHECK-NEXT: source_filename = "debuginfo.c"
; CHECK: define i64 @foo(i64 %0, i64 %1, <10 x i64> %2) !dbg !31 { ; CHECK: define i64 @foo(i64 %0, i64 %1, <10 x i64> %2) !dbg !31 {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i64 0, metadata !38, metadata !DIExpression()), !dbg !43 ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i64 0, metadata !38, metadata !DIExpression()), !dbg !43
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i64 0, metadata !39, metadata !DIExpression()), !dbg !43 ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i64 0, metadata !39, metadata !DIExpression()), !dbg !43
; CHECK-NEXT: call void @llvm.dbg.declare(metadata i64 0, metadata !40, metadata !DIExpression()), !dbg !43 ; CHECK-NEXT: call void @llvm.dbg.declare(metadata i64 0, metadata !40, metadata !DIExpression()), !dbg !43
; CHECK: vars: ; No predecessors! ; CHECK: vars: ; No predecessors!
; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 0, metadata !41, metadata !DIExpression(DW_OP_constu, 0, DW_OP_stack_value)), !dbg !44 ; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 0, metadata !41, metadata !DIExpression(DW_OP_constu, 0, DW_OP_stack_value)), !dbg !44
; CHECK-NEXT: } ; CHECK-NEXT: }
; CHECK: ; Function Attrs: nofree nosync nounwind readnone speculatable willreturn ; CHECK: ; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
; CHECK-NEXT: declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 ; CHECK-NEXT: declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
; CHECK: ; Function Attrs: nofree nosync nounwind readnone speculatable willreturn ; CHECK: ; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
; CHECK-NEXT: declare void @llvm.dbg.value(metadata, metadata, metadata) #0 ; CHECK-NEXT: declare void @llvm.dbg.value(metadata, metadata, metadata) #0
; CHECK: attributes #0 = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: !llvm.dbg.cu = !{!0} ; CHECK: !llvm.dbg.cu = !{!0}
; CHECK-NEXT: !FooType = !{!28} ; CHECK-NEXT: !FooType = !{!28}
; CHECK-NEXT: !EnumTest = !{!3} ; CHECK-NEXT: !EnumTest = !{!3}
; CHECK: !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "llvm-c-test", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !11, imports: !19, macros: !23, splitDebugInlining: false, sysroot: "/") ; CHECK: !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "llvm-c-test", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !11, imports: !19, macros: !23, splitDebugInlining: false, sysroot: "/")
; CHECK-NEXT: !1 = !DIFile(filename: "debuginfo.c", directory: ".") ; CHECK-NEXT: !1 = !DIFile(filename: "debuginfo.c", directory: ".")
; CHECK-NEXT: !2 = !{!3} ; CHECK-NEXT: !2 = !{!3}
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llvm/test/Bitcode/compatibility-3.6.ll

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; CHECK: attributes #21 = { sanitize_address } ; CHECK: attributes #21 = { sanitize_address }
; CHECK: attributes #22 = { sanitize_memory } ; CHECK: attributes #22 = { sanitize_memory }
; CHECK: attributes #23 = { sanitize_thread } ; CHECK: attributes #23 = { sanitize_thread }
; CHECK: attributes #24 = { ssp } ; CHECK: attributes #24 = { ssp }
; CHECK: attributes #25 = { sspreq } ; CHECK: attributes #25 = { sspreq }
; CHECK: attributes #26 = { sspstrong } ; CHECK: attributes #26 = { sspstrong }
; CHECK: attributes #27 = { uwtable } ; CHECK: attributes #27 = { uwtable }
; CHECK: attributes #28 = { "cpu"="cortex-a8" } ; CHECK: attributes #28 = { "cpu"="cortex-a8" }
; CHECK: attributes #29 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #29 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #30 = { nofree nosync nounwind willreturn } ; CHECK: attributes #30 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #31 = { argmemonly nounwind readonly } ; CHECK: attributes #31 = { argmemonly nounwind readonly }
; CHECK: attributes #32 = { argmemonly nounwind } ; CHECK: attributes #32 = { argmemonly nounwind }
; CHECK: attributes #33 = { nounwind readonly } ; CHECK: attributes #33 = { nounwind readonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #35 = { builtin } ; CHECK: attributes #35 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
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llvm/test/Bitcode/compatibility-3.7.ll

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; CHECK: attributes #24 = { sanitize_memory } ; CHECK: attributes #24 = { sanitize_memory }
; CHECK: attributes #25 = { sanitize_thread } ; CHECK: attributes #25 = { sanitize_thread }
; CHECK: attributes #26 = { ssp } ; CHECK: attributes #26 = { ssp }
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #32 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #33 = { nofree nosync nounwind willreturn } ; CHECK: attributes #33 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #34 = { argmemonly nounwind readonly } ; CHECK: attributes #34 = { argmemonly nounwind readonly }
; CHECK: attributes #35 = { argmemonly nounwind } ; CHECK: attributes #35 = { argmemonly nounwind }
; CHECK: attributes #36 = { nounwind readonly } ; CHECK: attributes #36 = { nounwind readonly }
; CHECK: attributes #37 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #37 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #38 = { builtin } ; CHECK: attributes #38 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
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llvm/test/Bitcode/compatibility-3.8.ll

Show First 20 Lines • Show All 1,546 Lines • ▼ Show 20 Lines
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { norecurse } ; CHECK: attributes #32 = { norecurse }
; CHECK: attributes #33 = { inaccessiblememonly } ; CHECK: attributes #33 = { inaccessiblememonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
; CHECK: attributes #35 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #35 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #36 = { nofree nosync nounwind willreturn } ; CHECK: attributes #36 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #37 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind readonly }
; CHECK: attributes #38 = { argmemonly nounwind } ; CHECK: attributes #38 = { argmemonly nounwind }
; CHECK: attributes #39 = { nounwind readonly } ; CHECK: attributes #39 = { nounwind readonly }
; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #41 = { builtin } ; CHECK: attributes #41 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
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llvm/test/Bitcode/compatibility-3.9.ll

Show First 20 Lines • Show All 1,619 Lines • ▼ Show 20 Lines
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { norecurse } ; CHECK: attributes #32 = { norecurse }
; CHECK: attributes #33 = { inaccessiblememonly } ; CHECK: attributes #33 = { inaccessiblememonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
; CHECK: attributes #35 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #35 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #36 = { nofree nosync nounwind willreturn } ; CHECK: attributes #36 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #37 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind readonly }
; CHECK: attributes #38 = { argmemonly nounwind } ; CHECK: attributes #38 = { argmemonly nounwind }
; CHECK: attributes #39 = { nounwind readonly } ; CHECK: attributes #39 = { nounwind readonly }
; CHECK: attributes #40 = { writeonly } ; CHECK: attributes #40 = { writeonly }
; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #42 = { builtin } ; CHECK: attributes #42 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
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llvm/test/Bitcode/compatibility-4.0.ll

Show First 20 Lines • Show All 1,644 Lines • ▼ Show 20 Lines
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { norecurse } ; CHECK: attributes #32 = { norecurse }
; CHECK: attributes #33 = { inaccessiblememonly } ; CHECK: attributes #33 = { inaccessiblememonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
; CHECK: attributes #35 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #35 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #36 = { nofree nosync nounwind willreturn } ; CHECK: attributes #36 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #37 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind readonly }
; CHECK: attributes #38 = { argmemonly nounwind } ; CHECK: attributes #38 = { argmemonly nounwind }
; CHECK: attributes #39 = { nounwind readonly } ; CHECK: attributes #39 = { nounwind readonly }
; CHECK: attributes #40 = { writeonly } ; CHECK: attributes #40 = { writeonly }
; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #41 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #42 = { builtin } ; CHECK: attributes #42 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
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llvm/test/Bitcode/compatibility-5.0.ll

Show First 20 Lines • Show All 1,659 Lines • ▼ Show 20 Lines
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { norecurse } ; CHECK: attributes #32 = { norecurse }
; CHECK: attributes #33 = { inaccessiblememonly } ; CHECK: attributes #33 = { inaccessiblememonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
; CHECK: attributes #35 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #35 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #36 = { nofree nosync nounwind willreturn } ; CHECK: attributes #36 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #37 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind readonly }
; CHECK: attributes #38 = { argmemonly nounwind } ; CHECK: attributes #38 = { argmemonly nounwind }
; CHECK: attributes #39 = { nounwind readonly } ; CHECK: attributes #39 = { nounwind readonly }
; CHECK: attributes #40 = { writeonly } ; CHECK: attributes #40 = { writeonly }
; CHECK: attributes #41 = { speculatable } ; CHECK: attributes #41 = { speculatable }
; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #43 = { builtin } ; CHECK: attributes #43 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
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llvm/test/Bitcode/compatibility-6.0.ll

Show First 20 Lines • Show All 1,670 Lines • ▼ Show 20 Lines
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { norecurse } ; CHECK: attributes #32 = { norecurse }
; CHECK: attributes #33 = { inaccessiblememonly } ; CHECK: attributes #33 = { inaccessiblememonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
; CHECK: attributes #35 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #35 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #36 = { nofree nosync nounwind willreturn } ; CHECK: attributes #36 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #37 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind readonly }
; CHECK: attributes #38 = { argmemonly nounwind } ; CHECK: attributes #38 = { argmemonly nounwind }
; CHECK: attributes #39 = { nounwind readonly } ; CHECK: attributes #39 = { nounwind readonly }
; CHECK: attributes #40 = { writeonly } ; CHECK: attributes #40 = { writeonly }
; CHECK: attributes #41 = { speculatable } ; CHECK: attributes #41 = { speculatable }
; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #42 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #43 = { builtin } ; CHECK: attributes #43 = { builtin }
;; Metadata ;; Metadata
; Metadata -- Module flags ; Metadata -- Module flags
!llvm.module.flags = !{!0, !1, !2, !4, !5, !6} !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6} ; CHECK: !llvm.module.flags = !{!0, !1, !2, !4, !5, !6}
Show All 24 Lines

llvm/test/Bitcode/compatibility.ll

Show First 20 Lines • Show All 1,964 Lines • ▼ Show 20 Lines
; CHECK: attributes #27 = { sspreq } ; CHECK: attributes #27 = { sspreq }
; CHECK: attributes #28 = { sspstrong } ; CHECK: attributes #28 = { sspstrong }
; CHECK: attributes #29 = { "thunk" } ; CHECK: attributes #29 = { "thunk" }
; CHECK: attributes #30 = { uwtable } ; CHECK: attributes #30 = { uwtable }
; CHECK: attributes #31 = { "cpu"="cortex-a8" } ; CHECK: attributes #31 = { "cpu"="cortex-a8" }
; CHECK: attributes #32 = { norecurse } ; CHECK: attributes #32 = { norecurse }
; CHECK: attributes #33 = { inaccessiblememonly } ; CHECK: attributes #33 = { inaccessiblememonly }
; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly } ; CHECK: attributes #34 = { inaccessiblemem_or_argmemonly }
; CHECK: attributes #35 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #35 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes #36 = { nofree nosync nounwind willreturn } ; CHECK: attributes #36 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #37 = { argmemonly nounwind readonly } ; CHECK: attributes #37 = { argmemonly nounwind readonly }
; CHECK: attributes #38 = { argmemonly nounwind } ; CHECK: attributes #38 = { argmemonly nounwind }
; CHECK: attributes #39 = { nounwind readonly } ; CHECK: attributes #39 = { nounwind readonly }
; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #40 = { inaccessiblemem_or_argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #41 = { writeonly } ; CHECK: attributes #41 = { writeonly }
; CHECK: attributes #42 = { speculatable } ; CHECK: attributes #42 = { speculatable }
; CHECK: attributes #43 = { strictfp } ; CHECK: attributes #43 = { strictfp }
; CHECK: attributes #44 = { nosanitize_coverage } ; CHECK: attributes #44 = { nosanitize_coverage }
; CHECK: attributes #45 = { disable_sanitizer_instrumentation } ; CHECK: attributes #45 = { disable_sanitizer_instrumentation }
; CHECK: attributes #46 = { allocsize(0) } ; CHECK: attributes #46 = { allocsize(0) }
; CHECK: attributes #47 = { allocsize(1,0) } ; CHECK: attributes #47 = { allocsize(1,0) }
; CHECK: attributes #48 = { nosanitize_bounds } ; CHECK: attributes #48 = { nosanitize_bounds }
Show All 32 Lines

llvm/test/Bitcode/upgrade-invariant-group-barrier.ll

; RUN: opt -S < %s | FileCheck %s ; RUN: opt -S < %s | FileCheck %s
; The intrinsic firstly only took i8*, then it was made polimorphic, then ; The intrinsic firstly only took i8*, then it was made polimorphic, then
; it was renamed to launder.invariant.group ; it was renamed to launder.invariant.group
define void @test(i8* %p1, i16* %p16) { define void @test(i8* %p1, i16* %p16) {
; CHECK-LABEL: @test ; CHECK-LABEL: @test
; CHECK: %p2 = call i8* @llvm.launder.invariant.group.p0i8(i8* %p1) ; CHECK: %p2 = call i8* @llvm.launder.invariant.group.p0i8(i8* %p1)
; CHECK: %p3 = call i8* @llvm.launder.invariant.group.p0i8(i8* %p1) ; CHECK: %p3 = call i8* @llvm.launder.invariant.group.p0i8(i8* %p1)
; CHECK: %p4 = call i16* @llvm.launder.invariant.group.p0i16(i16* %p16) ; CHECK: %p4 = call i16* @llvm.launder.invariant.group.p0i16(i16* %p16)
%p2 = call i8* @llvm.invariant.group.barrier(i8* %p1) %p2 = call i8* @llvm.invariant.group.barrier(i8* %p1)
%p3 = call i8* @llvm.invariant.group.barrier.p0i8(i8* %p1) %p3 = call i8* @llvm.invariant.group.barrier.p0i8(i8* %p1)
%p4 = call i16* @llvm.invariant.group.barrier.p0i16(i16* %p16) %p4 = call i16* @llvm.invariant.group.barrier.p0i16(i16* %p16)
ret void ret void
} }
; CHECK: Function Attrs: inaccessiblememonly nofree nosync nounwind speculatable willreturn ; CHECK: Function Attrs: inaccessiblememonly nocallback nofree nosync nounwind speculatable willreturn
; CHECK: declare i8* @llvm.launder.invariant.group.p0i8(i8*) ; CHECK: declare i8* @llvm.launder.invariant.group.p0i8(i8*)
; CHECK: Function Attrs: inaccessiblememonly nofree nosync nounwind speculatable willreturn ; CHECK: Function Attrs: inaccessiblememonly nocallback nofree nosync nounwind speculatable willreturn
; CHECK: declare i16* @llvm.launder.invariant.group.p0i16(i16*) ; CHECK: declare i16* @llvm.launder.invariant.group.p0i16(i16*)
declare i8* @llvm.invariant.group.barrier(i8*) declare i8* @llvm.invariant.group.barrier(i8*)
declare i8* @llvm.invariant.group.barrier.p0i8(i8*) declare i8* @llvm.invariant.group.barrier.p0i8(i8*)
declare i16* @llvm.invariant.group.barrier.p0i16(i16*) declare i16* @llvm.invariant.group.barrier.p0i16(i16*)

llvm/test/CodeGen/AMDGPU/lower-kernel-and-module-lds.ll

Show First 20 Lines • Show All 109 Lines • ▼ Show 20 Lines;
store i8 1, i8 addrspace(3)* %lds.size.1.align.1.bc, align 1 store i8 1, i8 addrspace(3)* %lds.size.1.align.1.bc, align 1
%lds.size.8.align.8.bc = bitcast [8 x i8] addrspace(3)* @lds.size.8.align.8 to i8 addrspace(3)* %lds.size.8.align.8.bc = bitcast [8 x i8] addrspace(3)* @lds.size.8.align.8 to i8 addrspace(3)*
store i8 8, i8 addrspace(3)* %lds.size.8.align.8.bc, align 4 store i8 8, i8 addrspace(3)* %lds.size.8.align.8.bc, align 4
ret void ret void
} }
;. ;.
; CHECK: attributes #0 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #0 = { nocallback nofree nosync nounwind readnone willreturn }
;. ;.

llvm/test/Feature/intrinsics.ll

Show First 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; CHECK: declare void @llvm.trap() #1 ; CHECK: declare void @llvm.trap() #1
declare void @llvm.trap() declare void @llvm.trap()
define void @trap() { define void @trap() {
call void @llvm.trap() call void @llvm.trap()
ret void ret void
} }
; CHECK: attributes #0 = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #1 = { cold noreturn nounwind } ; CHECK: attributes #1 = { cold noreturn nounwind }

llvm/test/Instrumentation/MemorySanitizer/attributes.ll

Show First 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
} }
; CHECK-NOT: readnone ; CHECK-NOT: readnone
; CHECK-NOT: readonly ; CHECK-NOT: readonly
; CHECK-NOT: writeonly ; CHECK-NOT: writeonly
; CHECK-NOT: argmemonly ; CHECK-NOT: argmemonly
; CHECK-NOT: speculatable ; CHECK-NOT: speculatable
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nocallback nofree nosync nounwind readnone willreturn
; CHECK-NEXT: declare void @llvm.donothing ; CHECK-NEXT: declare void @llvm.donothing

llvm/test/Other/invariant.group.ll

Show First 20 Lines • Show All 85 Lines • ▼ Show 20 Lines; CHECK: call void @useBool(i1 %r2)
ret void ret void
} }
declare void @use(i8* readonly) declare void @use(i8* readonly)
declare void @useBool(i1) declare void @useBool(i1)
declare void @clobber(i8*) declare void @clobber(i8*)
; CHECK: Function Attrs: inaccessiblememonly nofree nosync nounwind speculatable willreturn{{$}} ; CHECK: Function Attrs: inaccessiblememonly nocallback nofree nosync nounwind speculatable willreturn{{$}}
; CHECK-NEXT: declare i8* @llvm.launder.invariant.group.p0i8(i8*) ; CHECK-NEXT: declare i8* @llvm.launder.invariant.group.p0i8(i8*)
declare i8* @llvm.launder.invariant.group.p0i8(i8*) declare i8* @llvm.launder.invariant.group.p0i8(i8*)
; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn{{$}} ; CHECK: Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn{{$}}
; CHECK-NEXT: declare i8* @llvm.strip.invariant.group.p0i8(i8*) ; CHECK-NEXT: declare i8* @llvm.strip.invariant.group.p0i8(i8*)
declare i8* @llvm.strip.invariant.group.p0i8(i8*) declare i8* @llvm.strip.invariant.group.p0i8(i8*)
!0 = !{} !0 = !{}

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/thiscall.ll

Show First 20 Lines • Show All 58 Lines • ▼ Show 20 Lines;
ret void ret void
} }
declare x86_thiscallcc %struct.a* @copy_ctor(%struct.a* returned, %struct.a* dereferenceable(1)) declare x86_thiscallcc %struct.a* @copy_ctor(%struct.a* returned, %struct.a* dereferenceable(1))
declare void @ext(<{ %struct.a }>* inalloca(<{ %struct.a }>)) declare void @ext(<{ %struct.a }>* inalloca(<{ %struct.a }>))
declare i8* @llvm.stacksave() declare i8* @llvm.stacksave()
declare void @llvm.stackrestore(i8*) declare void @llvm.stackrestore(i8*)
;. ;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { willreturn } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll

Show First 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@main ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@main
; IS__TUNIT_NPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[S_CAST1:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST1]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_12:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_12]], align 8
; IS__TUNIT_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32* ; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[S_CAST]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i64, i64* [[S_0_1]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 8
; IS__TUNIT_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[S_CAST1:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[S_CAST1]], align 32
; IS__TUNIT_NPM-NEXT: [[S_0_12:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i64, i64* [[S_0_12]], align 32
; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = call i32 @g(i32 [[TMP2]], i64 [[TMP3]]) #[[ATTR2]] ; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = call i32 @g(i32 [[TMP2]], i64 [[TMP3]]) #[[ATTR2]]
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]] ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
; IS__TUNIT_NPM-NEXT: ret i32 [[A]] ; IS__TUNIT_NPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@main ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@main
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
▲ Show 20 Lines • Show All 43 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll

Show All 25 Lines
} }
define internal void @bar(%p_t %p) { define internal void @bar(%p_t %p) {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_OPM-SAME: (i16* [[P:%.*]]) { ; IS__CGSCC_OPM-SAME: (i16* [[P:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()), !dbg [[DBG5:![0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()), !dbg [[DBG5:![0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_NPM-SAME: (i16* nocapture nofree readnone [[P:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i16* nocapture nofree readnone [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()) #[[ATTR3:[0-9]+]], !dbg [[DBG5:![0-9]+]] ; IS__CGSCC_NPM-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()) #[[ATTR2:[0-9]+]], !dbg [[DBG5:![0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @llvm.dbg.value(metadata %p_t %p, metadata !4, metadata !5), !dbg !6 call void @llvm.dbg.value(metadata %p_t %p, metadata !4, metadata !5), !dbg !6
ret void ret void
} }
declare void @llvm.dbg.value(metadata, metadata, metadata) declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!2} !llvm.module.flags = !{!2}
!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1) !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1)
!1 = !DIFile(filename: "test.c", directory: "") !1 = !DIFile(filename: "test.c", directory: "")
!2 = !{i32 2, !"Debug Info Version", i32 3} !2 = !{i32 2, !"Debug Info Version", i32 3}
!3 = distinct !DISubprogram(name: "bar", unit: !0) !3 = distinct !DISubprogram(name: "bar", unit: !0)
!4 = !DILocalVariable(name: "p", scope: !3) !4 = !DILocalVariable(name: "p", scope: !3)
!5 = !DIExpression() !5 = !DIExpression()
!6 = !DILocation(line: 1, column: 1, scope: !3) !6 = !DILocation(line: 1, column: 1, scope: !3)
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readnone willreturn }
;. ;.
; IS__TUNIT____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug) ; IS__TUNIT____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
; IS__TUNIT____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "") ; IS__TUNIT____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "")
; IS__TUNIT____: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3} ; IS__TUNIT____: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
;. ;.
; IS__CGSCC____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug) ; IS__CGSCC____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
; IS__CGSCC____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "") ; IS__CGSCC____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "")
; IS__CGSCC____: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3} ; IS__CGSCC____: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
; IS__CGSCC____: [[META3:![0-9]+]] = !DILocalVariable(name: "p", scope: !4) ; IS__CGSCC____: [[META3:![0-9]+]] = !DILocalVariable(name: "p", scope: !4)
; IS__CGSCC____: [[META4:![0-9]+]] = distinct !DISubprogram(name: "bar", scope: null, spFlags: DISPFlagDefinition, unit: !0) ; IS__CGSCC____: [[META4:![0-9]+]] = distinct !DISubprogram(name: "bar", scope: null, spFlags: DISPFlagDefinition, unit: !0)
; IS__CGSCC____: [[META5:![0-9]+]] = !DILocation(line: 1, column: 1, scope: !4) ; IS__CGSCC____: [[META5:![0-9]+]] = !DILocation(line: 1, column: 1, scope: !4)
;. ;.

llvm/test/Transforms/Attributor/dereferenceable-1.ll

Show First 20 Lines • Show All 948 Lines • ▼ Show 20 Lines
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR6:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR6:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR8]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR8]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nounwind }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR8]] = { willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR8]] = { willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nounwind } ; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nounwind }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR6:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR6:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR9]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nounwind }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR8]] = { willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nounwind }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i64 10, i64 100} ; CHECK: [[META0:![0-9]+]] = !{i64 10, i64 100}
;. ;.

llvm/test/Transforms/Attributor/heap_to_stack.ll

Show First 20 Lines • Show All 848 Lines • ▼ Show 20 Lines;
store i8* %1, i8** %P store i8* %1, i8** %P
ret void ret void
} }
;. ;.
; IS________OPM: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn } ; IS________OPM: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn }
; IS________OPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync willreturn } ; IS________OPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync willreturn }
; IS________OPM: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind } ; IS________OPM: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind }
; IS________OPM: attributes #[[ATTR3]] = { noreturn } ; IS________OPM: attributes #[[ATTR3]] = { noreturn }
; IS________OPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS________OPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS________OPM: attributes #[[ATTR5]] = { nounwind } ; IS________OPM: attributes #[[ATTR5]] = { nounwind }
;. ;.
; IS________NPM: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn } ; IS________NPM: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn }
; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync willreturn } ; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync willreturn }
; IS________NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind } ; IS________NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind }
; IS________NPM: attributes #[[ATTR3]] = { noreturn } ; IS________NPM: attributes #[[ATTR3]] = { noreturn }
; IS________NPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS________NPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS________NPM: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS________NPM: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS________NPM: attributes #[[ATTR6]] = { nounwind } ; IS________NPM: attributes #[[ATTR6]] = { nounwind }
;. ;.

llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll

Show First 20 Lines • Show All 705 Lines • ▼ Show 20 Lines
} }
;. ;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn } ; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync willreturn } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync willreturn }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind }
; CHECK: attributes #[[ATTR3]] = { noreturn } ; CHECK: attributes #[[ATTR3]] = { noreturn }
; CHECK: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR4:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #[[ATTR5]] = { nounwind } ; CHECK: attributes #[[ATTR5]] = { nounwind }
; CHECK: attributes #[[ATTR6]] = { nosync nounwind willreturn } ; CHECK: attributes #[[ATTR6]] = { nosync nounwind willreturn }
;. ;.

llvm/test/Transforms/Attributor/liveness.ll

Show First 20 Lines • Show All 2,545 Lines • ▼ Show 20 Lines
} }
; Verify we do not choke on the GEP in the unreachable block. ; Verify we do not choke on the GEP in the unreachable block.
@p = global i8 0 @p = global i8 0
define void @bad_gep() { define void @bad_gep() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@bad_gep ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@bad_gep
; NOT_CGSCC_NPM-SAME: () #[[ATTR9]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR11]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: [[N:%.*]] = alloca i8, align 1 ; NOT_CGSCC_NPM-NEXT: [[N:%.*]] = alloca i8, align 1
; NOT_CGSCC_NPM-NEXT: [[M:%.*]] = alloca i8, align 1 ; NOT_CGSCC_NPM-NEXT: [[M:%.*]] = alloca i8, align 1
; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR14:[0-9]+]] ; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR14:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: br label [[EXIT:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[EXIT:%.*]]
; NOT_CGSCC_NPM: while.body: ; NOT_CGSCC_NPM: while.body:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: if.end: ; NOT_CGSCC_NPM: if.end:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: exit: ; NOT_CGSCC_NPM: exit:
; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR14]] ; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR14]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bad_gep ; IS__CGSCC____-LABEL: define {{[^@]+}}@bad_gep
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[N:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[N:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: [[M:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[M:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR16:[0-9]+]] ; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR16:[0-9]+]]
; IS__CGSCC____-NEXT: br label [[EXIT:%.*]] ; IS__CGSCC____-NEXT: br label [[EXIT:%.*]]
; IS__CGSCC____: while.body: ; IS__CGSCC____: while.body:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { noreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { noreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { nosync readnone } ; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { nosync readnone }
; NOT_CGSCC_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nounwind willreturn uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nounwind willreturn uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse noreturn nosync nounwind readnone } ; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse noreturn nosync nounwind readnone }
; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR12:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR12:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR13]] = { nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR13]] = { nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR14]] = { willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR14]] = { willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { readnone } ; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { readnone }
; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR3]] = { noreturn nounwind } ; IS__CGSCC____: attributes #[[ATTR3]] = { noreturn nounwind }
; IS__CGSCC____: attributes #[[ATTR4]] = { noreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { noreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { nosync readnone } ; IS__CGSCC____: attributes #[[ATTR5]] = { nosync readnone }
; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nounwind willreturn uwtable } ; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nounwind willreturn uwtable }
; IS__CGSCC____: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone willreturn uwtable } ; IS__CGSCC____: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone willreturn uwtable }
; IS__CGSCC____: attributes #[[ATTR9]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR9]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR10]] = { nofree norecurse noreturn nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR10]] = { nofree norecurse noreturn nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR11]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR11]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR14:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR14:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR15]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR15]] = { nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR16]] = { willreturn } ; IS__CGSCC____: attributes #[[ATTR16]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/lvi-after-jumpthreading.ll

Show First 20 Lines • Show All 237 Lines • ▼ Show 20 Lines
declare i32 @exit() declare i32 @exit()
declare i32 @consume(i1) declare i32 @consume(i1)
declare void @llvm.assume(i1) nounwind declare void @llvm.assume(i1) nounwind
declare void @dummy(i1) nounwind declare void @dummy(i1) nounwind
declare void @llvm.experimental.guard(i1, ...) declare void @llvm.experimental.guard(i1, ...)
;. ;.
; IS________OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone } ; IS________OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone }
; IS________OPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS________OPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS________OPM: attributes #[[ATTR2]] = { nounwind } ; IS________OPM: attributes #[[ATTR2]] = { nounwind }
; IS________OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn } ; IS________OPM: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync willreturn }
;. ;.
; IS________NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS________NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS________NPM: attributes #[[ATTR2]] = { nounwind } ; IS________NPM: attributes #[[ATTR2]] = { nounwind }
; IS________NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn } ; IS________NPM: attributes #[[ATTR3:[0-9]+]] = { nocallback nofree nosync willreturn }
;. ;.

llvm/test/Transforms/Attributor/memory_locations.ll

Show First 20 Lines • Show All 391 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%unknown = call i8* @inaccesible_argmem_only_decl(i8* null) %unknown = call i8* @inaccesible_argmem_only_decl(i8* null)
store i8 0, i8* %unknown store i8 0, i8* %unknown
ret void ret void
} }
define void @callerE(i8* %arg) { define void @callerE(i8* %arg) {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@callerE ; CHECK-LABEL: define {{[^@]+}}@callerE
; CHECK-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) #[[ATTR5:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @llvm.lifetime.start.p0i8(i64 4, i8* %arg) call void @llvm.lifetime.start.p0i8(i64 4, i8* %arg)
ret void ret void
} }
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call void @argmemonly_before_ipconstprop(i32* @G) call void @argmemonly_before_ipconstprop(i32* @G)
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { inaccessiblememonly } ; IS__TUNIT____: attributes #[[ATTR0]] = { inaccessiblememonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly } ; IS__TUNIT____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly }
; IS__TUNIT____: attributes #[[ATTR2]] = { readnone } ; IS__TUNIT____: attributes #[[ATTR2]] = { readnone }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly }
; IS__TUNIT____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR11]] = { nofree nosync nounwind writeonly } ; IS__TUNIT____: attributes #[[ATTR11]] = { nofree nosync nounwind writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { inaccessiblememonly } ; IS__CGSCC____: attributes #[[ATTR0]] = { inaccessiblememonly }
; IS__CGSCC____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly } ; IS__CGSCC____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly }
; IS__CGSCC____: attributes #[[ATTR2]] = { readnone } ; IS__CGSCC____: attributes #[[ATTR2]] = { readnone }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly }
; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly } ; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly }
; IS__CGSCC____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR10]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR10]] = { nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR11]] = { nofree nosync nounwind writeonly } ; IS__CGSCC____: attributes #[[ATTR11]] = { nofree nosync nounwind writeonly }
; IS__CGSCC____: attributes #[[ATTR12]] = { nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR12]] = { nounwind readnone }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i8 0, i8 2} ; CHECK: [[META0:![0-9]+]] = !{i8 0, i8 2}
;. ;.

llvm/test/Transforms/Attributor/noalias.ll

Show First 20 Lines • Show All 908 Lines • ▼ Show 20 Lines
} }
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nounwind uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nounwind uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nounwind ssp uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nounwind ssp uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly }
; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind uwtable } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR3]] = { nounwind ssp uwtable } ; IS__CGSCC____: attributes #[[ATTR3]] = { nounwind ssp uwtable }
; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR6:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR10]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR10]] = { readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR11]] = { readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR11]] = { readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR12]] = { willreturn } ; IS__CGSCC____: attributes #[[ATTR12]] = { willreturn }
; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/nocapture-1.ll

Show All 28 Lines
; CHECK-NEXT: store i32* [[Q]], i32** @g, align 8 ; CHECK-NEXT: store i32* [[Q]], i32** @g, align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store i32* %q, i32** @g store i32* %q, i32** @g
ret void ret void
} }
define void @c3(i32* %q) { define void @c3(i32* %q) {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@c3 ; CHECK-LABEL: define {{[^@]+}}@c3
; IS__TUNIT____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR12:[0-9]+]] ; CHECK-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR16:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@c3
; IS__CGSCC____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR18:[0-9]+]]
; IS__CGSCC____-NEXT: ret void
; ;
call void @c2(i32* %q) call void @c2(i32* %q)
ret void ret void
} }
define i1 @c4(i32* %q, i32 %bitno) { define i1 @c4(i32* %q, i32 %bitno) {
; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@c4 ; CHECK-LABEL: define {{[^@]+}}@c4
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%tmp = ptrtoint i32* %q to i32 %tmp = ptrtoint i32* %q to i32
%tmp2 = lshr i32 %tmp, %bitno %tmp2 = lshr i32 %tmp, %bitno
%bit = and i32 %tmp2, 1 %bit = and i32 %tmp2, 1
%lookup = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 %bit %lookup = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 %bit
ret i1* %lookup ret i1* %lookup
} }
define i1 @c7(i32* %q, i32 %bitno) { define i1 @c7(i32* %q, i32 %bitno) {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@c7 ; CHECK-LABEL: define {{[^@]+}}@c7
; IS__TUNIT____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR18:[0-9]+]] ; CHECK-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR17:[0-9]+]]
; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1 ; CHECK-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1
; IS__TUNIT____-NEXT: ret i1 [[VAL]] ; CHECK-NEXT: ret i1 [[VAL]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@c7
; IS__CGSCC____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR19:[0-9]+]]
; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1
; IS__CGSCC____-NEXT: ret i1 [[VAL]]
; ;
%ptr = call i1* @lookup_bit(i32* %q, i32 %bitno) %ptr = call i1* @lookup_bit(i32* %q, i32 %bitno)
%val = load i1, i1* %ptr %val = load i1, i1* %ptr
ret i1 %val ret i1 %val
} }
define i32 @nc1(i32* %q, i32* %p, i1 %b) { define i32 @nc1(i32* %q, i32* %p, i1 %b) {
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store i32* %y, i32** @g store i32* %y, i32** @g
ret i32 %val ret i32 %val
} }
define void @nc2(i32* %p, i32* %q) { define void @nc2(i32* %p, i32* %q) {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nc2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@nc2
; IS__TUNIT____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 noundef false) #[[ATTR10:[0-9]+]] ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 noundef false) #[[ATTR18:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nc2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@nc2
; IS__CGSCC____-SAME: (i32* nocapture nofree align 4 [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree align 4 [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree align 4 [[P]], i1 noundef false) #[[ATTR15:[0-9]+]] ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree align 4 [[P]], i1 noundef false) #[[ATTR13:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0] %1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0]
ret void ret void
} }
define void @nc3(void ()* %p) { define void @nc3(void ()* %p) {
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; IS__TUNIT____-LABEL: define {{[^@]+}}@nc4 ; IS__TUNIT____-LABEL: define {{[^@]+}}@nc4
; IS__TUNIT____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR19:[0-9]+]] ; IS__TUNIT____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR19:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nounwind ; IS__CGSCC____: Function Attrs: argmemonly nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@nc4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@nc4
; IS__CGSCC____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR20:[0-9]+]] ; IS__CGSCC____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR18:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @external(i8* %p) call void @external(i8* %p)
ret void ret void
} }
define void @nc5(void (i8*)* %f, i8* %p) { define void @nc5(void (i8*)* %f, i8* %p) {
; CHECK-LABEL: define {{[^@]+}}@nc5 ; CHECK-LABEL: define {{[^@]+}}@nc5
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; ;
entry: entry:
%gep = getelementptr i32, i32* %x, i64 1 %gep = getelementptr i32, i32* %x, i64 1
store volatile i32 0, i32* %gep, align 4 store volatile i32 0, i32* %gep, align 4
ret void ret void
} }
define void @nocaptureLaunder(i8* %p) { define void @nocaptureLaunder(i8* %p) {
; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureLaunder ; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureLaunder
; IS__TUNIT____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR20:[0-9]+]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR20:[0-9]+]]
; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureLaunder ; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureLaunder
; IS__CGSCC____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR21:[0-9]+]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR19:[0-9]+]]
; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p)
store i8 42, i8* %b store i8 42, i8* %b
ret void ret void
} }
@g2 = global i8* null @g2 = global i8* null
define void @captureLaunder(i8* %p) { define void @captureLaunder(i8* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureLaunder ; IS__TUNIT____-LABEL: define {{[^@]+}}@captureLaunder
; IS__TUNIT____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR10]] { ; IS__TUNIT____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR20]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR20]]
; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g2, align 8 ; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g2, align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureLaunder ; IS__CGSCC____-LABEL: define {{[^@]+}}@captureLaunder
; IS__CGSCC____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR21]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR19]]
; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g2, align 8 ; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g2, align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p)
store i8* %b, i8** @g2 store i8* %b, i8** @g2
ret void ret void
} }
define void @nocaptureStrip(i8* %p) { define void @nocaptureStrip(i8* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureStrip ; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureStrip
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR11:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR21:[0-9]+]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR21:[0-9]+]]
; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureStrip ; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureStrip
; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR11:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR17]]
; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p)
store i8 42, i8* %b store i8 42, i8* %b
ret void ret void
} }
@g3 = global i8* null @g3 = global i8* null
define void @captureStrip(i8* %p) { define void @captureStrip(i8* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureStrip ; IS__TUNIT____-LABEL: define {{[^@]+}}@captureStrip
; IS__TUNIT____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR12]] { ; IS__TUNIT____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR21]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR21]]
; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g3, align 8 ; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g3, align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureStrip ; IS__CGSCC____-LABEL: define {{[^@]+}}@captureStrip
; IS__CGSCC____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR12:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR17]]
; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g3, align 8 ; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g3, align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p)
store i8* %b, i8** @g3 store i8* %b, i8** @g3
ret void ret void
} }
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%1 = bitcast i32* %x to i8* %1 = bitcast i32* %x to i8*
%2 = icmp eq i8* %1, null %2 = icmp eq i8* %1, null
ret i1 %2 ret i1 %2
} }
define i1 @captureDereferenceableOrNullICmp(i32* dereferenceable_or_null(4) %x) null_pointer_is_valid { define i1 @captureDereferenceableOrNullICmp(i32* dereferenceable_or_null(4) %x) null_pointer_is_valid {
; CHECK: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@captureDereferenceableOrNullICmp ; CHECK-LABEL: define {{[^@]+}}@captureDereferenceableOrNullICmp
; CHECK-SAME: (i32* nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR13:[0-9]+]] { ; CHECK-SAME: (i32* nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR11:[0-9]+]] {
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8* ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8*
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null
; CHECK-NEXT: ret i1 [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP2]]
; ;
%1 = bitcast i32* %x to i8* %1 = bitcast i32* %x to i8*
%2 = icmp eq i8* %1, null %2 = icmp eq i8* %1, null
ret i1 %2 ret i1 %2
} }
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declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind willreturn declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind willreturn
declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind willreturn declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind willreturn
declare void @val_use(i8 %ptr) readonly nounwind willreturn declare void @val_use(i8 %ptr) readonly nounwind willreturn
; FIXME: Both pointers should be nocapture ; FIXME: Both pointers should be nocapture
define void @ptr_uses(i8* %ptr, i8* %wptr) { define void @ptr_uses(i8* %ptr, i8* %wptr) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@ptr_uses ; CHECK-LABEL: define {{[^@]+}}@ptr_uses
; CHECK-SAME: (i8* [[PTR:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) #[[ATTR15:[0-9]+]] { ; CHECK-SAME: (i8* [[PTR:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) #[[ATTR13:[0-9]+]] {
; CHECK-NEXT: store i8 0, i8* [[WPTR]], align 1 ; CHECK-NEXT: store i8 0, i8* [[WPTR]], align 1
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr) %call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
%call_val = call i8 @maybe_returned_val(i8* %call_ptr) %call_val = call i8 @maybe_returned_val(i8* %call_ptr)
call void @val_use(i8 %call_val) call void @val_use(i8 %call_val)
store i8 0, i8* %wptr store i8 0, i8* %wptr
ret void ret void
} }
declare i8* @llvm.launder.invariant.group.p0i8(i8*) declare i8* @llvm.launder.invariant.group.p0i8(i8*)
declare i8* @llvm.strip.invariant.group.p0i8(i8*) declare i8* @llvm.strip.invariant.group.p0i8(i8*)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { readonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { readonly }
; IS__TUNIT____: attributes #[[ATTR4]] = { nounwind readonly } ; IS__TUNIT____: attributes #[[ATTR4]] = { nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nounwind } ; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nounwind }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR9]] = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR9]] = { inaccessiblemem_or_argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR10]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR12:[0-9]+]] = { nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR13]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR13]] = { nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR14:[0-9]+]] = { nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR14:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR15]] = { nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR15:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR16:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind speculatable willreturn } ; IS__TUNIT____: attributes #[[ATTR16]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__TUNIT____: attributes #[[ATTR17]] = { nofree nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR18]] = { nofree nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR18]] = { nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR19]] = { nounwind } ; IS__TUNIT____: attributes #[[ATTR19]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR20]] = { willreturn } ; IS__TUNIT____: attributes #[[ATTR20]] = { willreturn }
; IS__TUNIT____: attributes #[[ATTR21]] = { readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR21]] = { readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { readonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { readonly }
; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nounwind } ; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nounwind }
; IS__CGSCC____: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR9]] = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR9]] = { inaccessiblemem_or_argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR10]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR12:[0-9]+]] = { nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR13]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR14:[0-9]+]] = { nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR14:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind speculatable willreturn }
; IS__CGSCC____: attributes #[[ATTR15]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR15:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC____: attributes #[[ATTR16:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind speculatable willreturn } ; IS__CGSCC____: attributes #[[ATTR16]] = { nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC____: attributes #[[ATTR17]] = { readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR18]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR18]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR19]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR19]] = { willreturn }
; IS__CGSCC____: attributes #[[ATTR20]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR21]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/nofree.ll

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tail call void @maybe_free() tail call void @maybe_free()
tail call void @nofree_function() tail call void @nofree_function()
ret void ret void
} }
; TEST 10 (positive case) ; TEST 10 (positive case)
; Call intrinsic function ; Call intrinsic function
; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn ; CHECK: Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
; CHECK-NEXT: declare float @llvm.floor.f32(float) ; CHECK-NEXT: declare float @llvm.floor.f32(float)
declare float @llvm.floor.f32(float) declare float @llvm.floor.f32(float)
define void @call_floor(float %a) #0 { define void @call_floor(float %a) #0 {
; NOT_CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone willreturn uwtable
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_floor ; CHECK-LABEL: define {{[^@]+}}@call_floor
; NOT_CGSCC_NPM-SAME: (float [[A:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (float [[A:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_NPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_floor
; IS__CGSCC_NPM-SAME: (float [[A:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: ret void
; ;
tail call float @llvm.floor.f32(float %a) tail call float @llvm.floor.f32(float %a)
ret void ret void
} }
define float @call_floor2(float %a) #0 { define float @call_floor2(float %a) #0 {
; NOT_CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone willreturn uwtable
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_floor2 ; CHECK-LABEL: define {{[^@]+}}@call_floor2
; NOT_CGSCC_NPM-SAME: (float [[A:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (float [[A:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR11:[0-9]+]] ; CHECK-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR11:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: ret float [[C]] ; CHECK-NEXT: ret float [[C]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_floor2
; IS__CGSCC_NPM-SAME: (float [[A:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret float [[C]]
; ;
%c = tail call float @llvm.floor.f32(float %a) %c = tail call float @llvm.floor.f32(float %a)
ret float %c ret float %c
} }
; TEST 11 (positive case) ; TEST 11 (positive case)
; Check propagation. ; Check propagation.
▲ Show 20 Lines • Show All 167 Lines • ▼ Show 20 Lines
attributes #2 = { nobuiltin nounwind } attributes #2 = { nobuiltin nounwind }
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { noinline nounwind uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { noinline nounwind uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nobuiltin nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nobuiltin nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind readnone willreturn uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind readnone willreturn uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR5:[0-9]+]] = { nofree noinline nounwind readnone uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR5:[0-9]+]] = { nofree noinline nounwind readnone uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nofree nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nofree nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { noinline nounwind uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { noinline nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nobuiltin nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nobuiltin nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR4:[0-9]+]] = { nofree noinline nounwind readnone uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR4:[0-9]+]] = { nofree noinline nounwind readnone uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nofree noinline nosync nounwind readnone willreturn uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nofree noinline nosync nounwind readnone willreturn uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR11]] = { readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR12]] = { willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR12]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/nonnull.ll

Show All 25 Lines
; CHECK-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; CHECK-SAME: (i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: ret i8* [[P]] ; CHECK-NEXT: ret i8* [[P]]
; ;
ret i8* %p ret i8* %p
} }
define i8* @test2A(i1 %c, i8* %ret) { define i8* @test2A(i1 %c, i8* %ret) {
; NOT_CGSCC_NPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: inaccessiblememonly nofree norecurse nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test2A ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test2A
; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR2:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; NOT_CGSCC_NPM: A: ; NOT_CGSCC_NPM: A:
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12:[0-9]+]] [ "nonnull"(i8* [[RET]]) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13:[0-9]+]] [ "nonnull"(i8* [[RET]]) ]
; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]]
; NOT_CGSCC_NPM: B: ; NOT_CGSCC_NPM: B:
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "nonnull"(i8* [[RET]]) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13]] [ "nonnull"(i8* [[RET]]) ]
; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]]
; ;
; IS__CGSCC_NPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: inaccessiblememonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test2A ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test2A
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC_NPM: A: ; IS__CGSCC_NPM: A:
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11:[0-9]+]] [ "nonnull"(i8* [[RET]]) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12:[0-9]+]] [ "nonnull"(i8* [[RET]]) ]
; IS__CGSCC_NPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_NPM-NEXT: ret i8* [[RET]]
; IS__CGSCC_NPM: B: ; IS__CGSCC_NPM: B:
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "nonnull"(i8* [[RET]]) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "nonnull"(i8* [[RET]]) ]
; IS__CGSCC_NPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_NPM-NEXT: ret i8* [[RET]]
; ;
br i1 %c, label %A, label %B br i1 %c, label %A, label %B
A: A:
call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ] call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ]
ret i8* %ret ret i8* %ret
B: B:
call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ] call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ]
ret i8* %ret ret i8* %ret
} }
define i8* @test2B(i1 %c, i8* %ret) { define i8* @test2B(i1 %c, i8* %ret) {
; NOT_CGSCC_NPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: inaccessiblememonly nofree norecurse nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test2B ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test2B
; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0]] { ; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR2]] {
; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; NOT_CGSCC_NPM: A: ; NOT_CGSCC_NPM: A:
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]]
; NOT_CGSCC_NPM: B: ; NOT_CGSCC_NPM: B:
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_NPM-NEXT: ret i8* [[RET]]
; ;
; IS__CGSCC_NPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: inaccessiblememonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test2B ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test2B
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC_NPM: A: ; IS__CGSCC_NPM: A:
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; IS__CGSCC_NPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_NPM-NEXT: ret i8* [[RET]]
; IS__CGSCC_NPM: B: ; IS__CGSCC_NPM: B:
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; IS__CGSCC_NPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_NPM-NEXT: ret i8* [[RET]]
; ;
br i1 %c, label %A, label %B br i1 %c, label %A, label %B
A: A:
call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ] call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ]
ret i8* %ret ret i8* %ret
B: B:
call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ] call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ]
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
} }
; Given a mutual recursive set of functions, we can mark them ; Given a mutual recursive set of functions, we can mark them
; nonnull if neither can ever return null. (In this case, they ; nonnull if neither can ever return null. (In this case, they
; just never return period.) ; just never return period.)
define i8* @test4_helper() { define i8* @test4_helper() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test4_helper ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test4_helper
; NOT_CGSCC_NPM-SAME: () #[[ATTR2:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: ret i8* undef ; NOT_CGSCC_NPM-NEXT: ret i8* undef
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4_helper ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4_helper
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i8* undef ; IS__CGSCC_NPM-NEXT: ret i8* undef
; ;
%ret = call i8* @test4() %ret = call i8* @test4()
ret i8* %ret ret i8* %ret
} }
define i8* @test4() { define i8* @test4() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test4 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test4
; NOT_CGSCC_NPM-SAME: () #[[ATTR2]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR3]] {
; NOT_CGSCC_NPM-NEXT: ret i8* undef ; NOT_CGSCC_NPM-NEXT: ret i8* undef
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i8* undef ; IS__CGSCC_NPM-NEXT: ret i8* undef
; ;
%ret = call i8* @test4_helper() %ret = call i8* @test4_helper()
ret i8* %ret ret i8* %ret
} }
; Given a mutual recursive set of functions which *can* return null ; Given a mutual recursive set of functions which *can* return null
; make sure we haven't marked them as nonnull. ; make sure we haven't marked them as nonnull.
define i8* @test5_helper(i1 %c) { define i8* @test5_helper(i1 %c) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test5_helper ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test5_helper
; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR2]] { ; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; NOT_CGSCC_NPM: rec: ; NOT_CGSCC_NPM: rec:
; NOT_CGSCC_NPM-NEXT: br label [[END]] ; NOT_CGSCC_NPM-NEXT: br label [[END]]
; NOT_CGSCC_NPM: end: ; NOT_CGSCC_NPM: end:
; NOT_CGSCC_NPM-NEXT: ret i8* null ; NOT_CGSCC_NPM-NEXT: ret i8* null
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test5_helper ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test5_helper
Show All 10 Linesrec:
br label %end br label %end
end: end:
ret i8* null ret i8* null
} }
define i8* @test5(i1 %c) { define i8* @test5(i1 %c) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test5 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test5
; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR2]] { ; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_NPM-NEXT: ret i8* null ; NOT_CGSCC_NPM-NEXT: ret i8* null
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test5 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test5
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i8* null ; IS__CGSCC_NPM-NEXT: ret i8* null
; ;
%ret = call i8* @test5_helper(i1 %c) %ret = call i8* @test5_helper(i1 %c)
ret i8* %ret ret i8* %ret
} }
; Local analysis, but going through a self recursive phi ; Local analysis, but going through a self recursive phi
define i8* @test6a() { define i8* @test6a() {
; ;
; NOT_CGSCC_NPM: Function Attrs: noreturn ; NOT_CGSCC_NPM: Function Attrs: noreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test6a ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test6a
; NOT_CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR4:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: [[RET:%.*]] = call i8* @ret_nonnull() ; NOT_CGSCC_NPM-NEXT: [[RET:%.*]] = call i8* @ret_nonnull()
; NOT_CGSCC_NPM-NEXT: br label [[LOOP:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; NOT_CGSCC_NPM: loop: ; NOT_CGSCC_NPM: loop:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: exit: ; NOT_CGSCC_NPM: exit:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; ;
; IS__CGSCC_NPM: Function Attrs: noreturn ; IS__CGSCC_NPM: Function Attrs: noreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test6a ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test6a
; IS__CGSCC_NPM-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i8* @ret_nonnull() ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i8* @ret_nonnull()
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop: ; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: unreachable ; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: exit: ; IS__CGSCC_NPM: exit:
; IS__CGSCC_NPM-NEXT: unreachable ; IS__CGSCC_NPM-NEXT: unreachable
; ;
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; ;
%b = getelementptr inbounds i8, i8* %a, i64 %n %b = getelementptr inbounds i8, i8* %a, i64 %n
ret i8* %b ret i8* %b
} }
; ATTRIBUTOR_OPM: define i8* @test10 ; ATTRIBUTOR_OPM: define i8* @test10
; ATTRIBUTOR_NPM: define nonnull i8* @test10 ; ATTRIBUTOR_NPM: define nonnull i8* @test10
define i8* @test10(i8* %a, i64 %n) { define i8* @test10(i8* %a, i64 %n) {
; NOT_CGSCC_NPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: inaccessiblememonly nofree norecurse nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test10 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test10
; NOT_CGSCC_NPM-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR0]] { ; NOT_CGSCC_NPM-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR2]] {
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]] ; NOT_CGSCC_NPM-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; NOT_CGSCC_NPM-NEXT: ret i8* [[B]] ; NOT_CGSCC_NPM-NEXT: ret i8* [[B]]
; ;
; IS__CGSCC_NPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: inaccessiblememonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test10 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test10
; IS__CGSCC_NPM-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]]
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]] ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; IS__CGSCC_NPM-NEXT: ret i8* [[B]] ; IS__CGSCC_NPM-NEXT: ret i8* [[B]]
; ;
%cmp = icmp ne i64 %n, 0 %cmp = icmp ne i64 %n, 0
call void @llvm.assume(i1 %cmp) call void @llvm.assume(i1 %cmp)
%b = getelementptr inbounds i8, i8* %a, i64 %n %b = getelementptr inbounds i8, i8* %a, i64 %n
ret i8* %b ret i8* %b
} }
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; TEST 13 ; TEST 13
; Simple Argument Tests ; Simple Argument Tests
declare i8* @unknown() declare i8* @unknown()
define void @test13_helper() { define void @test13_helper() {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test13_helper() { ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test13_helper() {
; NOT_CGSCC_NPM-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull() ; NOT_CGSCC_NPM-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull()
; NOT_CGSCC_NPM-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown() ; NOT_CGSCC_NPM-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown()
; NOT_CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR4:[0-9]+]] ; NOT_CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR5:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13_helper() { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13_helper() {
; IS__CGSCC_NPM-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull() ; IS__CGSCC_NPM-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull()
; IS__CGSCC_NPM-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown() ; IS__CGSCC_NPM-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown()
; IS__CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR3:[0-9]+]] ; IS__CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%nonnullptr = tail call i8* @ret_nonnull() %nonnullptr = tail call i8* @ret_nonnull()
%maybenullptr = tail call i8* @unknown() %maybenullptr = tail call i8* @unknown()
tail call void @test13(i8* %nonnullptr, i8* %nonnullptr, i8* %maybenullptr) tail call void @test13(i8* %nonnullptr, i8* %nonnullptr, i8* %maybenullptr)
tail call void @test13(i8* %nonnullptr, i8* %maybenullptr, i8* %nonnullptr) tail call void @test13(i8* %nonnullptr, i8* %maybenullptr, i8* %nonnullptr)
ret void ret void
} }
define internal void @test13(i8* %a, i8* %b, i8* %c) { define internal void @test13(i8* %a, i8* %b, i8* %c) {
; ;
; NOT_CGSCC_NPM: Function Attrs: nounwind ; NOT_CGSCC_NPM: Function Attrs: nounwind
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test13 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test13
; NOT_CGSCC_NPM-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR4]] { ; NOT_CGSCC_NPM-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13
; IS__CGSCC_NPM-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR3]] { ; IS__CGSCC_NPM-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @use_i8_ptr(i8* %a) call void @use_i8_ptr(i8* %a)
call void @use_i8_ptr(i8* %b) call void @use_i8_ptr(i8* %b)
call void @use_i8_ptr(i8* %c) call void @use_i8_ptr(i8* %c)
ret void ret void
} }
Show All 10 Lines
; Then, f3(i32* %arg) -> @f3(i32* nonnull %arg) ; Then, f3(i32* %arg) -> @f3(i32* nonnull %arg)
; 4. We get nonnull in whole f1 call sites so f1(i32* %arg) -> @f1(i32* nonnull %arg) ; 4. We get nonnull in whole f1 call sites so f1(i32* %arg) -> @f1(i32* nonnull %arg)
define internal i32* @f1(i32* %arg) { define internal i32* @f1(i32* %arg) {
; FIXME: missing nonnull It should be nonnull @f1(i32* nonnull readonly %arg) ; FIXME: missing nonnull It should be nonnull @f1(i32* nonnull readonly %arg)
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f1 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f1
; NOT_CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR5:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR6:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: bb: ; NOT_CGSCC_NPM-NEXT: bb:
; NOT_CGSCC_NPM-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null ; NOT_CGSCC_NPM-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null
; NOT_CGSCC_NPM-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]]
; NOT_CGSCC_NPM: bb1: ; NOT_CGSCC_NPM: bb1:
; NOT_CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4 ; NOT_CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4
; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0 ; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
; NOT_CGSCC_NPM: bb4: ; NOT_CGSCC_NPM: bb4:
; NOT_CGSCC_NPM-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1 ; NOT_CGSCC_NPM-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1
; NOT_CGSCC_NPM-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR13:[0-9]+]] ; NOT_CGSCC_NPM-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR14:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1 ; NOT_CGSCC_NPM-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1
; NOT_CGSCC_NPM-NEXT: br label [[BB9]] ; NOT_CGSCC_NPM-NEXT: br label [[BB9]]
; NOT_CGSCC_NPM: bb6: ; NOT_CGSCC_NPM: bb6:
; NOT_CGSCC_NPM-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR13]] ; NOT_CGSCC_NPM-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR14]]
; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP7]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP7]]
; NOT_CGSCC_NPM: bb9: ; NOT_CGSCC_NPM: bb9:
; NOT_CGSCC_NPM-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ] ; NOT_CGSCC_NPM-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ]
; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP10]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP10]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null
; IS__CGSCC_NPM-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]]
; IS__CGSCC_NPM: bb1: ; IS__CGSCC_NPM: bb1:
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0 ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
; IS__CGSCC_NPM: bb4: ; IS__CGSCC_NPM: bb4:
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1 ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1
; IS__CGSCC_NPM-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR12:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR13:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1 ; IS__CGSCC_NPM-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1
; IS__CGSCC_NPM-NEXT: br label [[BB9]] ; IS__CGSCC_NPM-NEXT: br label [[BB9]]
; IS__CGSCC_NPM: bb6: ; IS__CGSCC_NPM: bb6:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: ret i32* [[TMP7]] ; IS__CGSCC_NPM-NEXT: ret i32* [[TMP7]]
; IS__CGSCC_NPM: bb9: ; IS__CGSCC_NPM: bb9:
; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ]
; IS__CGSCC_NPM-NEXT: ret i32* [[TMP10]] ; IS__CGSCC_NPM-NEXT: ret i32* [[TMP10]]
; ;
bb: bb:
%tmp = icmp eq i32* %arg, null %tmp = icmp eq i32* %arg, null
Show All 17 Lines
bb9: ; preds = %bb4, %bb bb9: ; preds = %bb4, %bb
%tmp10 = phi i32* [ %tmp5c, %bb4 ], [ inttoptr (i64 4 to i32*), %bb ] %tmp10 = phi i32* [ %tmp5c, %bb4 ], [ inttoptr (i64 4 to i32*), %bb ]
ret i32* %tmp10 ret i32* %tmp10
} }
define internal i32* @f2(i32* %arg) { define internal i32* @f2(i32* %arg) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f2
; NOT_CGSCC_NPM-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR5]] { ; NOT_CGSCC_NPM-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR6]] {
; NOT_CGSCC_NPM-NEXT: bb: ; NOT_CGSCC_NPM-NEXT: bb:
; NOT_CGSCC_NPM-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR13]] ; NOT_CGSCC_NPM-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR14]]
; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f2
; IS__CGSCC_NPM-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR4]] { ; IS__CGSCC_NPM-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: ret i32* [[TMP]] ; IS__CGSCC_NPM-NEXT: ret i32* [[TMP]]
; ;
bb: bb:
%tmp = tail call i32* @f1(i32* %arg) %tmp = tail call i32* @f1(i32* %arg)
ret i32* %tmp ret i32* %tmp
} }
define dso_local noalias i32* @f3(i32* %arg) { define dso_local noalias i32* @f3(i32* %arg) {
; FIXME: missing nonnull. It should be nonnull @f3(i32* nonnull readonly %arg) ; FIXME: missing nonnull. It should be nonnull @f3(i32* nonnull readonly %arg)
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f3 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f3
; NOT_CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR5]] { ; NOT_CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR6]] {
; NOT_CGSCC_NPM-NEXT: bb: ; NOT_CGSCC_NPM-NEXT: bb:
; NOT_CGSCC_NPM-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR13]] ; NOT_CGSCC_NPM-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR14]]
; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[TMP]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f3 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f3
; IS__CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4]] { ; IS__CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: ret i32* [[TMP]] ; IS__CGSCC_NPM-NEXT: ret i32* [[TMP]]
; ;
bb: bb:
; FIXME: missing nonnull. It should be @f1(i32* nonnull readonly %arg) ; FIXME: missing nonnull. It should be @f1(i32* nonnull readonly %arg)
%tmp = call i32* @f1(i32* %arg) %tmp = call i32* @f1(i32* %arg)
ret i32* %tmp ret i32* %tmp
} }
Show All 17 Lines
; if(..) ; if(..)
; fun2(nonnull %a, nonnull %b) ; fun2(nonnull %a, nonnull %b)
; else ; else
; fun2(nonnull %a, %b) ; fun2(nonnull %a, %b)
; We can say that %a is nonnull but %b is not. ; We can say that %a is nonnull but %b is not.
define void @f16(i8* %a, i8 * %b, i8 %c) { define void @f16(i8* %a, i8 * %b, i8 %c) {
; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f16 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f16
; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR6:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR7:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; NOT_CGSCC_NPM: if.else: ; NOT_CGSCC_NPM: if.else:
; NOT_CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f16 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f16
; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; IS__CGSCC_NPM: if.else: ; IS__CGSCC_NPM: if.else:
; IS__CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%cmp = icmp eq i8 %c, 0 %cmp = icmp eq i8 %c, 0
br i1 %cmp, label %if.then, label %if.else br i1 %cmp, label %if.then, label %if.else
if.then: if.then:
tail call void @fun2(i8* nonnull %a, i8* nonnull %b) tail call void @fun2(i8* nonnull %a, i8* nonnull %b)
ret void ret void
if.else: if.else:
tail call void @fun2(i8* nonnull %a, i8* %b) tail call void @fun2(i8* nonnull %a, i8* %b)
ret void ret void
} }
; TEST 17 explore child BB test ; TEST 17 explore child BB test
; if(..) ; if(..)
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; else ; else
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; fun1(nonnull %a) ; fun1(nonnull %a)
; We can say that %a is nonnull ; We can say that %a is nonnull
define void @f17(i8* %a, i8 %c) { define void @f17(i8* %a, i8 %c) {
; ;
; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f17 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f17
; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR6]] { ; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: br label [[CONT:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[CONT:%.*]]
; NOT_CGSCC_NPM: if.else: ; NOT_CGSCC_NPM: if.else:
; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: br label [[CONT]] ; NOT_CGSCC_NPM-NEXT: br label [[CONT]]
; NOT_CGSCC_NPM: cont: ; NOT_CGSCC_NPM: cont:
; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f17 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f17
; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[CONT:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[CONT:%.*]]
; IS__CGSCC_NPM: if.else: ; IS__CGSCC_NPM: if.else:
; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[CONT]] ; IS__CGSCC_NPM-NEXT: br label [[CONT]]
; IS__CGSCC_NPM: cont: ; IS__CGSCC_NPM: cont:
; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%cmp = icmp eq i8 %c, 0 %cmp = icmp eq i8 %c, 0
br i1 %cmp, label %if.then, label %if.else br i1 %cmp, label %if.then, label %if.else
if.then: if.then:
tail call void @fun0() tail call void @fun0()
br label %cont br label %cont
if.else: if.else:
Show All 12 Lines
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; else ; else
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; fun1(nonnull %a) ; fun1(nonnull %a)
define void @f18(i8* %a, i8* %b, i8 %c) { define void @f18(i8* %a, i8* %b, i8 %c) {
; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f18 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f18
; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR6]] { ; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: br label [[CONT:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[CONT:%.*]]
; NOT_CGSCC_NPM: if.else: ; NOT_CGSCC_NPM: if.else:
; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: br label [[CONT]] ; NOT_CGSCC_NPM-NEXT: br label [[CONT]]
; NOT_CGSCC_NPM: cont: ; NOT_CGSCC_NPM: cont:
; NOT_CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1 ; NOT_CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1
; NOT_CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]]
; NOT_CGSCC_NPM: cont.then: ; NOT_CGSCC_NPM: cont.then:
; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: br label [[CONT2:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[CONT2:%.*]]
; NOT_CGSCC_NPM: cont.else: ; NOT_CGSCC_NPM: cont.else:
; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: br label [[CONT2]] ; NOT_CGSCC_NPM-NEXT: br label [[CONT2]]
; NOT_CGSCC_NPM: cont2: ; NOT_CGSCC_NPM: cont2:
; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR6]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR7]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f18 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f18
; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0 ; IS__CGSCC_NPM-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[CONT:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[CONT:%.*]]
; IS__CGSCC_NPM: if.else: ; IS__CGSCC_NPM: if.else:
; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[CONT]] ; IS__CGSCC_NPM-NEXT: br label [[CONT]]
; IS__CGSCC_NPM: cont: ; IS__CGSCC_NPM: cont:
; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1 ; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1
; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]]
; IS__CGSCC_NPM: cont.then: ; IS__CGSCC_NPM: cont.then:
; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[CONT2:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[CONT2:%.*]]
; IS__CGSCC_NPM: cont.else: ; IS__CGSCC_NPM: cont.else:
; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[CONT2]] ; IS__CGSCC_NPM-NEXT: br label [[CONT2]]
; IS__CGSCC_NPM: cont2: ; IS__CGSCC_NPM: cont2:
; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%cmp1 = icmp eq i8 %c, 0 %cmp1 = icmp eq i8 %c, 0
br i1 %cmp1, label %if.then, label %if.else br i1 %cmp1, label %if.then, label %if.else
if.then: if.then:
tail call void @fun0() tail call void @fun0()
br label %cont br label %cont
if.else: if.else:
Show All 13 Linescont2:
ret void ret void
} }
; TEST 19: Loop ; TEST 19: Loop
define void @f19(i8* %a, i8* %b, i8 %c) { define void @f19(i8* %a, i8* %b, i8 %c) {
; NOT_CGSCC_NPM: Function Attrs: nounwind ; NOT_CGSCC_NPM: Function Attrs: nounwind
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f19 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f19
; NOT_CGSCC_NPM-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR4]] { ; NOT_CGSCC_NPM-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_NPM-NEXT: br label [[LOOP_HEADER:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[LOOP_HEADER:%.*]]
; NOT_CGSCC_NPM: loop.header: ; NOT_CGSCC_NPM: loop.header:
; NOT_CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]]
; NOT_CGSCC_NPM: loop.body: ; NOT_CGSCC_NPM: loop.body:
; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: br label [[LOOP_HEADER]] ; NOT_CGSCC_NPM-NEXT: br label [[LOOP_HEADER]]
; NOT_CGSCC_NPM: loop.exit: ; NOT_CGSCC_NPM: loop.exit:
; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f19 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f19
; IS__CGSCC_NPM-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR3]] { ; IS__CGSCC_NPM-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: br label [[LOOP_HEADER:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[LOOP_HEADER:%.*]]
; IS__CGSCC_NPM: loop.header: ; IS__CGSCC_NPM: loop.header:
; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0 ; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]]
; IS__CGSCC_NPM: loop.body: ; IS__CGSCC_NPM: loop.body:
; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: br label [[LOOP_HEADER]] ; IS__CGSCC_NPM-NEXT: br label [[LOOP_HEADER]]
; IS__CGSCC_NPM: loop.exit: ; IS__CGSCC_NPM: loop.exit:
; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
br label %loop.header br label %loop.header
loop.header: loop.header:
%cmp2 = icmp eq i8 %c, 0 %cmp2 = icmp eq i8 %c, 0
br i1 %cmp2, label %loop.body, label %loop.exit br i1 %cmp2, label %loop.body, label %loop.exit
loop.body: loop.body:
tail call void @fun1(i8* nonnull %b) tail call void @fun1(i8* nonnull %b)
▲ Show 20 Lines • Show All 119 Lines • ▼ Show 20 Lines;
ret i8 %c ret i8 %c
} }
; The nonnull callsite is guaranteed to execute, so the argument must be nonnull throughout the parent. ; The nonnull callsite is guaranteed to execute, so the argument must be nonnull throughout the parent.
define i8 @parent7(i8* %a) { define i8 @parent7(i8* %a) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@parent7 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@parent7
; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]]) {
; NOT_CGSCC_NPM-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR14:[0-9]+]] ; NOT_CGSCC_NPM-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR15:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: call void @use1nonnull(i8* nonnull [[A]]) ; NOT_CGSCC_NPM-NEXT: call void @use1nonnull(i8* nonnull [[A]])
; NOT_CGSCC_NPM-NEXT: ret i8 [[RET]] ; NOT_CGSCC_NPM-NEXT: ret i8 [[RET]]
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@parent7 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@parent7
; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]]) { ; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]]) {
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR13:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR14:[0-9]+]]
; IS__CGSCC_NPM-NEXT: call void @use1nonnull(i8* nonnull [[A]]) ; IS__CGSCC_NPM-NEXT: call void @use1nonnull(i8* nonnull [[A]])
; IS__CGSCC_NPM-NEXT: ret i8 [[RET]] ; IS__CGSCC_NPM-NEXT: ret i8 [[RET]]
; ;
%ret = call i8 @use1safecall(i8* %a) %ret = call i8 @use1safecall(i8* %a)
call void @use1nonnull(i8* %a) call void @use1nonnull(i8* %a)
ret i8 %ret ret i8 %ret
} }
; Make sure that an invoke works similarly to a call. ; Make sure that an invoke works similarly to a call.
declare i32 @esfp(...) declare i32 @esfp(...)
define i1 @parent8(i8* %a, i8* %bogus1, i8* %b) personality i8* bitcast (i32 (...)* @esfp to i8*){ define i1 @parent8(i8* %a, i8* %bogus1, i8* %b) personality i8* bitcast (i32 (...)* @esfp to i8*){
; NOT_CGSCC_NPM: Function Attrs: nounwind ; NOT_CGSCC_NPM: Function Attrs: nounwind
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@parent8 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@parent8
; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR4]] personality i8* bitcast (i32 (...)* @esfp to i8*) { ; NOT_CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR5]] personality i8* bitcast (i32 (...)* @esfp to i8*) {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]]) ; NOT_CGSCC_NPM-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]])
; NOT_CGSCC_NPM-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]] ; NOT_CGSCC_NPM-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]]
; NOT_CGSCC_NPM: cont: ; NOT_CGSCC_NPM: cont:
; NOT_CGSCC_NPM-NEXT: ret i1 false ; NOT_CGSCC_NPM-NEXT: ret i1 false
; NOT_CGSCC_NPM: exc: ; NOT_CGSCC_NPM: exc:
; NOT_CGSCC_NPM-NEXT: [[LP:%.*]] = landingpad { i8*, i32 } ; NOT_CGSCC_NPM-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
; NOT_CGSCC_NPM-NEXT: filter [0 x i8*] zeroinitializer ; NOT_CGSCC_NPM-NEXT: filter [0 x i8*] zeroinitializer
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@parent8 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@parent8
; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @esfp to i8*) { ; IS__CGSCC_NPM-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR4]] personality i8* bitcast (i32 (...)* @esfp to i8*) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]]) ; IS__CGSCC_NPM-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]])
; IS__CGSCC_NPM-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]] ; IS__CGSCC_NPM-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]]
; IS__CGSCC_NPM: cont: ; IS__CGSCC_NPM: cont:
; IS__CGSCC_NPM-NEXT: ret i1 false ; IS__CGSCC_NPM-NEXT: ret i1 false
; IS__CGSCC_NPM: exc: ; IS__CGSCC_NPM: exc:
; IS__CGSCC_NPM-NEXT: [[LP:%.*]] = landingpad { i8*, i32 } ; IS__CGSCC_NPM-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
; IS__CGSCC_NPM-NEXT: filter [0 x i8*] zeroinitializer ; IS__CGSCC_NPM-NEXT: filter [0 x i8*] zeroinitializer
Show All 24 Lines;
%q = getelementptr inbounds i32, i32* %p, i32 1 %q = getelementptr inbounds i32, i32* %p, i32 1
ret i32* %q ret i32* %q
} }
define i32* @gep1_no_null_opt(i32* %p) #0 { define i32* @gep1_no_null_opt(i32* %p) #0 {
; Should't be able to derive nonnull based on gep. ; Should't be able to derive nonnull based on gep.
; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@gep1_no_null_opt ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@gep1_no_null_opt
; NOT_CGSCC_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR8:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1 ; NOT_CGSCC_NPM-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; NOT_CGSCC_NPM-NEXT: ret i32* [[Q]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[Q]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@gep1_no_null_opt ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@gep1_no_null_opt
; IS__CGSCC_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1 ; IS__CGSCC_NPM-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; IS__CGSCC_NPM-NEXT: ret i32* [[Q]] ; IS__CGSCC_NPM-NEXT: ret i32* [[Q]]
; ;
%q = getelementptr inbounds i32, i32* %p, i32 1 %q = getelementptr inbounds i32, i32* %p, i32 1
ret i32* %q ret i32* %q
} }
define i32 addrspace(3)* @gep2(i32 addrspace(3)* %p) { define i32 addrspace(3)* @gep2(i32 addrspace(3)* %p) {
Show All 36 Lines;
%c = call i32* @g2() %c = call i32* @g2()
ret i32* %c ret i32* %c
} }
declare void @use_i32_ptr(i32* readnone nocapture) nounwind declare void @use_i32_ptr(i32* readnone nocapture) nounwind
define internal void @called_by_weak(i32* %a) { define internal void @called_by_weak(i32* %a) {
; NOT_CGSCC_NPM: Function Attrs: nounwind ; NOT_CGSCC_NPM: Function Attrs: nounwind
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@called_by_weak ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@called_by_weak
; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR4]] { ; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@called_by_weak ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@called_by_weak
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR3]] { ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Check we do not annotate the function interface of this weak function. ; Check we do not annotate the function interface of this weak function.
define weak_odr void @weak_caller(i32* nonnull %a) { define weak_odr void @weak_caller(i32* nonnull %a) {
; ;
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@weak_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@weak_caller
; NOT_CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]]) {
; NOT_CGSCC_NPM-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@weak_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@weak_caller
; IS__CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]]) {
; IS__CGSCC_NPM-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @called_by_weak(i32* %a) call void @called_by_weak(i32* %a)
ret void ret void
} }
; Expect nonnull ; Expect nonnull
define internal void @control(i32* dereferenceable(4) %a) { define internal void @control(i32* dereferenceable(4) %a) {
; NOT_CGSCC_NPM: Function Attrs: nounwind ; NOT_CGSCC_NPM: Function Attrs: nounwind
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@control ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@control
; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR4]] { ; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@control ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@control
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] { ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Avoid nonnull as we do not touch naked functions ; Avoid nonnull as we do not touch naked functions
define internal void @naked(i32* dereferenceable(4) %a) naked { define internal void @naked(i32* dereferenceable(4) %a) naked {
; NOT_CGSCC_NPM: Function Attrs: naked ; NOT_CGSCC_NPM: Function Attrs: naked
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@naked ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@naked
; NOT_CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR9:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR10:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]]) ; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]])
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: naked ; IS__CGSCC_NPM: Function Attrs: naked
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@naked ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@naked
; IS__CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]]) ; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Avoid nonnull as we do not touch optnone ; Avoid nonnull as we do not touch optnone
define internal void @optnone(i32* dereferenceable(4) %a) optnone noinline { define internal void @optnone(i32* dereferenceable(4) %a) optnone noinline {
; ;
; NOT_CGSCC_NPM: Function Attrs: noinline optnone ; NOT_CGSCC_NPM: Function Attrs: noinline optnone
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@optnone ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@optnone
; NOT_CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR10:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR11:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]]) ; NOT_CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]])
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: noinline optnone ; IS__CGSCC_NPM: Function Attrs: noinline optnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@optnone ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@optnone
; IS__CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]]) ; IS__CGSCC_NPM-NEXT: call void @use_i32_ptr(i32* [[A]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
define void @make_live(i32* nonnull dereferenceable(8) %a) { define void @make_live(i32* nonnull dereferenceable(8) %a) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@make_live ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@make_live
; NOT_CGSCC_NPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) {
; NOT_CGSCC_NPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]]) ; NOT_CGSCC_NPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; NOT_CGSCC_NPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]]) ; NOT_CGSCC_NPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@make_live ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@make_live
; IS__CGSCC_NPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) {
; IS__CGSCC_NPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]]) ; IS__CGSCC_NPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; IS__CGSCC_NPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]]) ; IS__CGSCC_NPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @naked(i32* nonnull dereferenceable(8) align 16 %a) call void @naked(i32* nonnull dereferenceable(8) align 16 %a)
call void @control(i32* nonnull dereferenceable(8) align 16 %a) call void @control(i32* nonnull dereferenceable(8) align 16 %a)
call void @optnone(i32* nonnull dereferenceable(8) align 16 %a) call void @optnone(i32* nonnull dereferenceable(8) align 16 %a)
ret void ret void
} }
;int f(int *u, int n){ ;int f(int *u, int n){
; for(int i = 0;i<n;i++){ ; for(int i = 0;i<n;i++){
; h(u); ; h(u);
; } ; }
; return g(nonnull u); ; return g(nonnull u);
;} ;}
declare void @h(i32*) willreturn nounwind declare void @h(i32*) willreturn nounwind
declare i32 @g(i32*) willreturn nounwind declare i32 @g(i32*) willreturn nounwind
define i32 @nonnull_exec_ctx_1(i32* %a, i32 %b) { define i32 @nonnull_exec_ctx_1(i32* %a, i32 %b) {
; ;
; IS________OPM: Function Attrs: nounwind ; IS________OPM: Function Attrs: nounwind
; IS________OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1 ; IS________OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; IS________OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR4]] { ; IS________OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] {
; IS________OPM-NEXT: en: ; IS________OPM-NEXT: en:
; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS________OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS________OPM: ex: ; IS________OPM: ex:
; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]] ; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]]
; IS________OPM-NEXT: ret i32 [[TMP5]] ; IS________OPM-NEXT: ret i32 [[TMP5]]
; IS________OPM: hd: ; IS________OPM: hd:
; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS________OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR4]] ; IS________OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]]
; IS________OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS________OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS________OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS________OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__TUNIT_NPM: Function Attrs: nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; IS__TUNIT_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] { ; IS__TUNIT_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; IS__TUNIT_NPM-NEXT: en: ; IS__TUNIT_NPM-NEXT: en:
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__TUNIT_NPM: ex: ; IS__TUNIT_NPM: ex:
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR6]] ; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR7]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP5]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP5]]
; IS__TUNIT_NPM: hd: ; IS__TUNIT_NPM: hd:
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS__TUNIT_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR6]] ; IS__TUNIT_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR7]]
; IS__TUNIT_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS__TUNIT_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__TUNIT_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS__TUNIT_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__TUNIT_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS__TUNIT_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; IS__CGSCC_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: en: ; IS__CGSCC_NPM-NEXT: en:
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_NPM: ex: ; IS__CGSCC_NPM: ex:
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_NPM: hd: ; IS__CGSCC_NPM: hd:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
br i1 %tmp3, label %ex, label %hd br i1 %tmp3, label %ex, label %hd
ex: ex:
%tmp5 = tail call i32 @g(i32* nonnull %a) %tmp5 = tail call i32 @g(i32* nonnull %a)
ret i32 %tmp5 ret i32 %tmp5
hd: hd:
%tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ] %tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ]
tail call void @h(i32* %a) tail call void @h(i32* %a)
%tmp8 = add nuw i32 %tmp7, 1 %tmp8 = add nuw i32 %tmp7, 1
%tmp9 = icmp eq i32 %tmp8, %b %tmp9 = icmp eq i32 %tmp8, %b
br i1 %tmp9, label %ex, label %hd br i1 %tmp9, label %ex, label %hd
} }
define i32 @nonnull_exec_ctx_1b(i32* %a, i32 %b) { define i32 @nonnull_exec_ctx_1b(i32* %a, i32 %b) {
; ;
; IS________OPM: Function Attrs: nounwind ; IS________OPM: Function Attrs: nounwind
; IS________OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b ; IS________OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; IS________OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR4]] { ; IS________OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] {
; IS________OPM-NEXT: en: ; IS________OPM-NEXT: en:
; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS________OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS________OPM: ex: ; IS________OPM: ex:
; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]] ; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]]
; IS________OPM-NEXT: ret i32 [[TMP5]] ; IS________OPM-NEXT: ret i32 [[TMP5]]
; IS________OPM: hd: ; IS________OPM: hd:
; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS________OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR4]] ; IS________OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]]
; IS________OPM-NEXT: br label [[HD2]] ; IS________OPM-NEXT: br label [[HD2]]
; IS________OPM: hd2: ; IS________OPM: hd2:
; IS________OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS________OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS________OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS________OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__TUNIT_NPM: Function Attrs: nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; IS__TUNIT_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] { ; IS__TUNIT_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; IS__TUNIT_NPM-NEXT: en: ; IS__TUNIT_NPM-NEXT: en:
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__TUNIT_NPM: ex: ; IS__TUNIT_NPM: ex:
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR6]] ; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR7]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP5]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP5]]
; IS__TUNIT_NPM: hd: ; IS__TUNIT_NPM: hd:
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS__TUNIT_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR6]] ; IS__TUNIT_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR7]]
; IS__TUNIT_NPM-NEXT: br label [[HD2]] ; IS__TUNIT_NPM-NEXT: br label [[HD2]]
; IS__TUNIT_NPM: hd2: ; IS__TUNIT_NPM: hd2:
; IS__TUNIT_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS__TUNIT_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__TUNIT_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS__TUNIT_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__TUNIT_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS__TUNIT_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; IS__CGSCC_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: en: ; IS__CGSCC_NPM-NEXT: en:
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_NPM: ex: ; IS__CGSCC_NPM: ex:
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_NPM: hd: ; IS__CGSCC_NPM: hd:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]] ; IS__CGSCC_NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: br label [[HD2]] ; IS__CGSCC_NPM-NEXT: br label [[HD2]]
; IS__CGSCC_NPM: hd2: ; IS__CGSCC_NPM: hd2:
; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
Show All 13 Lineshd2:
%tmp9 = icmp eq i32 %tmp8, %b %tmp9 = icmp eq i32 %tmp8, %b
br i1 %tmp9, label %ex, label %hd br i1 %tmp9, label %ex, label %hd
} }
define i32 @nonnull_exec_ctx_2(i32* %a, i32 %b) willreturn nounwind { define i32 @nonnull_exec_ctx_2(i32* %a, i32 %b) willreturn nounwind {
; ;
; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2
; NOT_CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] { ; NOT_CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: en: ; NOT_CGSCC_NPM-NEXT: en:
; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; NOT_CGSCC_NPM: ex: ; NOT_CGSCC_NPM: ex:
; NOT_CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret i32 [[TMP5]] ; NOT_CGSCC_NPM-NEXT: ret i32 [[TMP5]]
; NOT_CGSCC_NPM: hd: ; NOT_CGSCC_NPM: hd:
; NOT_CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; NOT_CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; NOT_CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; NOT_CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; NOT_CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; NOT_CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; NOT_CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2
; IS__CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: en: ; IS__CGSCC_NPM-NEXT: en:
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_NPM: ex: ; IS__CGSCC_NPM: ex:
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_NPM: hd: ; IS__CGSCC_NPM: hd:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
br i1 %tmp3, label %ex, label %hd br i1 %tmp3, label %ex, label %hd
ex: ex:
%tmp5 = tail call i32 @g(i32* nonnull %a) %tmp5 = tail call i32 @g(i32* nonnull %a)
ret i32 %tmp5 ret i32 %tmp5
hd: hd:
%tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ] %tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ]
tail call void @h(i32* %a) tail call void @h(i32* %a)
%tmp8 = add nuw i32 %tmp7, 1 %tmp8 = add nuw i32 %tmp7, 1
%tmp9 = icmp eq i32 %tmp8, %b %tmp9 = icmp eq i32 %tmp8, %b
br i1 %tmp9, label %ex, label %hd br i1 %tmp9, label %ex, label %hd
} }
define i32 @nonnull_exec_ctx_2b(i32* %a, i32 %b) willreturn nounwind { define i32 @nonnull_exec_ctx_2b(i32* %a, i32 %b) willreturn nounwind {
; ;
; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b
; NOT_CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] { ; NOT_CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: en: ; NOT_CGSCC_NPM-NEXT: en:
; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; NOT_CGSCC_NPM: ex: ; NOT_CGSCC_NPM: ex:
; NOT_CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret i32 [[TMP5]] ; NOT_CGSCC_NPM-NEXT: ret i32 [[TMP5]]
; NOT_CGSCC_NPM: hd: ; NOT_CGSCC_NPM: hd:
; NOT_CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; NOT_CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; NOT_CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: br label [[HD2]] ; NOT_CGSCC_NPM-NEXT: br label [[HD2]]
; NOT_CGSCC_NPM: hd2: ; NOT_CGSCC_NPM: hd2:
; NOT_CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; NOT_CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; NOT_CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; NOT_CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; NOT_CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b
; IS__CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: en: ; IS__CGSCC_NPM-NEXT: en:
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_NPM: ex: ; IS__CGSCC_NPM: ex:
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_NPM: hd: ; IS__CGSCC_NPM: hd:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: br label [[HD2]] ; IS__CGSCC_NPM-NEXT: br label [[HD2]]
; IS__CGSCC_NPM: hd2: ; IS__CGSCC_NPM: hd2:
; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS__CGSCC_NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
▲ Show 20 Lines • Show All 127 Lines • ▼ Show 20 Lines
} }
declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly willreturn declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly willreturn
; We should not mark the return of @strrchr as `nonnull`, it may well be NULL! ; We should not mark the return of @strrchr as `nonnull`, it may well be NULL!
define i8* @mybasename(i8* nofree readonly %str) { define i8* @mybasename(i8* nofree readonly %str) {
; NOT_CGSCC_NPM: Function Attrs: nofree nounwind readonly willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nounwind readonly willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@mybasename ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@mybasename
; NOT_CGSCC_NPM-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR11:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR12:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR14]] ; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR15]]
; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null ; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
; NOT_CGSCC_NPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1 ; NOT_CGSCC_NPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1
; NOT_CGSCC_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]] ; NOT_CGSCC_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]]
; NOT_CGSCC_NPM-NEXT: ret i8* [[COND]] ; NOT_CGSCC_NPM-NEXT: ret i8* [[COND]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nounwind readonly willreturn ; IS__CGSCC_NPM: Function Attrs: nofree nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@mybasename ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@mybasename
; IS__CGSCC_NPM-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR13]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR14]]
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null ; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
; IS__CGSCC_NPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1 ; IS__CGSCC_NPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1
; IS__CGSCC_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]] ; IS__CGSCC_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]]
; IS__CGSCC_NPM-NEXT: ret i8* [[COND]] ; IS__CGSCC_NPM-NEXT: ret i8* [[COND]]
; ;
%call = call i8* @strrchr(i8* %str, i32 47) %call = call i8* @strrchr(i8* %str, i32 47)
%tobool = icmp ne i8* %call, null %tobool = icmp ne i8* %call, null
%add.ptr = getelementptr inbounds i8, i8* %call, i64 1 %add.ptr = getelementptr inbounds i8, i8* %call, i64 1
%cond = select i1 %tobool, i8* %add.ptr, i8* %str %cond = select i1 %tobool, i8* %add.ptr, i8* %str
ret i8* %cond ret i8* %cond
} }
define void @nonnull_assume_pos(i8* %arg) { define void @nonnull_assume_pos(i8* %arg) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) {
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "nonnull"(i8* [[ARG]]) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13]] [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; NOT_CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) { ; IS__CGSCC_NPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) {
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "nonnull"(i8* [[ARG]]) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call i8* @unknown() call i8* @unknown()
ret void ret void
} }
Show All 9 Lines
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; ;
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_neg ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_neg
; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) {
; NOT_CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; NOT_CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: [[TMP2:%.*]] = call i8* @unknown() ; NOT_CGSCC_NPM-NEXT: [[TMP2:%.*]] = call i8* @unknown()
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ] ; NOT_CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR5]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_neg ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nonnull_assume_neg
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) { ; IS__CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) {
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = call i8* @unknown() ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = call i8* @unknown()
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ] ; IS__CGSCC_NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; IS__CGSCC_NPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call i8* @unknown() call i8* @unknown()
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call i8* @unknown() call i8* @unknown()
call void @use_i8_ptr_ret(i8* %arg) call void @use_i8_ptr_ret(i8* %arg)
Show All 36 Lines;
ret void ret void
} }
declare void @nonnull_callee(i8* nonnull %p) declare void @nonnull_callee(i8* nonnull %p)
attributes #0 = { null_pointer_is_valid } attributes #0 = { null_pointer_is_valid }
attributes #1 = { nounwind willreturn} attributes #1 = { nounwind willreturn}
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { inaccessiblememonly nofree norecurse nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { noreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nofree nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { noreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind readonly } ; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR6]] = { nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR6]] = { argmemonly nofree nosync nounwind readonly }
; NOT_CGSCC_NPM: attributes #[[ATTR7:[0-9]+]] = { nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { naked } ; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { noinline optnone } ; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { naked }
; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { nofree nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { noinline optnone }
; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { nofree nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR13]] = { nofree nosync nounwind readonly } ; NOT_CGSCC_NPM: attributes #[[ATTR13]] = { willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR14]] = { readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR14]] = { nofree nosync nounwind readonly }
; NOT_CGSCC_NPM: attributes #[[ATTR15]] = { readonly willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { noreturn } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { inaccessiblememonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { noreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind readonly } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind readonly }
; IS__CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { nounwind readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR7:[0-9]+]] = { nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { naked } ; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { noinline optnone } ; IS__CGSCC_NPM: attributes #[[ATTR9]] = { naked }
; IS__CGSCC_NPM: attributes #[[ATTR10]] = { nofree nounwind readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR10]] = { noinline optnone }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR11]] = { nofree nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind readonly } ; IS__CGSCC_NPM: attributes #[[ATTR12]] = { willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR13]] = { readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR13]] = { nofree nosync nounwind readonly }
; IS__CGSCC_NPM: attributes #[[ATTR14]] = { readonly willreturn }
;. ;.

llvm/test/Transforms/Attributor/nosync.ll

Show First 20 Lines • Show All 438 Lines • ▼ Show 20 Lines;
ret void ret void
} }
declare float @llvm.cos(float %val) readnone declare float @llvm.cos(float %val) readnone
; TEST 19 - positive, readnone & non-convergent intrinsic. ; TEST 19 - positive, readnone & non-convergent intrinsic.
define i32 @cos_test(float %x) { define i32 @cos_test(float %x) {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@cos_test ; CHECK-LABEL: define {{[^@]+}}@cos_test
; CHECK-SAME: (float [[X:%.*]]) #[[ATTR15:[0-9]+]] { ; CHECK-SAME: (float [[X:%.*]]) #[[ATTR15:[0-9]+]] {
; CHECK-NEXT: ret i32 4 ; CHECK-NEXT: ret i32 4
; ;
call float @llvm.cos(float %x) call float @llvm.cos(float %x)
ret i32 4 ret i32 4
} }
define float @cos_test2(float %x) { define float @cos_test2(float %x) {
; NOT_CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2
; NOT_CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR15]] { ; NOT_CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR15]] {
; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR21:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR21:[0-9]+]]
; NOT_CGSCC_OPM-NEXT: ret float [[C]] ; NOT_CGSCC_OPM-NEXT: ret float [[C]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2
; IS__CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR15]] { ; IS__CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR15]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR22:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR22:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret float [[C]] ; IS__CGSCC_OPM-NEXT: ret float [[C]]
; ;
%c = call float @llvm.cos(float %x) %c = call float @llvm.cos(float %x)
ret float %c ret float %c
} }
;. ;.
; NOT_CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp willreturn uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp willreturn uwtable }
; NOT_CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn uwtable }
; NOT_CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind willreturn uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind willreturn uwtable }
; NOT_CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable }
; NOT_CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; NOT_CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable }
; NOT_CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind }
; NOT_CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
; NOT_CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; NOT_CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; NOT_CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone } ; NOT_CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; NOT_CGSCC_OPM: attributes #[[ATTR13]] = { readnone } ; NOT_CGSCC_OPM: attributes #[[ATTR13]] = { readnone }
; NOT_CGSCC_OPM: attributes #[[ATTR14]] = { nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR14]] = { nounwind }
; NOT_CGSCC_OPM: attributes #[[ATTR15]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; NOT_CGSCC_OPM: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; NOT_CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR18]] = { nofree nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR18]] = { nofree nounwind }
; NOT_CGSCC_OPM: attributes #[[ATTR19]] = { willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR19]] = { willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR20]] = { willreturn writeonly } ; NOT_CGSCC_OPM: attributes #[[ATTR20]] = { willreturn writeonly }
; NOT_CGSCC_OPM: attributes #[[ATTR21]] = { readnone willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR21]] = { readnone willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone } ; IS__CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { readnone } ; IS__CGSCC_OPM: attributes #[[ATTR13]] = { readnone }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR18]] = { nofree nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR18]] = { nofree nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR19]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR19]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR20]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR20]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR21]] = { willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR21]] = { willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR22]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR22]] = { readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/openmp_parallel.ll

Show First 20 Lines • Show All 282 Lines • ▼ Show 20 Lines
!llvm.module.flags = !{!0} !llvm.module.flags = !{!0}
!0 = !{i32 7, !"openmp", i32 50} !0 = !{i32 7, !"openmp", i32 50}
!1 = !{!2} !1 = !{!2}
!2 = !{i64 2, i64 -1, i64 -1, i1 true} !2 = !{i64 2, i64 -1, i64 -1, i1 true}
;. ;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind uwtable } ; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind uwtable }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { alwaysinline nofree norecurse nounwind uwtable } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { alwaysinline nofree norecurse nounwind uwtable }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50} ; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50}
; CHECK: [[META1:![0-9]+]] = !{!2} ; CHECK: [[META1:![0-9]+]] = !{!2}
; CHECK: [[META2:![0-9]+]] = !{i64 2, i64 -1, i64 -1, i1 true} ; CHECK: [[META2:![0-9]+]] = !{i64 2, i64 -1, i64 -1, i1 true}
;. ;.

llvm/test/Transforms/Attributor/readattrs.ll

Show First 20 Lines • Show All 123 Lines • ▼ Show 20 Lines
} }
; CHECK: declare void @llvm.masked.scatter ; CHECK: declare void @llvm.masked.scatter
declare void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*>, i32, <4 x i1>) declare void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*>, i32, <4 x i1>)
; CHECK-NOT: readnone ; CHECK-NOT: readnone
; CHECK-NOT: readonly ; CHECK-NOT: readonly
define void @test9(<4 x i32*> %ptrs, <4 x i32>%val) { define void @test9(<4 x i32*> %ptrs, <4 x i32>%val) {
; CHECK: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; CHECK-LABEL: define {{[^@]+}}@test9 ; CHECK-LABEL: define {{[^@]+}}@test9
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]]) #[[ATTR4:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>) #[[ATTR11:[0-9]+]] ; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>) #[[ATTR12:[0-9]+]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>) call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>)
ret void ret void
} }
; CHECK: declare <4 x i32> @llvm.masked.gather ; CHECK: declare <4 x i32> @llvm.masked.gather
declare <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*>, i32, <4 x i1>, <4 x i32>) declare <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*>, i32, <4 x i1>, <4 x i32>)
define <4 x i32> @test10(<4 x i32*> %ptrs) { define <4 x i32> @test10(<4 x i32*> %ptrs) {
; CHECK: Function Attrs: nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; CHECK-LABEL: define {{[^@]+}}@test10 ; CHECK-LABEL: define {{[^@]+}}@test10
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR5:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR6:[0-9]+]] {
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef) #[[ATTR12:[0-9]+]] ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef) #[[ATTR13:[0-9]+]]
; CHECK-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef) %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef)
ret <4 x i32> %res ret <4 x i32> %res
} }
; CHECK: declare <4 x i32> @test11_1 ; CHECK: declare <4 x i32> @test11_1
declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly
define <4 x i32> @test11_2(<4 x i32*> %ptrs) { define <4 x i32> @test11_2(<4 x i32*> %ptrs) {
; CHECK: Function Attrs: argmemonly nounwind readonly ; CHECK: Function Attrs: argmemonly nounwind readonly
; CHECK-LABEL: define {{[^@]+}}@test11_2 ; CHECK-LABEL: define {{[^@]+}}@test11_2
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR6:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR7:[0-9]+]] {
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) #[[ATTR10:[0-9]+]] ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) #[[ATTR11:[0-9]+]]
; CHECK-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @test11_1(<4 x i32*> %ptrs) %res = call <4 x i32> @test11_1(<4 x i32*> %ptrs)
ret <4 x i32> %res ret <4 x i32> %res
} }
declare <4 x i32> @test12_1(<4 x i32*>) argmemonly nounwind declare <4 x i32> @test12_1(<4 x i32*>) argmemonly nounwind
; CHECK-NOT: readnone ; CHECK-NOT: readnone
define <4 x i32> @test12_2(<4 x i32*> %ptrs) { define <4 x i32> @test12_2(<4 x i32*> %ptrs) {
; CHECK: Function Attrs: argmemonly nounwind ; CHECK: Function Attrs: argmemonly nounwind
; CHECK-LABEL: define {{[^@]+}}@test12_2 ; CHECK-LABEL: define {{[^@]+}}@test12_2
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR7:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR8:[0-9]+]] {
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test12_1(<4 x i32*> [[PTRS]]) #[[ATTR13:[0-9]+]] ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test12_1(<4 x i32*> [[PTRS]]) #[[ATTR14:[0-9]+]]
; CHECK-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @test12_1(<4 x i32*> %ptrs) %res = call <4 x i32> @test12_1(<4 x i32*> %ptrs)
ret <4 x i32> %res ret <4 x i32> %res
} }
define i32 @volatile_load(i32* %p) { define i32 @volatile_load(i32* %p) {
; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@volatile_load ; CHECK-LABEL: define {{[^@]+}}@volatile_load
; CHECK-SAME: (i32* nofree noundef align 4 [[P:%.*]]) #[[ATTR8:[0-9]+]] { ; CHECK-SAME: (i32* nofree noundef align 4 [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; CHECK-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4 ; CHECK-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4
; CHECK-NEXT: ret i32 [[LOAD]] ; CHECK-NEXT: ret i32 [[LOAD]]
; ;
%load = load volatile i32, i32* %p %load = load volatile i32, i32* %p
ret i32 %load ret i32 %load
} }
declare void @escape_readnone_ptr(i8** %addr, i8* readnone %ptr) declare void @escape_readnone_ptr(i8** %addr, i8* readnone %ptr)
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @byval_not_readnone_1(i8* byval(i8) %written) readnone { define void @byval_not_readnone_1(i8* byval(i8) %written) readnone {
; CHECK: Function Attrs: readnone ; CHECK: Function Attrs: readnone
; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_1 ; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_1
; CHECK-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR9:[0-9]+]] { ; CHECK-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR10:[0-9]+]] {
; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]]) ; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @escape_i8(i8* %written) call void @escape_i8(i8* %written)
ret void ret void
} }
define void @byval_not_readnone_2(i8* byval(i8) %written) readnone { define void @byval_not_readnone_2(i8* byval(i8) %written) readnone {
Show All 18 Lines;
ret void ret void
} }
define void @testbyval(i8* %read_only) { define void @testbyval(i8* %read_only) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@testbyval ; IS__TUNIT____-LABEL: define {{[^@]+}}@testbyval
; IS__TUNIT____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]]) { ; IS__TUNIT____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]]) {
; IS__TUNIT____-NEXT: call void @byval_not_readonly_1(i8* nocapture readonly byval(i8) [[READ_ONLY]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: call void @byval_not_readonly_1(i8* nocapture readonly byval(i8) [[READ_ONLY]]) #[[ATTR2]]
; IS__TUNIT____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture readnone byval(i8) [[READ_ONLY]]) ; IS__TUNIT____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture readnone byval(i8) [[READ_ONLY]])
; IS__TUNIT____-NEXT: call void @byval_no_fnarg(i8* nocapture nofree readonly byval(i8) [[READ_ONLY]]) #[[ATTR14:[0-9]+]] ; IS__TUNIT____-NEXT: call void @byval_no_fnarg(i8* nocapture nofree readonly byval(i8) [[READ_ONLY]]) #[[ATTR15:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval ; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval
; IS__CGSCC____-SAME: (i8* nocapture noundef nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]]) { ; IS__CGSCC____-SAME: (i8* nocapture noundef nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]]) {
; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture noundef nonnull readonly byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture noundef nonnull readonly byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR2]]
; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]]) ; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]])
; IS__CGSCC____-NEXT: call void @byval_no_fnarg(i8* noalias nocapture nofree noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR14:[0-9]+]] ; IS__CGSCC____-NEXT: call void @byval_no_fnarg(i8* noalias nocapture nofree noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR15:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @byval_not_readonly_1(i8* byval(i8) %read_only) call void @byval_not_readonly_1(i8* byval(i8) %read_only)
call void @byval_not_readonly_2(i8* byval(i8) %read_only) call void @byval_not_readonly_2(i8* byval(i8) %read_only)
call void @byval_not_readnone_1(i8* byval(i8) %read_only) call void @byval_not_readnone_1(i8* byval(i8) %read_only)
call void @byval_not_readnone_2(i8* byval(i8) %read_only) call void @byval_not_readnone_2(i8* byval(i8) %read_only)
call void @byval_no_fnarg(i8* byval(i8) %read_only) call void @byval_no_fnarg(i8* byval(i8) %read_only)
ret void ret void
} }
;} ;}
declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind
declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind
declare void @val_use(i8 %ptr) readonly nounwind declare void @val_use(i8 %ptr) readonly nounwind
define void @ptr_uses(i8* %ptr) { define void @ptr_uses(i8* %ptr) {
; CHECK: Function Attrs: nounwind readonly ; CHECK: Function Attrs: nounwind readonly
; CHECK-LABEL: define {{[^@]+}}@ptr_uses ; CHECK-LABEL: define {{[^@]+}}@ptr_uses
; CHECK-SAME: (i8* nocapture readonly [[PTR:%.*]]) #[[ATTR10]] { ; CHECK-SAME: (i8* nocapture readonly [[PTR:%.*]]) #[[ATTR11]] {
; CHECK-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) #[[ATTR10]] ; CHECK-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) #[[ATTR11]]
; CHECK-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) #[[ATTR10]] ; CHECK-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) #[[ATTR11]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr) %call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
%call_val = call i8 @maybe_returned_val(i8* %call_ptr) %call_val = call i8 @maybe_returned_val(i8* %call_ptr)
call void @val_use(i8 %call_val) call void @val_use(i8 %call_val)
ret void ret void
} }
Show All 36 Lines;
%l = load i32, i32* @constant_mem %l = load i32, i32* @constant_mem
ret i32 %l ret i32 %l
} }
;. ;.
; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; CHECK: attributes #[[ATTR2]] = { readonly } ; CHECK: attributes #[[ATTR2]] = { readonly }
; CHECK: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR5]] = { nofree nosync nounwind readonly willreturn } ; CHECK: attributes #[[ATTR5:[0-9]+]] = { nocallback nofree nosync nounwind readonly willreturn }
; CHECK: attributes #[[ATTR6]] = { argmemonly nounwind readonly } ; CHECK: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readonly willreturn }
; CHECK: attributes #[[ATTR7]] = { argmemonly nounwind } ; CHECK: attributes #[[ATTR7]] = { argmemonly nounwind readonly }
; CHECK: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn } ; CHECK: attributes #[[ATTR8]] = { argmemonly nounwind }
; CHECK: attributes #[[ATTR9]] = { readnone } ; CHECK: attributes #[[ATTR9]] = { argmemonly nofree norecurse nounwind willreturn }
; CHECK: attributes #[[ATTR10]] = { nounwind readonly } ; CHECK: attributes #[[ATTR10]] = { readnone }
; CHECK: attributes #[[ATTR11]] = { willreturn writeonly } ; CHECK: attributes #[[ATTR11]] = { nounwind readonly }
; CHECK: attributes #[[ATTR12]] = { readonly willreturn } ; CHECK: attributes #[[ATTR12]] = { willreturn writeonly }
; CHECK: attributes #[[ATTR13]] = { nounwind } ; CHECK: attributes #[[ATTR13]] = { readonly willreturn }
; CHECK: attributes #[[ATTR14:[0-9]+]] = { nounwind writeonly } ; CHECK: attributes #[[ATTR14]] = { nounwind }
; CHECK: attributes #[[ATTR15:[0-9]+]] = { nounwind writeonly }
;. ;.

llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll

Show First 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
; r.f2 = s.f2 * 2; ; r.f2 = s.f2 * 2;
; r.f3 = s.f3 + s.f1; ; r.f3 = s.f3 + s.f1;
; r.i1 = s.i1; ; r.i1 = s.i1;
; r.i2 = s.i2 * 2; ; r.i2 = s.i2 * 2;
; r.i3 = s.i3 + s.i1; ; r.i3 = s.i3 + s.i1;
; return r; ; return r;
; } ; }
define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) { define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR14:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR12:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR15:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR13:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR14]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR11:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR10:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR12:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR11:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR13:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR12:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR14:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR13:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__CGSCC_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]] ; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__CGSCC_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__CGSCC_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__CGSCC_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]] ; IS__CGSCC_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__CGSCC_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__CGSCC_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__CGSCC_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]] ; IS__CGSCC_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]] ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
; IS__CGSCC_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__CGSCC_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]] ; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1 ; IS__CGSCC_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
; IS__CGSCC_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__CGSCC_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__CGSCC_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR13]] ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR12]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__CGSCC_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR11:[0-9]+]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR10:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__CGSCC_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__CGSCC_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__CGSCC_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR12:[0-9]+]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR11:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__CGSCC_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__CGSCC_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]] ; IS__CGSCC_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__CGSCC_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__CGSCC_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__CGSCC_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__CGSCC_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]] ; IS__CGSCC_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__CGSCC_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__CGSCC_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__CGSCC_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]] ; IS__CGSCC_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]] ; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1 ; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
; IS__CGSCC_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]] ; IS__CGSCC_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1 ; IS__CGSCC_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
; IS__CGSCC_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__CGSCC_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__CGSCC_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__CGSCC_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__CGSCC_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR10]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%s = alloca %struct.S, align 4 %s = alloca %struct.S, align 4
%i = bitcast %struct.S* %s to i8* %i = bitcast %struct.S* %s to i8*
call void @llvm.lifetime.start.p0i8(i64 24, i8* nonnull %i) call void @llvm.lifetime.start.p0i8(i64 24, i8* nonnull %i)
%f1 = getelementptr inbounds %struct.S, %struct.S* %s, i64 0, i32 3 %f1 = getelementptr inbounds %struct.S, %struct.S* %s, i64 0, i32 3
store float 0x3FF19999A0000000, float* %f1, align 4, !tbaa !7 store float 0x3FF19999A0000000, float* %f1, align 4, !tbaa !7
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; Bytes[1023] = 0; ; Bytes[1023] = 0;
; write_arg((int *)&Bytes[500], 0); ; write_arg((int *)&Bytes[500], 0);
; struct S R; ; struct S R;
; for (int i = 0; i < 1024; ++i) ; for (int i = 0; i < 1024; ++i)
; globalBytes[i] = Bytes[i]; ; globalBytes[i] = Bytes[i];
; } ; }
; ;
define void @local_alloca_simplifiable_2() { define void @local_alloca_simplifiable_2() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2
; IS__TUNIT_OPM-SAME: () #[[ATTR2:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16 ; IS__TUNIT_OPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]])
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
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; IS__TUNIT_OPM-NEXT: br label [[FOR_INC22]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC22]]
; IS__TUNIT_OPM: for.inc22: ; IS__TUNIT_OPM: for.inc22:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]]
; IS__TUNIT_OPM: for.end24: ; IS__TUNIT_OPM: for.end24:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR16:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR14:[0-9]+]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__TUNIT_OPM: for.cond28: ; IS__TUNIT_OPM: for.cond28:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup30: ; IS__TUNIT_OPM: for.cond.cleanup30:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END38:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END38:%.*]]
; IS__TUNIT_OPM: for.body31: ; IS__TUNIT_OPM: for.body31:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC36]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC36]]
; IS__TUNIT_OPM: for.inc36: ; IS__TUNIT_OPM: for.inc36:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]]
; IS__TUNIT_OPM: for.end38: ; IS__TUNIT_OPM: for.end38:
; IS__TUNIT_OPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_OPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]])
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2
; IS__TUNIT_NPM-SAME: () #[[ATTR2:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16 ; IS__TUNIT_NPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS__TUNIT_NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]]
; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM: for.body:
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; IS__TUNIT_NPM-NEXT: br label [[FOR_INC22]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC22]]
; IS__TUNIT_NPM: for.inc22: ; IS__TUNIT_NPM: for.inc22:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]]
; IS__TUNIT_NPM: for.end24: ; IS__TUNIT_NPM: for.end24:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__TUNIT_NPM: for.cond28: ; IS__TUNIT_NPM: for.cond28:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup30: ; IS__TUNIT_NPM: for.cond.cleanup30:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END38:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END38:%.*]]
; IS__TUNIT_NPM: for.body31: ; IS__TUNIT_NPM: for.body31:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC36]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC36]]
; IS__TUNIT_NPM: for.inc36: ; IS__TUNIT_NPM: for.inc36:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]]
; IS__TUNIT_NPM: for.end38: ; IS__TUNIT_NPM: for.end38:
; IS__TUNIT_NPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_NPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2() { ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2() {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16 ; IS__CGSCC_OPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]])
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
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; IS__CGSCC_OPM: for.inc22: ; IS__CGSCC_OPM: for.inc22:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP22:![0-9]+]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP22:![0-9]+]]
; IS__CGSCC_OPM: for.end24: ; IS__CGSCC_OPM: for.end24:
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 ; IS__CGSCC_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023
; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]] ; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]]
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__CGSCC_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__CGSCC_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__CGSCC_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I22]], i32 noundef 0) #[[ATTR15:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I22]], i32 noundef 0) #[[ATTR14:[0-9]+]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__CGSCC_OPM: for.cond28: ; IS__CGSCC_OPM: for.cond28:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
; IS__CGSCC_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__CGSCC_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup30: ; IS__CGSCC_OPM: for.cond.cleanup30:
; IS__CGSCC_OPM-NEXT: br label [[FOR_END38:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_END38:%.*]]
; IS__CGSCC_OPM: for.body31: ; IS__CGSCC_OPM: for.body31:
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; IS__CGSCC_OPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__CGSCC_OPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nofree noundef nonnull [[I24]]) ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nofree noundef nonnull [[I24]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2() { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2() {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16 ; IS__CGSCC_NPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) #[[ATTR10]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_NPM: for.cond: ; IS__CGSCC_NPM: for.cond:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__CGSCC_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup: ; IS__CGSCC_NPM: for.cond.cleanup:
; IS__CGSCC_NPM-NEXT: br label [[FOR_END:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_END:%.*]]
; IS__CGSCC_NPM: for.body: ; IS__CGSCC_NPM: for.body:
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; IS__CGSCC_NPM: for.inc22: ; IS__CGSCC_NPM: for.inc22:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP22:![0-9]+]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP22:![0-9]+]]
; IS__CGSCC_NPM: for.end24: ; IS__CGSCC_NPM: for.end24:
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 ; IS__CGSCC_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023
; IS__CGSCC_NPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]] ; IS__CGSCC_NPM-NEXT: store i8 0, i8* [[ARRAYIDX25]], align 1, !tbaa [[TBAA15]]
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__CGSCC_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__CGSCC_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__CGSCC_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I22]], i32 noundef 0) #[[ATTR13:[0-9]+]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I22]], i32 noundef 0) #[[ATTR12:[0-9]+]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__CGSCC_NPM: for.cond28: ; IS__CGSCC_NPM: for.cond28:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
; IS__CGSCC_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__CGSCC_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup30: ; IS__CGSCC_NPM: for.cond.cleanup30:
; IS__CGSCC_NPM-NEXT: br label [[FOR_END38:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_END38:%.*]]
; IS__CGSCC_NPM: for.body31: ; IS__CGSCC_NPM: for.body31:
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; // split ; // split
; A = 2; ; A = 2;
; return A; ; return A;
; } ; }
; ;
define i32 @local_alloca_simplifiable_3() { define i32 @local_alloca_simplifiable_3() {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 1, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: store i32 1, i32* [[A]], align 4
; IS__TUNIT____-NEXT: br label [[SPLIT:%.*]] ; IS__TUNIT____-NEXT: br label [[SPLIT:%.*]]
; IS__TUNIT____: split: ; IS__TUNIT____: split:
; IS__TUNIT____-NEXT: store i32 2, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: store i32 2, i32* [[A]], align 4
; IS__TUNIT____-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret i32 [[L]] ; IS__TUNIT____-NEXT: ret i32 [[L]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3
; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: store i32 1, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: store i32 1, i32* [[A]], align 4
; IS__CGSCC____-NEXT: br label [[SPLIT:%.*]] ; IS__CGSCC____-NEXT: br label [[SPLIT:%.*]]
; IS__CGSCC____: split: ; IS__CGSCC____: split:
; IS__CGSCC____-NEXT: store i32 2, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: store i32 2, i32* [[A]], align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4
; IS__CGSCC____-NEXT: ret i32 [[L]] ; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
%A = alloca i32, align 4 %A = alloca i32, align 4
store i32 1, i32* %A store i32 1, i32* %A
br label %split br label %split
split: split:
store i32 2, i32* %A store i32 2, i32* %A
%l = load i32, i32* %A, align 4 %l = load i32, i32* %A, align 4
ret i32 %l ret i32 %l
} }
; int local_alloca_simplifiable_4() { ; int local_alloca_simplifiable_4() {
; int A; ; int A;
; return A; ; return A;
; } ; }
; ;
define i32 @local_alloca_simplifiable_4() { define i32 @local_alloca_simplifiable_4() {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4 ; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR4]] {
; IS__TUNIT____-NEXT: ret i32 undef ; IS__TUNIT____-NEXT: ret i32 undef
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4
; IS__CGSCC____-SAME: () #[[ATTR2]] { ; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%A = alloca i32, align 4 %A = alloca i32, align 4
%l = load i32, i32* %A, align 4 %l = load i32, i32* %A, align 4
ret i32 %l ret i32 %l
} }
; static int GI1 __attribute__((loader_uninitialized)); ; static int GI1 __attribute__((loader_uninitialized));
; int multi_obj_simplifiable_1(int cnd) { ; int multi_obj_simplifiable_1(int cnd) {
; int L = GI1 = 5; ; int L = GI1 = 5;
; int *p = cnd ? &GI1 : &L; ; int *p = cnd ? &GI1 : &L;
; return *p; ; return *p;
; } ; }
define i32 @multi_obj_simplifiable_1(i32 %cnd) { define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true: ; IS__TUNIT_OPM: cond.true:
; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_OPM: cond.false: ; IS__TUNIT_OPM: cond.false:
; IS__TUNIT_OPM-NEXT: br label [[COND_END]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end: ; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR14]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 5 ; IS__TUNIT_OPM-NEXT: ret i32 5
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_NPM: cond.true: ; IS__TUNIT_NPM: cond.true:
; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_NPM: cond.false: ; IS__TUNIT_NPM: cond.false:
; IS__TUNIT_NPM-NEXT: br label [[COND_END]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END]]
; IS__TUNIT_NPM: cond.end: ; IS__TUNIT_NPM: cond.end:
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: ret i32 5 ; IS__TUNIT_NPM-NEXT: ret i32 5
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR13]] ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC_OPM: cond.true: ; IS__CGSCC_OPM: cond.true:
; IS__CGSCC_OPM-NEXT: br label [[COND_END:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC_OPM: cond.false: ; IS__CGSCC_OPM: cond.false:
; IS__CGSCC_OPM-NEXT: br label [[COND_END]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END]]
; IS__CGSCC_OPM: cond.end: ; IS__CGSCC_OPM: cond.end:
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR13]] ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR12]]
; IS__CGSCC_OPM-NEXT: ret i32 5 ; IS__CGSCC_OPM-NEXT: ret i32 5
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__CGSCC_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
; IS__CGSCC_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__CGSCC_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC_NPM: cond.true: ; IS__CGSCC_NPM: cond.true:
; IS__CGSCC_NPM-NEXT: br label [[COND_END:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC_NPM: cond.false: ; IS__CGSCC_NPM: cond.false:
; IS__CGSCC_NPM-NEXT: br label [[COND_END]] ; IS__CGSCC_NPM-NEXT: br label [[COND_END]]
; IS__CGSCC_NPM: cond.end: ; IS__CGSCC_NPM: cond.end:
; IS__CGSCC_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR10]]
; IS__CGSCC_NPM-NEXT: ret i32 5 ; IS__CGSCC_NPM-NEXT: ret i32 5
; ;
entry: entry:
%L = alloca i32, align 4 %L = alloca i32, align 4
%i = bitcast i32* %L to i8* %i = bitcast i32* %L to i8*
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i) call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i)
store i32 5, i32* @GI1, align 4, !tbaa !3 store i32 5, i32* @GI1, align 4, !tbaa !3
store i32 5, i32* %L, align 4, !tbaa !3 store i32 5, i32* %L, align 4, !tbaa !3
Show All 18 Lines
; int multi_obj_simplifiable_2(int cnd) { ; int multi_obj_simplifiable_2(int cnd) {
; int L; ; int L;
; int *p = cnd ? &GI2 : &L; ; int *p = cnd ? &GI2 : &L;
; *p = 5; ; *p = 5;
; return *p; ; return *p;
; } ; }
; ;
define i32 @multi_obj_simplifiable_2(i32 %cnd) { define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true: ; IS__TUNIT_OPM: cond.true:
; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_OPM: cond.false: ; IS__TUNIT_OPM: cond.false:
; IS__TUNIT_OPM-NEXT: br label [[COND_END]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end: ; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: ret i32 5 ; IS__TUNIT_OPM-NEXT: ret i32 5
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_NPM: cond.true: ; IS__TUNIT_NPM: cond.true:
; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_NPM: cond.false: ; IS__TUNIT_NPM: cond.false:
; IS__TUNIT_NPM-NEXT: br label [[COND_END]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END]]
; IS__TUNIT_NPM: cond.end: ; IS__TUNIT_NPM: cond.end:
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR10]]
; IS__TUNIT_NPM-NEXT: ret i32 5 ; IS__TUNIT_NPM-NEXT: ret i32 5
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3]] { ; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR13]] ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC_OPM: cond.true: ; IS__CGSCC_OPM: cond.true:
; IS__CGSCC_OPM-NEXT: br label [[COND_END:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC_OPM: cond.false: ; IS__CGSCC_OPM: cond.false:
; IS__CGSCC_OPM-NEXT: br label [[COND_END]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END]]
; IS__CGSCC_OPM: cond.end: ; IS__CGSCC_OPM: cond.end:
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR13]] ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR12]]
; IS__CGSCC_OPM-NEXT: ret i32 5 ; IS__CGSCC_OPM-NEXT: ret i32 5
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__CGSCC_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3]] { ; IS__CGSCC_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10]]
; IS__CGSCC_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__CGSCC_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC_NPM: cond.true: ; IS__CGSCC_NPM: cond.true:
; IS__CGSCC_NPM-NEXT: br label [[COND_END:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC_NPM: cond.false: ; IS__CGSCC_NPM: cond.false:
; IS__CGSCC_NPM-NEXT: br label [[COND_END]] ; IS__CGSCC_NPM-NEXT: br label [[COND_END]]
; IS__CGSCC_NPM: cond.end: ; IS__CGSCC_NPM: cond.end:
; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR10]]
; IS__CGSCC_NPM-NEXT: ret i32 5 ; IS__CGSCC_NPM-NEXT: ret i32 5
; ;
entry: entry:
%L = alloca i32, align 4 %L = alloca i32, align 4
%i = bitcast i32* %L to i8* %i = bitcast i32* %L to i8*
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i) call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i)
%tobool.not = icmp eq i32 %cnd, 0 %tobool.not = icmp eq i32 %cnd, 0
br i1 %tobool.not, label %cond.false, label %cond.true br i1 %tobool.not, label %cond.false, label %cond.true
Show All 29 Lines
; r.i2 = Gs.i2 * 2; ; r.i2 = Gs.i2 * 2;
; r.i3 = Gs.i3 + Gs.i1; ; r.i3 = Gs.i3 + Gs.i1;
; return r; ; return r;
; } ; }
; ;
define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) { define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]] ; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]] ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]]
; IS__TUNIT_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]] ; IS__TUNIT_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]]
; IS__TUNIT_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]] ; IS__TUNIT_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]] ; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]] ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]]
; IS__TUNIT_NPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_NPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]] ; IS__TUNIT_NPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]]
; IS__TUNIT_NPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_NPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]] ; IS__TUNIT_NPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__CGSCC_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]] ; IS__CGSCC_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__CGSCC_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__CGSCC_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]] ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]]
; IS__CGSCC_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1 ; IS__CGSCC_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__CGSCC_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]] ; IS__CGSCC_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]]
; IS__CGSCC_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1 ; IS__CGSCC_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]] ; IS__CGSCC_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__CGSCC_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__CGSCC_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__CGSCC_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__CGSCC_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__CGSCC_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__CGSCC_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]] ; IS__CGSCC_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__CGSCC_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__CGSCC_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__CGSCC_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__CGSCC_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
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; struct S R; ; struct S R;
; for (int i = 0; i < 1024; ++i) ; for (int i = 0; i < 1024; ++i)
; globalBytes[i] = GBytes[i]; ; globalBytes[i] = GBytes[i];
; } ; }
; ;
define void @static_global_simplifiable_2() { define void @static_global_simplifiable_2() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2
; IS__TUNIT_OPM-SAME: () #[[ATTR6:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS__TUNIT_OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]]
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; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10
; IS__TUNIT_OPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2 ; IS__TUNIT_OPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC21]]
; IS__TUNIT_OPM: for.inc21: ; IS__TUNIT_OPM: for.inc21:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]]
; IS__TUNIT_OPM: for.end23: ; IS__TUNIT_OPM: for.end23:
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR16]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__TUNIT_OPM: for.cond25: ; IS__TUNIT_OPM: for.cond25:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup27: ; IS__TUNIT_OPM: for.cond.cleanup27:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END35:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END35:%.*]]
; IS__TUNIT_OPM: for.body28: ; IS__TUNIT_OPM: for.body28:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC33]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC33]]
; IS__TUNIT_OPM: for.inc33: ; IS__TUNIT_OPM: for.inc33:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP24:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP24:![0-9]+]]
; IS__TUNIT_OPM: for.end35: ; IS__TUNIT_OPM: for.end35:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS__TUNIT_NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]]
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; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10
; IS__TUNIT_NPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2 ; IS__TUNIT_NPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC21]]
; IS__TUNIT_NPM: for.inc21: ; IS__TUNIT_NPM: for.inc21:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]]
; IS__TUNIT_NPM: for.end23: ; IS__TUNIT_NPM: for.end23:
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__TUNIT_NPM: for.cond25: ; IS__TUNIT_NPM: for.cond25:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup27: ; IS__TUNIT_NPM: for.cond.cleanup27:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END35:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END35:%.*]]
; IS__TUNIT_NPM: for.body28: ; IS__TUNIT_NPM: for.body28:
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; IS__CGSCC_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] ; IS__CGSCC_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]]
; IS__CGSCC_OPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 16, !tbaa [[TBAA20]] ; IS__CGSCC_OPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 16, !tbaa [[TBAA20]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_INC21]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_INC21]]
; IS__CGSCC_OPM: for.inc21: ; IS__CGSCC_OPM: for.inc21:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]]
; IS__CGSCC_OPM: for.end23: ; IS__CGSCC_OPM: for.end23:
; IS__CGSCC_OPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]] ; IS__CGSCC_OPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]]
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR15]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__CGSCC_OPM: for.cond25: ; IS__CGSCC_OPM: for.cond25:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__CGSCC_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__CGSCC_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup27: ; IS__CGSCC_OPM: for.cond.cleanup27:
; IS__CGSCC_OPM-NEXT: br label [[FOR_END35:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_END35:%.*]]
; IS__CGSCC_OPM: for.body28: ; IS__CGSCC_OPM: for.body28:
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; IS__CGSCC_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] ; IS__CGSCC_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]]
; IS__CGSCC_NPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 16, !tbaa [[TBAA20]] ; IS__CGSCC_NPM-NEXT: store i64 0, i64* [[ARRAYIDX20]], align 16, !tbaa [[TBAA20]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_INC21]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_INC21]]
; IS__CGSCC_NPM: for.inc21: ; IS__CGSCC_NPM: for.inc21:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP26:![0-9]+]]
; IS__CGSCC_NPM: for.end23: ; IS__CGSCC_NPM: for.end23:
; IS__CGSCC_NPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]] ; IS__CGSCC_NPM-NEXT: store i8 0, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 1023), align 1, !tbaa [[TBAA15]]
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR13]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR12]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__CGSCC_NPM: for.cond25: ; IS__CGSCC_NPM: for.cond25:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__CGSCC_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__CGSCC_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup27: ; IS__CGSCC_NPM: for.cond.cleanup27:
; IS__CGSCC_NPM-NEXT: br label [[FOR_END35:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_END35:%.*]]
; IS__CGSCC_NPM: for.body28: ; IS__CGSCC_NPM: for.body28:
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; static int Flag3; ; static int Flag3;
; int static_global_simplifiable_3() { ; int static_global_simplifiable_3() {
; Flag3 = 1; ; Flag3 = 1;
; return Flag3; ; return Flag3;
; } ; }
define i32 @static_global_simplifiable_3() { define i32 @static_global_simplifiable_3() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3
; IS__TUNIT_OPM-SAME: () #[[ATTR7:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[I]] ; IS__TUNIT_OPM-NEXT: ret i32 [[I]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3
; NOT_TUNIT_OPM-SAME: () #[[ATTR5:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; NOT_TUNIT_OPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; NOT_TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; NOT_TUNIT_OPM-NEXT: ret i32 [[I]] ; IS__TUNIT_NPM-NEXT: ret i32 [[I]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@static_global_simplifiable_3
; IS__CGSCC____-SAME: () #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: ret i32 [[I]]
; ;
store i32 1, i32* @Flag3, align 4, !tbaa !3 store i32 1, i32* @Flag3, align 4, !tbaa !3
%i = load i32, i32* @Flag3, align 4, !tbaa !3 %i = load i32, i32* @Flag3, align 4, !tbaa !3
ret i32 %i ret i32 %i
} }
; struct S noalias_arg_simplifiable_1(struct S s) { ; struct S noalias_arg_simplifiable_1(struct S s) {
; s.f1 = 1.1; ; s.f1 = 1.1;
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; r.i2 = s.i2 * 2; ; r.i2 = s.i2 * 2;
; r.i3 = s.i3 + s.i1; ; r.i3 = s.i3 + s.i1;
; return r; ; return r;
; } ; }
; ;
define void @noalias_arg_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result, %struct.S* byval(%struct.S) align 8 %s) { define void @noalias_arg_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result, %struct.S* byval(%struct.S) align 8 %s) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR13]]
; IS__TUNIT_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00 ; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__TUNIT_OPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]] ; IS__TUNIT_OPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]]
; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]] ; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]]
; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]] ; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_NPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00 ; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__TUNIT_NPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]] ; IS__TUNIT_NPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]]
; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]] ; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]]
; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]] ; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1
; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__CGSCC_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__CGSCC_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]] ; IS__CGSCC_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]]
; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__CGSCC_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__CGSCC_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR14]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__CGSCC_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__CGSCC_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_OPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_OPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_OPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__CGSCC_OPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_OPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]] ; IS__CGSCC_OPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]]
; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00 ; IS__CGSCC_OPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00
; IS__CGSCC_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__CGSCC_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; IS__CGSCC_OPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]] ; IS__CGSCC_OPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]]
; IS__CGSCC_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]] ; IS__CGSCC_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]]
; IS__CGSCC_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]] ; IS__CGSCC_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1
; IS__CGSCC_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__CGSCC_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__CGSCC_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]] ; IS__CGSCC_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]]
; IS__CGSCC_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__CGSCC_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__CGSCC_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__CGSCC_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR11]]
; IS__CGSCC_NPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__CGSCC_NPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__CGSCC_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC_NPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]] ; IS__CGSCC_NPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC_NPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__CGSCC_NPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC_NPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]] ; IS__CGSCC_NPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]]
; IS__CGSCC_NPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00 ; IS__CGSCC_NPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00
; IS__CGSCC_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__CGSCC_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
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; struct S R; ; struct S R;
; for (int i = 0; i < 1024; ++i) ; for (int i = 0; i < 1024; ++i)
; globalBytes[i] = Bytes[i]; ; globalBytes[i] = Bytes[i];
; } ; }
; ;
define void @noalias_arg_simplifiable_2(i8* %Bytes) { define void @noalias_arg_simplifiable_2(i8* %Bytes) {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR3]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS__TUNIT_OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]]
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; IS__TUNIT_OPM: for.inc21: ; IS__TUNIT_OPM: for.inc21:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]]
; IS__TUNIT_OPM: for.end23: ; IS__TUNIT_OPM: for.end23:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023
; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__TUNIT_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__TUNIT_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR16]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__TUNIT_OPM: for.cond27: ; IS__TUNIT_OPM: for.cond27:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup29: ; IS__TUNIT_OPM: for.cond.cleanup29:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END37:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END37:%.*]]
; IS__TUNIT_OPM: for.body30: ; IS__TUNIT_OPM: for.body30:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC35]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC35]]
; IS__TUNIT_OPM: for.inc35: ; IS__TUNIT_OPM: for.inc35:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27]], !llvm.loop [[LOOP31:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27]], !llvm.loop [[LOOP31:![0-9]+]]
; IS__TUNIT_OPM: for.end37: ; IS__TUNIT_OPM: for.end37:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2
; IS__TUNIT_NPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR3]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS__TUNIT_NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]]
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; IS__TUNIT_NPM: for.inc21: ; IS__TUNIT_NPM: for.inc21:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]]
; IS__TUNIT_NPM: for.end23: ; IS__TUNIT_NPM: for.end23:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023
; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__TUNIT_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__TUNIT_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR12]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__TUNIT_NPM: for.cond27: ; IS__TUNIT_NPM: for.cond27:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup29: ; IS__TUNIT_NPM: for.cond.cleanup29:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END37:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END37:%.*]]
; IS__TUNIT_NPM: for.body30: ; IS__TUNIT_NPM: for.body30:
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; IS__CGSCC_OPM: for.inc21: ; IS__CGSCC_OPM: for.inc21:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]]
; IS__CGSCC_OPM: for.end23: ; IS__CGSCC_OPM: for.end23:
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 ; IS__CGSCC_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023
; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]] ; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]]
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__CGSCC_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__CGSCC_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__CGSCC_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I21]], i32 noundef 0) #[[ATTR15]] ; IS__CGSCC_OPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I21]], i32 noundef 0) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__CGSCC_OPM: for.cond27: ; IS__CGSCC_OPM: for.cond27:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__CGSCC_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__CGSCC_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup29: ; IS__CGSCC_OPM: for.cond.cleanup29:
; IS__CGSCC_OPM-NEXT: br label [[FOR_END37:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_END37:%.*]]
; IS__CGSCC_OPM: for.body30: ; IS__CGSCC_OPM: for.body30:
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; IS__CGSCC_NPM: for.inc21: ; IS__CGSCC_NPM: for.inc21:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]]
; IS__CGSCC_NPM: for.end23: ; IS__CGSCC_NPM: for.end23:
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 ; IS__CGSCC_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023
; IS__CGSCC_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]] ; IS__CGSCC_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA15]]
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__CGSCC_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__CGSCC_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__CGSCC_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I21]], i32 noundef 0) #[[ATTR13]] ; IS__CGSCC_NPM-NEXT: call void @write_arg(i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[I21]], i32 noundef 0) #[[ATTR12]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__CGSCC_NPM: for.cond27: ; IS__CGSCC_NPM: for.cond27:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__CGSCC_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__CGSCC_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__CGSCC_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup29: ; IS__CGSCC_NPM: for.cond.cleanup29:
; IS__CGSCC_NPM-NEXT: br label [[FOR_END37:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_END37:%.*]]
; IS__CGSCC_NPM: for.body30: ; IS__CGSCC_NPM: for.body30:
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; X = Y = 1; ; X = Y = 1;
; escape(&X); ; escape(&X);
; write_random(&Y); ; write_random(&Y);
; Z = X ? 1 : 2; ; Z = X ? 1 : 2;
; return X + Y + Z; ; return X + Y + Z;
; } ; }
; ;
define i32 @local_alloca_not_simplifiable_1() { define i32 @local_alloca_not_simplifiable_1() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { ; IS________OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[X:%.*]] = alloca i32, align 4 ; IS________OPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4 ; IS________OPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* ; IS________OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]] ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* ; IS________OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]] ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR12]]
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* ; IS________OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) ; IS________OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]])
; IS__TUNIT_OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) ; IS________OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]])
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 ; IS________OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0
; IS__TUNIT_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 ; IS________OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1
; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] ; IS________OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]]
; IS__TUNIT_OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] ; IS________OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]]
; IS__TUNIT_OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* ; IS________OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) ; IS________OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]])
; IS__TUNIT_OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* ; IS________OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) ; IS________OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]])
; IS__TUNIT_OPM-NEXT: ret i32 [[ADD1]] ; IS________OPM-NEXT: ret i32 [[ADD1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { ; IS________NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[X:%.*]] = alloca i32, align 4 ; IS________NPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS________NPM-NEXT: [[Y:%.*]] = alloca i32, align 4 ; IS________NPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS________NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* ; IS________NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11:[0-9]+]] ; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR10:[0-9]+]]
; IS________NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* ; IS________NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]] ; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR10]]
; IS________NPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS________NPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS________NPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS________NPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS________NPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* ; IS________NPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
; IS________NPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) ; IS________NPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]])
; IS________NPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) ; IS________NPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]])
; IS________NPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS________NPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS________NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 ; IS________NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0
; IS________NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 ; IS________NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1
; IS________NPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS________NPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS________NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] ; IS________NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]]
; IS________NPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] ; IS________NPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]]
; IS________NPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* ; IS________NPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8*
; IS________NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) ; IS________NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]])
; IS________NPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* ; IS________NPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8*
; IS________NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) ; IS________NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]])
; IS________NPM-NEXT: ret i32 [[ADD1]] ; IS________NPM-NEXT: ret i32 [[ADD1]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]])
; IS__CGSCC_OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]])
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0
; IS__CGSCC_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1
; IS__CGSCC_OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]]
; IS__CGSCC_OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]]
; IS__CGSCC_OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]])
; IS__CGSCC_OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]])
; IS__CGSCC_OPM-NEXT: ret i32 [[ADD1]]
;
entry: entry:
%X = alloca i32, align 4 %X = alloca i32, align 4
%Y = alloca i32, align 4 %Y = alloca i32, align 4
%i = bitcast i32* %X to i8* %i = bitcast i32* %X to i8*
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i) call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i)
%i1 = bitcast i32* %Y to i8* %i1 = bitcast i32* %Y to i8*
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i1) call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %i1)
store i32 1, i32* %Y, align 4, !tbaa !3 store i32 1, i32* %Y, align 4, !tbaa !3
Show All 13 Linesentry:
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i6) call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i6)
ret i32 %add1 ret i32 %add1
} }
; We could simplify these if we separate accessed bins wrt. alignment (here mod 4). ; We could simplify these if we separate accessed bins wrt. alignment (here mod 4).
define i32 @unknown_access_mixed_simplifiable(i32 %arg1, i32 %arg2) { define i32 @unknown_access_mixed_simplifiable(i32 %arg1, i32 %arg2) {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_simplifiable ; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_simplifiable
; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 ; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32* ; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32*
; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]] ; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]]
; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]] ; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]]
; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP1]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP1]], align 4
; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP2]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP2]], align 4
; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP3]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP3]], align 4
; IS__TUNIT____-NEXT: [[L1:%.*]] = load i32, i32* [[GEP1]], align 4 ; IS__TUNIT____-NEXT: [[L1:%.*]] = load i32, i32* [[GEP1]], align 4
; IS__TUNIT____-NEXT: [[L2:%.*]] = load i32, i32* [[GEP2]], align 4 ; IS__TUNIT____-NEXT: [[L2:%.*]] = load i32, i32* [[GEP2]], align 4
; IS__TUNIT____-NEXT: [[L3:%.*]] = load i32, i32* [[GEP3]], align 4 ; IS__TUNIT____-NEXT: [[L3:%.*]] = load i32, i32* [[GEP3]], align 4
; IS__TUNIT____-NEXT: [[ADD1:%.*]] = add i32 [[L1]], [[L2]] ; IS__TUNIT____-NEXT: [[ADD1:%.*]] = add i32 [[L1]], [[L2]]
; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[L3]] ; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[L3]]
; IS__TUNIT____-NEXT: ret i32 [[ADD2]] ; IS__TUNIT____-NEXT: ret i32 [[ADD2]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@unknown_access_mixed_simplifiable ; IS__CGSCC____-LABEL: define {{[^@]+}}@unknown_access_mixed_simplifiable
; IS__CGSCC____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) #[[ATTR2]] { ; IS__CGSCC____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 ; IS__CGSCC____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32* ; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32*
; IS__CGSCC____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__CGSCC____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]] ; IS__CGSCC____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]]
; IS__CGSCC____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]] ; IS__CGSCC____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]]
; IS__CGSCC____-NEXT: store i32 7, i32* [[GEP1]], align 4 ; IS__CGSCC____-NEXT: store i32 7, i32* [[GEP1]], align 4
; IS__CGSCC____-NEXT: store i32 7, i32* [[GEP2]], align 4 ; IS__CGSCC____-NEXT: store i32 7, i32* [[GEP2]], align 4
Show All 21 Linesentry:
%add2 = add i32 %add1, %l3 %add2 = add i32 %add1, %l3
ret i32 %add2 ret i32 %add2
} }
; The access to bc4b could go anywhere, nothing is simplifiable. ; The access to bc4b could go anywhere, nothing is simplifiable.
define i32 @unknown_access_mixed_not_simplifiable(i32 %arg1, i32 %arg2, i32 %arg3) { define i32 @unknown_access_mixed_not_simplifiable(i32 %arg1, i32 %arg2, i32 %arg3) {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_not_simplifiable ; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_not_simplifiable
; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 ; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32* ; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32*
; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]] ; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]]
; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]] ; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]]
; IS__TUNIT____-NEXT: [[BC4A:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT____-NEXT: [[BC4A:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT____-NEXT: [[GEP4:%.*]] = getelementptr inbounds i8, i8* [[BC4A]], i32 [[ARG3]] ; IS__TUNIT____-NEXT: [[GEP4:%.*]] = getelementptr inbounds i8, i8* [[BC4A]], i32 [[ARG3]]
; IS__TUNIT____-NEXT: [[BC4B:%.*]] = bitcast i8* [[GEP4]] to i32* ; IS__TUNIT____-NEXT: [[BC4B:%.*]] = bitcast i8* [[GEP4]] to i32*
; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP1]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP1]], align 4
; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP2]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP2]], align 4
; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP3]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[GEP3]], align 4
; IS__TUNIT____-NEXT: store i32 7, i32* [[BC4B]], align 4 ; IS__TUNIT____-NEXT: store i32 7, i32* [[BC4B]], align 4
; IS__TUNIT____-NEXT: [[L1:%.*]] = load i32, i32* [[GEP1]], align 4 ; IS__TUNIT____-NEXT: [[L1:%.*]] = load i32, i32* [[GEP1]], align 4
; IS__TUNIT____-NEXT: [[L2:%.*]] = load i32, i32* [[GEP2]], align 4 ; IS__TUNIT____-NEXT: [[L2:%.*]] = load i32, i32* [[GEP2]], align 4
; IS__TUNIT____-NEXT: [[L3:%.*]] = load i32, i32* [[GEP3]], align 4 ; IS__TUNIT____-NEXT: [[L3:%.*]] = load i32, i32* [[GEP3]], align 4
; IS__TUNIT____-NEXT: [[L4:%.*]] = load i32, i32* [[BC4B]], align 4 ; IS__TUNIT____-NEXT: [[L4:%.*]] = load i32, i32* [[BC4B]], align 4
; IS__TUNIT____-NEXT: [[ADD1:%.*]] = add i32 [[L1]], [[L2]] ; IS__TUNIT____-NEXT: [[ADD1:%.*]] = add i32 [[L1]], [[L2]]
; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[L3]] ; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[L3]]
; IS__TUNIT____-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[L4]] ; IS__TUNIT____-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[L4]]
; IS__TUNIT____-NEXT: ret i32 [[ADD3]] ; IS__TUNIT____-NEXT: ret i32 [[ADD3]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@unknown_access_mixed_not_simplifiable ; IS__CGSCC____-LABEL: define {{[^@]+}}@unknown_access_mixed_not_simplifiable
; IS__CGSCC____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) #[[ATTR2]] { ; IS__CGSCC____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 ; IS__CGSCC____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32* ; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32*
; IS__CGSCC____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__CGSCC____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]] ; IS__CGSCC____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]]
; IS__CGSCC____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]] ; IS__CGSCC____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]]
; IS__CGSCC____-NEXT: [[BC4A:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__CGSCC____-NEXT: [[BC4A:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__CGSCC____-NEXT: [[GEP4:%.*]] = getelementptr inbounds i8, i8* [[BC4A]], i32 [[ARG3]] ; IS__CGSCC____-NEXT: [[GEP4:%.*]] = getelementptr inbounds i8, i8* [[BC4A]], i32 [[ARG3]]
Show All 39 Lines
; int Flag0 = 0; ; int Flag0 = 0;
; int global_not_simplifiable_1(int cnd) { ; int global_not_simplifiable_1(int cnd) {
; return Flag0; ; return Flag0;
; } ; }
; ;
define i32 @global_not_simplifiable_1(i32 %cnd) { define i32 @global_not_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1
; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[I]] ; IS__TUNIT_OPM-NEXT: ret i32 [[I]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1 ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1
; NOT_TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR7:[0-9]+]] { ; NOT_TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR6:[0-9]+]] {
; NOT_TUNIT_OPM-NEXT: entry: ; NOT_TUNIT_OPM-NEXT: entry:
; NOT_TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]] ; NOT_TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]]
; NOT_TUNIT_OPM-NEXT: ret i32 [[I]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[I]]
; ;
entry: entry:
%i = load i32, i32* @Flag0, align 4, !tbaa !3 %i = load i32, i32* @Flag0, align 4, !tbaa !3
ret i32 %i ret i32 %i
} }
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; int read{,_static,_static_undef}_global(void) { ; int read{,_static,_static_undef}_global(void) {
; return Gint{,static,_static_undef}2; ; return Gint{,static,_static_undef}2;
; } ; }
; ;
; FIXME: We could replace these loads. ; FIXME: We could replace these loads.
define i32 @write_read_global() { define i32 @write_read_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_global
; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint1, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint1, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_global ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_read_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gint1, align 4 ; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gint1, align 4
; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4
; NOT_TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_NPM-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_read_global
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gint1, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
store i32 7, i32* @Gint1 store i32 7, i32* @Gint1
%l = load i32, i32* @Gint1 %l = load i32, i32* @Gint1
ret i32 %l ret i32 %l
} }
define void @write_global() { define void @write_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR6]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR4:[0-9]+]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5:[0-9]+]] {
; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4
; NOT_TUNIT_OPM-NEXT: ret void ; NOT_TUNIT_OPM-NEXT: ret void
; ;
store i32 7, i32* @Gint2 store i32 7, i32* @Gint2
ret void ret void
} }
define i32 @read_global() { define i32 @read_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_global
; IS__TUNIT_OPM-SAME: () #[[ATTR10]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR8]] {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@read_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@read_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR7]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR6]] {
; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4
; NOT_TUNIT_OPM-NEXT: ret i32 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* @Gint2 %l = load i32, i32* @Gint2
ret i32 %l ret i32 %l
} }
; FIXME: We could replace these loads. ; FIXME: We could replace these loads.
define i32 @write_read_static_global() { define i32 @write_read_static_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_global
; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_global ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_read_static_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4 ; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4
; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4
; NOT_TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_NPM-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_read_static_global
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_int1, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
store i32 7, i32* @Gstatic_int1 store i32 7, i32* @Gstatic_int1
%l = load i32, i32* @Gstatic_int1 %l = load i32, i32* @Gstatic_int1
ret i32 %l ret i32 %l
} }
define void @write_static_global() { define void @write_static_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR6]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR4]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] {
; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4
; NOT_TUNIT_OPM-NEXT: ret void ; NOT_TUNIT_OPM-NEXT: ret void
; ;
store i32 7, i32* @Gstatic_int2 store i32 7, i32* @Gstatic_int2
ret void ret void
} }
define i32 @read_static_global() { define i32 @read_static_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global
; IS__TUNIT_OPM-SAME: () #[[ATTR10]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR8]] {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR7]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR6]] {
; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4
; NOT_TUNIT_OPM-NEXT: ret i32 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* @Gstatic_int2 %l = load i32, i32* @Gstatic_int2
ret i32 %l ret i32 %l
} }
define i32 @write_read_static_undef_global() { define i32 @write_read_static_undef_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR6]] {
; IS__TUNIT_OPM-NEXT: ret i32 7 ; IS__TUNIT_OPM-NEXT: ret i32 7
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global
; NOT_TUNIT_OPM-SAME: () #[[ATTR4]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] {
; NOT_TUNIT_OPM-NEXT: ret i32 7 ; NOT_TUNIT_OPM-NEXT: ret i32 7
; ;
store i32 7, i32* @Gstatic_undef_int1 store i32 7, i32* @Gstatic_undef_int1
%l = load i32, i32* @Gstatic_undef_int1 %l = load i32, i32* @Gstatic_undef_int1
ret i32 %l ret i32 %l
} }
define void @write_static_undef_global() { define void @write_static_undef_global() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_undef_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR6]] {
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_static_undef_global ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_static_undef_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__CGSCC____-SAME: () #[[ATTR4]] { ; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_undef_int2, align 4 ; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_undef_int2, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 7, i32* @Gstatic_undef_int2 store i32 7, i32* @Gstatic_undef_int2
ret void ret void
} }
define i32 @read_static_undef_global() { define i32 @read_static_undef_global() {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@read_static_undef_global ; IS__TUNIT____-LABEL: define {{[^@]+}}@read_static_undef_global
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR4]] {
; IS__TUNIT____-NEXT: ret i32 7 ; IS__TUNIT____-NEXT: ret i32 7
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@read_static_undef_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@read_static_undef_global
; IS__CGSCC____-SAME: () #[[ATTR2]] { ; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret i32 7 ; IS__CGSCC____-NEXT: ret i32 7
; ;
%l = load i32, i32* @Gstatic_undef_int2 %l = load i32, i32* @Gstatic_undef_int2
ret i32 %l ret i32 %l
} }
define i32 @single_read_of_static_global() { define i32 @single_read_of_static_global() {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@single_read_of_static_global ; IS__TUNIT____-LABEL: define {{[^@]+}}@single_read_of_static_global
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR4]] {
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@single_read_of_static_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@single_read_of_static_global
; IS__CGSCC____-SAME: () #[[ATTR2]] { ; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
; ;
%l = load i32, i32* @Gstatic_int3 %l = load i32, i32* @Gstatic_int3
ret i32 %l ret i32 %l
} }
define i8 @phi_store() { define i8 @phi_store() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_store ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_store
; IS__TUNIT_OPM-SAME: () #[[ATTR11:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR9:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i16, align 2 ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i16, align 2
; IS__TUNIT_OPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8* ; IS__TUNIT_OPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8*
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS__TUNIT_OPM: loop:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__TUNIT_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2 ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_OPM: end: ; IS__TUNIT_OPM: end:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
; IS__TUNIT_OPM-NEXT: ret i8 [[L]] ; IS__TUNIT_OPM-NEXT: ret i8 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_store ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_store
; IS__TUNIT_NPM-SAME: () #[[ATTR3]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = alloca i16, align 2 ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = alloca i16, align 2
; IS__TUNIT_NPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8* ; IS__TUNIT_NPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8*
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop: ; IS__TUNIT_NPM: loop:
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__TUNIT_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2 ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_NPM: end: ; IS__TUNIT_NPM: end:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
; IS__TUNIT_NPM-NEXT: ret i8 [[L]] ; IS__TUNIT_NPM-NEXT: ret i8 [[L]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_store ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_store
; IS__CGSCC_OPM-SAME: () #[[ATTR8:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR7:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = alloca i16, align 2 ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = alloca i16, align 2
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8* ; IS__CGSCC_OPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8*
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop: ; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__CGSCC_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_OPM: end: ; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1 ; IS__CGSCC_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
; IS__CGSCC_OPM-NEXT: ret i8 [[L]] ; IS__CGSCC_OPM-NEXT: ret i8 [[L]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_store ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_store
; IS__CGSCC_NPM-SAME: () #[[ATTR2]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR3]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i16, align 2 ; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i16, align 2
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8* ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8*
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop: ; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__CGSCC_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
Show All 20 Lines
end: end:
%s = getelementptr i8, i8* %b, i64 1 %s = getelementptr i8, i8* %b, i64 1
%l = load i8, i8* %s %l = load i8, i8* %s
ret i8 %l ret i8 %l
} }
; FIXME: This function returns 1. ; FIXME: This function returns 1.
define i8 @phi_no_store_1() { define i8 @phi_no_store_1() {
; IS________OPM: Function Attrs: nofree norecurse nosync nounwind ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS________OPM-LABEL: define {{[^@]+}}@phi_no_store_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS________OPM-SAME: () #[[ATTR9:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR3]] {
; IS________OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS________OPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
; IS________OPM: loop: ; IS__TUNIT_OPM: loop:
; IS________OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS________OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS________OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__TUNIT_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS________OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS________OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3 ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS________OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS________OPM: end: ; IS__TUNIT_OPM: end:
; IS________OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2 ; IS__TUNIT_OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS________OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1 ; IS__TUNIT_OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS________OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]] ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS________OPM-NEXT: ret i8 [[ADD]] ; IS__TUNIT_OPM-NEXT: ret i8 [[ADD]]
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS________NPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; IS________NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
; IS________NPM: loop: ; IS__TUNIT_NPM: loop:
; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS________NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__TUNIT_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3 ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS________NPM: end: ; IS__TUNIT_NPM: end:
; IS________NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2 ; IS__TUNIT_NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS________NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1 ; IS__TUNIT_NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS________NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]] ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS________NPM-NEXT: ret i8 [[ADD]] ; IS__TUNIT_NPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS__CGSCC_OPM-SAME: () #[[ATTR8:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS__CGSCC_OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS__CGSCC_OPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS__CGSCC_NPM-SAME: () #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__CGSCC_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS__CGSCC_NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS__CGSCC_NPM-NEXT: ret i8 [[ADD]]
; ;
entry: entry:
%b = bitcast i32* @a1 to i8* %b = bitcast i32* @a1 to i8*
br label %loop br label %loop
loop: loop:
%p = phi i8* [%b, %entry], [%g, %loop] %p = phi i8* [%b, %entry], [%g, %loop]
%i = phi i8 [0, %entry], [%o, %loop] %i = phi i8 [0, %entry], [%o, %loop]
store i8 1, i8* %p store i8 1, i8* %p
%g = getelementptr i8, i8* %p, i64 1 %g = getelementptr i8, i8* %p, i64 1
%o = add nsw i8 %i, 1 %o = add nsw i8 %i, 1
%c = icmp eq i8 %o, 3 %c = icmp eq i8 %o, 3
br i1 %c, label %end, label %loop br i1 %c, label %end, label %loop
end: end:
%s11 = getelementptr i8, i8* %b, i64 2 %s11 = getelementptr i8, i8* %b, i64 2
%l11 = load i8, i8* %s11 %l11 = load i8, i8* %s11
%s12 = getelementptr i8, i8* %b, i64 3 %s12 = getelementptr i8, i8* %b, i64 3
%l12 = load i8, i8* %s12 %l12 = load i8, i8* %s12
%add = add i8 %l11, %l12 %add = add i8 %l11, %l12
ret i8 %add ret i8 %add
} }
; FIXME: This function returns 1. ; FIXME: This function returns 1.
define i8 @phi_no_store_2() { define i8 @phi_no_store_2() {
; IS________OPM: Function Attrs: nofree norecurse nosync nounwind ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS________OPM-LABEL: define {{[^@]+}}@phi_no_store_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS________OPM-SAME: () #[[ATTR9]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR3]] {
; IS________OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS________OPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
; IS________OPM: loop: ; IS__TUNIT_OPM: loop:
; IS________OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS________OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS________OPM-NEXT: store i8 1, i8* [[P]], align 2 ; IS__TUNIT_OPM-NEXT: store i8 1, i8* [[P]], align 2
; IS________OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS________OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS________OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS________OPM: end: ; IS__TUNIT_OPM: end:
; IS________OPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2 ; IS__TUNIT_OPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS________OPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0 ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS________OPM-NEXT: ret i8 [[ADD]] ; IS__TUNIT_OPM-NEXT: ret i8 [[ADD]]
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS________NPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; IS________NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
; IS________NPM: loop: ; IS__TUNIT_NPM: loop:
; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS________NPM-NEXT: store i8 1, i8* [[P]], align 2 ; IS__TUNIT_NPM-NEXT: store i8 1, i8* [[P]], align 2
; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS________NPM: end: ; IS__TUNIT_NPM: end:
; IS________NPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2 ; IS__TUNIT_NPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS________NPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0 ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS________NPM-NEXT: ret i8 [[ADD]] ; IS__TUNIT_NPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS__CGSCC_OPM-SAME: () #[[ATTR8]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: store i8 1, i8* [[P]], align 2
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS__CGSCC_OPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS__CGSCC_NPM-SAME: () #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: store i8 1, i8* [[P]], align 2
; IS__CGSCC_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS__CGSCC_NPM-NEXT: ret i8 [[ADD]]
; ;
entry: entry:
%b = bitcast i32* @a2 to i8* %b = bitcast i32* @a2 to i8*
br label %loop br label %loop
loop: loop:
%p = phi i8* [%b, %entry], [%g, %loop] %p = phi i8* [%b, %entry], [%g, %loop]
%i = phi i8 [0, %entry], [%o, %loop] %i = phi i8 [0, %entry], [%o, %loop]
store i8 1, i8* %p store i8 1, i8* %p
%g = getelementptr i8, i8* %b, i64 2 %g = getelementptr i8, i8* %b, i64 2
%o = add nsw i8 %i, 1 %o = add nsw i8 %i, 1
%c = icmp eq i8 %o, 7 %c = icmp eq i8 %o, 7
br i1 %c, label %end, label %loop br i1 %c, label %end, label %loop
end: end:
%s21 = getelementptr i8, i8* %b, i64 2 %s21 = getelementptr i8, i8* %b, i64 2
%l21 = load i8, i8* %s21 %l21 = load i8, i8* %s21
%s22 = getelementptr i8, i8* %b, i64 3 %s22 = getelementptr i8, i8* %b, i64 3
%l22 = load i8, i8* %s22 %l22 = load i8, i8* %s22
%add = add i8 %l21, %l22 %add = add i8 %l21, %l22
ret i8 %add ret i8 %add
} }
define i8 @phi_no_store_3() { define i8 @phi_no_store_3() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_3 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS__TUNIT_OPM: loop:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_OPM: end: ; IS__TUNIT_OPM: end:
; IS__TUNIT_OPM-NEXT: ret i8 1 ; IS__TUNIT_OPM-NEXT: ret i8 1
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_3 ; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS________NPM-SAME: () #[[ATTR4]] { ; IS________NPM-SAME: () #[[ATTR5]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[LOOP:%.*]] ; IS________NPM-NEXT: br label [[LOOP:%.*]]
; IS________NPM: loop: ; IS________NPM: loop:
; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ] ; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS________NPM: end: ; IS________NPM: end:
; IS________NPM-NEXT: ret i8 1 ; IS________NPM-NEXT: ret i8 1
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS__CGSCC_OPM-SAME: () #[[ATTR10:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR9:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop: ; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ] ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
Show All 20 Linesend:
%l32 = load i8, i8* %s32 %l32 = load i8, i8* %s32
%add = add i8 %l31, %l32 %add = add i8 %l31, %l32
ret i8 %add ret i8 %add
} }
define i8 @cast_and_load_1() { define i8 @cast_and_load_1() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_1
; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes1, align 4 ; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes1, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4
; IS__TUNIT_OPM-NEXT: ret i8 [[L]] ; IS__TUNIT_OPM-NEXT: ret i8 [[L]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@cast_and_load_1
; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; NOT_TUNIT_OPM-NEXT: store i32 42, i32* @bytes1, align 4 ; IS__TUNIT_NPM-NEXT: store i32 42, i32* @bytes1, align 4
; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4
; NOT_TUNIT_OPM-NEXT: ret i8 [[L]] ; IS__TUNIT_NPM-NEXT: ret i8 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cast_and_load_1
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 42, i32* @bytes1, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4
; IS__CGSCC____-NEXT: ret i8 [[L]]
; ;
store i32 42, i32* @bytes1 store i32 42, i32* @bytes1
%bc = bitcast i32* @bytes1 to i8* %bc = bitcast i32* @bytes1 to i8*
%l = load i8, i8* %bc %l = load i8, i8* %bc
ret i8 %l ret i8 %l
} }
define i64 @cast_and_load_2() { define i64 @cast_and_load_2() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_2
; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes2, align 4 ; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes2, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4
; IS__TUNIT_OPM-NEXT: ret i64 [[L]] ; IS__TUNIT_OPM-NEXT: ret i64 [[L]]
; ;
; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@cast_and_load_2
; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; NOT_TUNIT_OPM-NEXT: store i32 42, i32* @bytes2, align 4 ; IS__TUNIT_NPM-NEXT: store i32 42, i32* @bytes2, align 4
; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4
; NOT_TUNIT_OPM-NEXT: ret i64 [[L]] ; IS__TUNIT_NPM-NEXT: ret i64 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cast_and_load_2
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 42, i32* @bytes2, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4
; IS__CGSCC____-NEXT: ret i64 [[L]]
; ;
store i32 42, i32* @bytes2 store i32 42, i32* @bytes2
%bc = bitcast i32* @bytes2 to i64* %bc = bitcast i32* @bytes2 to i64*
%l = load i64, i64* %bc %l = load i64, i64* %bc
ret i64 %l ret i64 %l
} }
define void @recursive_load_store(i64 %N, i32 %v) { define void @recursive_load_store(i64 %N, i32 %v) {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@recursive_load_store ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS__TUNIT_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR6]] { ; NOT_CGSCC_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; NOT_CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; NOT_CGSCC_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; NOT_CGSCC_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]] ; NOT_CGSCC_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS__TUNIT_OPM: for.body: ; NOT_CGSCC_OPM: for.body:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; NOT_CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]] ; NOT_CGSCC_OPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT_OPM: for.end: ; NOT_CGSCC_OPM: for.end:
; IS__TUNIT_OPM-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS________NPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS________NPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR8:[0-9]+]] {
; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS________NPM: for.cond:
; IS________NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS________NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS________NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS________NPM: for.body:
; IS________NPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; IS________NPM-NEXT: br label [[FOR_COND]]
; IS________NPM: for.end:
; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_load_store ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS__CGSCC_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR10]] { ; IS__CGSCC_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR9]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond: ; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]] ; IS__CGSCC_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS__CGSCC_OPM: for.body: ; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
Show All 18 Lines
for.end: for.end:
%lr = load i32, i32* @rec_storage %lr = load i32, i32* @rec_storage
store i32 %lr, i32* @rec_storage store i32 %lr, i32* @rec_storage
ret void ret void
} }
define dso_local i32 @round_trip_malloc(i32 %x) { define dso_local i32 @round_trip_malloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc ; IS________OPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR17:[0-9]+]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR15:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[CALL]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* noundef [[CALL]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@round_trip_malloc ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS________NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS________NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR16:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[CALL]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @malloc(i64 4) norecurse %call = call noalias i8* @malloc(i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
define dso_local i32 @round_trip_malloc_constant() { define dso_local i32 @round_trip_malloc_constant() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() { ; IS________OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 7, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[CALL]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* noundef [[CALL]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() { ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: ret i32 7 ; IS________NPM-NEXT: ret i32 7
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[CALL]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @malloc(i64 4) norecurse %call = call noalias i8* @malloc(i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 7, i32* %0, align 4 store i32 7, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
declare void @free(i8*) declare void @free(i8*)
define dso_local i32 @conditional_malloc(i32 %x) { define dso_local i32 @conditional_malloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_malloc ; IS________OPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT_OPM: if.then: ; IS________OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS________OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS________OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@conditional_malloc ; IS________NPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS________NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS________NPM: if.then: ; IS________NPM: if.then:
; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS________NPM-NEXT: br label [[IF_END]] ; IS________NPM-NEXT: br label [[IF_END]]
; IS________NPM: if.end: ; IS________NPM: if.end:
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS________NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @malloc(i64 4) norecurse %call = call noalias i8* @malloc(i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
%tobool = icmp ne i32 %x, 0 %tobool = icmp ne i32 %x, 0
br i1 %tobool, label %if.then, label %if.end br i1 %tobool, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
ret i32 %1 ret i32 %1
} }
define dso_local i32 @round_trip_calloc(i32 %x) { define dso_local i32 @round_trip_calloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc ; IS________OPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@round_trip_calloc ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS________NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS________NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 4, i64 1) norecurse %call = call noalias i8* @calloc(i64 4, i64 1) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
ret i32 %1 ret i32 %1
} }
define dso_local i32 @round_trip_calloc_constant() { define dso_local i32 @round_trip_calloc_constant() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() { ; IS________OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 11, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() { ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS________NPM-NEXT: store i32 11, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 11, i32* [[TMP1]], align 4
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS________NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 4, i64 1) norecurse %call = call noalias i8* @calloc(i64 4, i64 1) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 11, i32* %0, align 4 store i32 11, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
ret i32 %1 ret i32 %1
} }
declare noalias i8* @calloc(i64, i64) declare noalias i8* @calloc(i64, i64)
define dso_local i32 @conditional_calloc(i32 %x) { define dso_local i32 @conditional_calloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc ; IS________OPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS________OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS________OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS________OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@conditional_calloc ; IS________NPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS________NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS________NPM: if.then: ; IS________NPM: if.then:
; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS________NPM-NEXT: br label [[IF_END]] ; IS________NPM-NEXT: br label [[IF_END]]
; IS________NPM: if.end: ; IS________NPM: if.end:
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS________NPM-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP1]] to i8* ; IS________NPM-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP1]] to i8*
; IS________NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 1, i64 4) norecurse %call = call noalias i8* @calloc(i64 1, i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
%tobool = icmp ne i32 %x, 0 %tobool = icmp ne i32 %x, 0
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
define dso_local i32 @conditional_calloc_zero(i1 %c) { define dso_local i32 @conditional_calloc_zero(i1 %c) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero ; IS________OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) { ; IS________OPM-SAME: (i1 [[C:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS________OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 0, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS________OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS________OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@conditional_calloc_zero ; IS________NPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS________NPM-SAME: (i1 [[C:%.*]]) { ; IS________NPM-SAME: (i1 [[C:%.*]]) {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS________NPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS________NPM: if.then: ; IS________NPM: if.then:
; IS________NPM-NEXT: br label [[IF_END]] ; IS________NPM-NEXT: br label [[IF_END]]
; IS________NPM: if.end: ; IS________NPM: if.end:
; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to i8* ; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to i8*
; IS________NPM-NEXT: ret i32 0 ; IS________NPM-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 1, i64 4) norecurse %call = call noalias i8* @calloc(i64 1, i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
br i1 %c, label %if.end, label %if.then br i1 %c, label %if.end, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 0, i32* %0, align 4 store i32 0, i32* %0, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
define dso_local i32* @malloc_like(i32 %s) { define dso_local i32* @malloc_like(i32 %s) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@malloc_like ; IS________OPM-LABEL: define {{[^@]+}}@malloc_like
; IS__TUNIT_OPM-SAME: (i32 [[S:%.*]]) { ; IS________OPM-SAME: (i32 [[S:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS________OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: ret i32* [[TMP0]] ; IS________OPM-NEXT: ret i32* [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@malloc_like ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@malloc_like
; IS__TUNIT_NPM-SAME: (i32 [[S:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[S:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR13:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR12:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_NPM-NEXT: ret i32* [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32* [[TMP0]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@malloc_like
; IS__CGSCC_OPM-SAME: (i32 [[S:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: ret i32* [[TMP0]]
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@malloc_like ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@malloc_like
; IS__CGSCC_NPM-SAME: (i32 [[S:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32 [[S:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR14:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR13:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_NPM-NEXT: ret i32* [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32* [[TMP0]]
; ;
entry: entry:
%conv = sext i32 %s to i64 %conv = sext i32 %s to i64
%call = call noalias i8* @malloc(i64 %conv) norecurse %call = call noalias i8* @malloc(i64 %conv) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
ret i32* %0 ret i32* %0
} }
define dso_local i32 @round_trip_malloc_like(i32 %x) { define dso_local i32 @round_trip_malloc_like(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS________OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS________OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS________OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR13]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR13]] ; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR14]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR14]] ; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%call = call i32* @malloc_like(i32 4) norecurse %call = call i32* @malloc_like(i32 4) norecurse
store i32 %x, i32* %call, align 4 store i32 %x, i32* %call, align 4
%0 = load i32, i32* %call, align 4 %0 = load i32, i32* %call, align 4
%1 = bitcast i32* %call to i8* %1 = bitcast i32* %call to i8*
call void @free(i8* %1) norecurse call void @free(i8* %1) norecurse
ret i32 %0 ret i32 %0
} }
define dso_local i32 @round_trip_unknown_alloc(i32 %x) { define dso_local i32 @round_trip_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS________OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS________OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS________OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR13]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR13]] ; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR14]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR14]] ; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%call = call i32* @unknown_alloc(i32 4) norecurse %call = call i32* @unknown_alloc(i32 4) norecurse
store i32 %x, i32* %call, align 4 store i32 %x, i32* %call, align 4
%0 = load i32, i32* %call, align 4 %0 = load i32, i32* %call, align 4
%1 = bitcast i32* %call to i8* %1 = bitcast i32* %call to i8*
call void @free(i8* %1) norecurse call void @free(i8* %1) norecurse
ret i32 %0 ret i32 %0
} }
declare noalias i32* @unknown_alloc(i32) declare noalias i32* @unknown_alloc(i32)
define dso_local i32 @conditional_unknown_alloc(i32 %x) { define dso_local i32 @conditional_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS________OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS________OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR17]] ; IS________OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS________OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS________OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS________OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS________OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS________OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR17]] ; IS________OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS________OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR13]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_NPM: if.then: ; IS__TUNIT_NPM: if.then:
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: br label [[IF_END]] ; IS__TUNIT_NPM-NEXT: br label [[IF_END]]
; IS__TUNIT_NPM: if.end: ; IS__TUNIT_NPM: if.end:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_NPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR13]] ; IS__TUNIT_NPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR14]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: br label [[IF_END]] ; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end: ; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_NPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR14]] ; IS__CGSCC_NPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR13]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%call = call noalias i32* @unknown_alloc(i32 4) norecurse %call = call noalias i32* @unknown_alloc(i32 4) norecurse
%tobool = icmp ne i32 %x, 0 %tobool = icmp ne i32 %x, 0
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
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; IS__TUNIT_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24) ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24)
; IS__TUNIT_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float** ; IS__TUNIT_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float**
; IS__TUNIT_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__TUNIT_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__TUNIT_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8 ; IS__TUNIT_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__TUNIT_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__TUNIT_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__TUNIT_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR18:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR16:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_nested_memory ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_nested_memory
; IS__TUNIT_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) { ; IS__TUNIT_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8*
; IS__TUNIT_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1
; IS__TUNIT_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float** ; IS__TUNIT_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float**
; IS__TUNIT_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__TUNIT_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__TUNIT_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8 ; IS__TUNIT_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__TUNIT_NPM-NEXT: store double* [[SRC]], double** [[TMP2]], align 8 ; IS__TUNIT_NPM-NEXT: store double* [[SRC]], double** [[TMP2]], align 8
; IS__TUNIT_NPM-NEXT: store i8* [[TMP1]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__TUNIT_NPM-NEXT: store i8* [[TMP1]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__TUNIT_NPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR14:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR13:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_nested_memory ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_nested_memory
; IS__CGSCC_OPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) { ; IS__CGSCC_OPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8 ; IS__CGSCC_OPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8*
; IS__CGSCC_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24) ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24)
; IS__CGSCC_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float** ; IS__CGSCC_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float**
; IS__CGSCC_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__CGSCC_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__CGSCC_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8 ; IS__CGSCC_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__CGSCC_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8 ; IS__CGSCC_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__CGSCC_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__CGSCC_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR15]] ; IS__CGSCC_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_nested_memory ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_nested_memory
; IS__CGSCC_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) { ; IS__CGSCC_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8*
; IS__CGSCC_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__CGSCC_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1
; IS__CGSCC_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float** ; IS__CGSCC_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float**
; IS__CGSCC_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__CGSCC_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__CGSCC_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8 ; IS__CGSCC_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__CGSCC_NPM-NEXT: store double* [[SRC]], double** [[TMP2]], align 8 ; IS__CGSCC_NPM-NEXT: store double* [[SRC]], double** [[TMP2]], align 8
; IS__CGSCC_NPM-NEXT: store i8* [[TMP1]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__CGSCC_NPM-NEXT: store i8* [[TMP1]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__CGSCC_NPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR13]] ; IS__CGSCC_NPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR12]]
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%local = alloca %struct.STy, align 8 %local = alloca %struct.STy, align 8
%0 = bitcast %struct.STy* %local to i8* %0 = bitcast %struct.STy* %local to i8*
%inner = getelementptr inbounds %struct.STy, %struct.STy* %local, i64 0, i32 2 %inner = getelementptr inbounds %struct.STy, %struct.STy* %local, i64 0, i32 2
store %struct.STy* @global, %struct.STy** %inner, align 8 store %struct.STy* @global, %struct.STy** %inner, align 8
%call = call noalias dereferenceable_or_null(24) i8* @malloc(i64 24) #4 %call = call noalias dereferenceable_or_null(24) i8* @malloc(i64 24) #4
%dst1 = bitcast i8* %call to float** %dst1 = bitcast i8* %call to float**
store float* %dst, float** %dst1, align 8 store float* %dst, float** %dst1, align 8
%src2 = getelementptr inbounds i8, i8* %call, i64 8 %src2 = getelementptr inbounds i8, i8* %call, i64 8
%1 = bitcast i8* %src2 to double** %1 = bitcast i8* %src2 to double**
store double* %src, double** %1, align 8 store double* %src, double** %1, align 8
store i8* %call, i8** bitcast (%struct.STy** getelementptr inbounds (%struct.STy, %struct.STy* @global, i64 0, i32 2) to i8**), align 8 store i8* %call, i8** bitcast (%struct.STy** getelementptr inbounds (%struct.STy, %struct.STy* @global, i64 0, i32 2) to i8**), align 8
call fastcc void @nested_memory_callee(%struct.STy* nonnull %local) call fastcc void @nested_memory_callee(%struct.STy* nonnull %local)
ret void ret void
} }
define internal fastcc void @nested_memory_callee(%struct.STy* nocapture readonly %S) nofree norecurse nounwind uwtable { define internal fastcc void @nested_memory_callee(%struct.STy* nocapture readonly %S) nofree norecurse nounwind uwtable {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn uwtable ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind willreturn uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nested_memory_callee ; IS________OPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS__TUNIT_OPM-SAME: () #[[ATTR12:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR10:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8 ; IS________OPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS__TUNIT_OPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1 ; IS________OPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8 ; IS________OPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8 ; IS________OPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float ; IS________OPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float
; IS__TUNIT_OPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0 ; IS________OPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8 ; IS________OPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8
; IS__TUNIT_OPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4 ; IS________OPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn uwtable ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn uwtable
; IS________NPM-LABEL: define {{[^@]+}}@nested_memory_callee ; IS________NPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS________NPM-SAME: () #[[ATTR9:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR8:[0-9]+]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8 ; IS________NPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS________NPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1 ; IS________NPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS________NPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8 ; IS________NPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS________NPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8 ; IS________NPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
; IS________NPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float ; IS________NPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float
; IS________NPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0 ; IS________NPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0
; IS________NPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8 ; IS________NPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8
; IS________NPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4 ; IS________NPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS__CGSCC_OPM-SAME: () #[[ATTR11:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS__CGSCC_OPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float
; IS__CGSCC_OPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8
; IS__CGSCC_OPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4
; IS__CGSCC_OPM-NEXT: ret void
;
entry: entry:
%inner = getelementptr inbounds %struct.STy, %struct.STy* %S, i64 0, i32 2 %inner = getelementptr inbounds %struct.STy, %struct.STy* %S, i64 0, i32 2
%0 = load %struct.STy*, %struct.STy** %inner, align 8 %0 = load %struct.STy*, %struct.STy** %inner, align 8
%inner1 = getelementptr inbounds %struct.STy, %struct.STy* %0, i64 0, i32 2 %inner1 = getelementptr inbounds %struct.STy, %struct.STy* %0, i64 0, i32 2
%1 = load %struct.STy*, %struct.STy** %inner1, align 8 %1 = load %struct.STy*, %struct.STy** %inner1, align 8
%src = getelementptr inbounds %struct.STy, %struct.STy* %1, i64 0, i32 1 %src = getelementptr inbounds %struct.STy, %struct.STy* %1, i64 0, i32 1
%2 = load double*, double** %src, align 8 %2 = load double*, double** %src, align 8
%3 = load double, double* %2, align 8 %3 = load double, double* %2, align 8
%conv = fptrunc double %3 to float %conv = fptrunc double %3 to float
%dst = getelementptr inbounds %struct.STy, %struct.STy* %1, i64 0, i32 0 %dst = getelementptr inbounds %struct.STy, %struct.STy* %1, i64 0, i32 0
%4 = load float*, float** %dst, align 8 %4 = load float*, float** %dst, align 8
store float %conv, float* %4, align 4 store float %conv, float* %4, align 4
ret void ret void
} }
; Make sure the access %1 is not forwarded to the loads %2 and %3 as the indices are ; Make sure the access %1 is not forwarded to the loads %2 and %3 as the indices are
; varying and the accesses thus not "exact". This used to simplify %cmp12 to true. ; varying and the accesses thus not "exact". This used to simplify %cmp12 to true.
define hidden void @no_propagation_of_unknown_index_access(i32* %in, i32* %out, i32 %idx) #0 { define hidden void @no_propagation_of_unknown_index_access(i32* %in, i32* %out, i32 %idx) #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access ; IS________OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR13:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16 ; IS________OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS________OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND4:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND4:%.*]]
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64 ; IS________OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]] ; IS________OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]] ; IS________OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
; IS__TUNIT_OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4 ; IS________OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]] ; IS________OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
; IS__TUNIT_OPM: for.cond4: ; IS________OPM: for.cond4:
; IS__TUNIT_OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ] ; IS________OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128 ; IS________OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
; IS__TUNIT_OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]] ; IS________OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup6: ; IS________OPM: for.cond.cleanup6:
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) ; IS________OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS__TUNIT_OPM: for.body7: ; IS________OPM: for.body7:
; IS__TUNIT_OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64 ; IS________OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]] ; IS________OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4 ; IS________OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
; IS__TUNIT_OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64 ; IS________OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]] ; IS________OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
; IS__TUNIT_OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] ; IS________OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32 ; IS________OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]] ; IS________OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
; IS__TUNIT_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4 ; IS________OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
; IS__TUNIT_OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1 ; IS________OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]] ; IS________OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP12:![0-9]+]]
; ;
; IS________NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS________NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access ; IS________NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS________NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1:[0-9]+]] { ; IS________NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1:[0-9]+]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16 ; IS________NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS________NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8* ; IS________NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR11]] ; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR10]]
; IS________NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS________NPM: for.cond: ; IS________NPM: for.cond:
; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128 ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; IS________NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS________NPM-NEXT: br label [[FOR_COND4:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND4:%.*]]
; IS________NPM: for.body: ; IS________NPM: for.body:
; IS________NPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64 ; IS________NPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
; IS________NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]] ; IS________NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
; IS________NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 ; IS________NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; IS________NPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]] ; IS________NPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
; IS________NPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4 ; IS________NPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
; IS________NPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; IS________NPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; IS________NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] ; IS________NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
; IS________NPM: for.cond4: ; IS________NPM: for.cond4:
; IS________NPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ] ; IS________NPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
; IS________NPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128 ; IS________NPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
; IS________NPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]] ; IS________NPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
; IS________NPM: for.cond.cleanup6: ; IS________NPM: for.cond.cleanup6:
; IS________NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR11]] ; IS________NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR10]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS________NPM: for.body7: ; IS________NPM: for.body7:
; IS________NPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64 ; IS________NPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
; IS________NPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]] ; IS________NPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
; IS________NPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64 ; IS________NPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
; IS________NPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]] ; IS________NPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4 ; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
; IS________NPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] ; IS________NPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
; IS________NPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32 ; IS________NPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
; IS________NPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]] ; IS________NPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
; IS________NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4 ; IS________NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
; IS________NPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1 ; IS________NPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
; IS________NPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP12:![0-9]+]] ; IS________NPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP12:![0-9]+]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR12:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND4:%.*]]
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
; IS__CGSCC_OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
; IS__CGSCC_OPM: for.cond4:
; IS__CGSCC_OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
; IS__CGSCC_OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup6:
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: for.body7:
; IS__CGSCC_OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
; IS__CGSCC_OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
; IS__CGSCC_OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
; IS__CGSCC_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
; IS__CGSCC_OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
;
entry: entry:
%buf = alloca [128 x i32], align 16 %buf = alloca [128 x i32], align 16
%0 = bitcast [128 x i32]* %buf to i8* %0 = bitcast [128 x i32]* %buf to i8*
call void @llvm.lifetime.start.p0i8(i64 512, i8* %0) #2 call void @llvm.lifetime.start.p0i8(i64 512, i8* %0) #2
br label %for.cond br label %for.cond
for.cond: ; preds = %for.body, %entry for.cond: ; preds = %for.body, %entry
%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
!26 = distinct !{!26, !17} !26 = distinct !{!26, !17}
!27 = distinct !{!27, !17} !27 = distinct !{!27, !17}
!28 = distinct !{!28, !17} !28 = distinct !{!28, !17}
!29 = distinct !{!29, !17} !29 = distinct !{!29, !17}
!30 = distinct !{!30, !17} !30 = distinct !{!30, !17}
!31 = distinct !{!31, !17} !31 = distinct !{!31, !17}
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR2:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind willreturn uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR11]] = { argmemonly nofree norecurse nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR12]] = { nofree norecurse nosync nounwind willreturn uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR12]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR13]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR13]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR14]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR14]] = { nofree nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR15]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR15]] = { norecurse }
; IS__TUNIT_OPM: attributes #[[ATTR16]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR16]] = { nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR17]] = { norecurse }
; IS__TUNIT_OPM: attributes #[[ATTR18]] = { nounwind }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR2:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind willreturn uwtable } ; IS__TUNIT_NPM: attributes #[[ATTR9:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR10:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR10]] = { willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR11]] = { willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR11]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR12]] = { norecurse }
; IS__TUNIT_NPM: attributes #[[ATTR13]] = { norecurse } ; IS__TUNIT_NPM: attributes #[[ATTR13]] = { nounwind }
; IS__TUNIT_NPM: attributes #[[ATTR14]] = { nounwind }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR2:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree norecurse nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { argmemonly nofree nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR12]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR13]] = { nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR15]] = { norecurse }
; IS__CGSCC_OPM: attributes #[[ATTR16]] = { norecurse }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR2:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind willreturn uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR9:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR10]] = { willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR11]] = { nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR12]] = { nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR12]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR13]] = { nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR13]] = { norecurse }
; IS__CGSCC_NPM: attributes #[[ATTR14]] = { norecurse }
;. ;.
; IS__TUNIT____: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} ; IS__TUNIT____: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
; IS__TUNIT____: [[META1:![0-9]+]] = !{i32 7, !"uwtable", i32 1} ; IS__TUNIT____: [[META1:![0-9]+]] = !{i32 7, !"uwtable", i32 1}
; IS__TUNIT____: [[META2:![0-9]+]] = !{!"clang version 13.0.0"} ; IS__TUNIT____: [[META2:![0-9]+]] = !{!"clang version 13.0.0"}
; IS__TUNIT____: [[TBAA3]] = !{!4, !4, i64 0} ; IS__TUNIT____: [[TBAA3]] = !{!4, !4, i64 0}
; IS__TUNIT____: [[META4:![0-9]+]] = !{!"int", !5, i64 0} ; IS__TUNIT____: [[META4:![0-9]+]] = !{!"int", !5, i64 0}
; IS__TUNIT____: [[META5:![0-9]+]] = !{!"omnipotent char", !6, i64 0} ; IS__TUNIT____: [[META5:![0-9]+]] = !{!"omnipotent char", !6, i64 0}
; IS__TUNIT____: [[META6:![0-9]+]] = !{!"Simple C/C++ TBAA"} ; IS__TUNIT____: [[META6:![0-9]+]] = !{!"Simple C/C++ TBAA"}
▲ Show 20 Lines • Show All 59 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/value-simplify.ll

Show First 20 Lines • Show All 361 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i32* [[A]] ; CHECK-NEXT: ret i32* [[A]]
; ;
ret i32* %a ret i32* %a
} }
define i32* @complicated_args_inalloca(i32* %arg) { define i32* @complicated_args_inalloca(i32* %arg) {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__TUNIT_OPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR6:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR8:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__TUNIT_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] { ; IS__TUNIT_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR5:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR7:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__CGSCC____-SAME: (i32* nofree noundef nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* [[ARG]] ; IS__CGSCC____-NEXT: ret i32* [[ARG]]
; ;
%call = call i32* @test_inalloca(i32* inalloca(i32) %arg) %call = call i32* @test_inalloca(i32* inalloca(i32) %arg)
ret i32* %call ret i32* %call
} }
define internal i32* @test_preallocated(i32* preallocated(i32) %a) { define internal i32* @test_preallocated(i32* preallocated(i32) %a) {
; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@test_preallocated ; CHECK-LABEL: define {{[^@]+}}@test_preallocated
; CHECK-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: ret i32* [[A]] ; CHECK-NEXT: ret i32* [[A]]
; ;
ret i32* %a ret i32* %a
} }
define i32* @complicated_args_preallocated() { define i32* @complicated_args_preallocated() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__TUNIT_OPM-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR7:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR9:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR6]] [ "preallocated"(token [[C]]) ] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR8]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__TUNIT_NPM-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR6:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR8:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR5]] [ "preallocated"(token [[C]]) ] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR7]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR7:[0-9]+]] ; IS__CGSCC____-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR9:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32* null ; IS__CGSCC____-NEXT: ret i32* null
; ;
%c = call token @llvm.call.preallocated.setup(i32 1) %c = call token @llvm.call.preallocated.setup(i32 1)
%call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)] %call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)]
ret i32* %call ret i32* %call
} }
define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) { define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) {
; ;
; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; CHECK-LABEL: define {{[^@]+}}@test_sret ; CHECK-LABEL: define {{[^@]+}}@test_sret
; CHECK-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR3:[0-9]+]] {
; CHECK-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8 ; CHECK-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store %struct.X* %a, %struct.X** %b store %struct.X* %a, %struct.X** %b
ret void ret void
} }
; FIXME: Alignment and dereferenceability are not propagated to the argument ; FIXME: Alignment and dereferenceability are not propagated to the argument
define void @complicated_args_sret(%struct.X** %b) { define void @complicated_args_sret(%struct.X** %b) {
; ;
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT_OPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR2]] { ; IS__TUNIT_OPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR3]] {
; IS__TUNIT_OPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR8:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR10:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT_NPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR3]] {
; IS__TUNIT_NPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR7:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR9:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__CGSCC____-SAME: (%struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2]] { ; IS__CGSCC____-SAME: (%struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
call void @test_sret(%struct.X* sret(%struct.X) null, %struct.X** %b) call void @test_sret(%struct.X* sret(%struct.X) null, %struct.X** %b)
ret void ret void
} }
define internal %struct.X* @test_nest(%struct.X* nest %a) { define internal %struct.X* @test_nest(%struct.X* nest %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
Show All 12 Lines;
%call = call %struct.X* @test_nest(%struct.X* null) %call = call %struct.X* @test_nest(%struct.X* null)
ret %struct.X* %call ret %struct.X* %call
} }
@S = external global %struct.X @S = external global %struct.X
define internal void @test_byval(%struct.X* byval(%struct.X) %a) { define internal void @test_byval(%struct.X* byval(%struct.X) %a) {
; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS________OPM-LABEL: define {{[^@]+}}@test_byval ; IS________OPM-LABEL: define {{[^@]+}}@test_byval
; IS________OPM-SAME: (%struct.X* noalias nocapture nofree noundef nonnull writeonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] { ; IS________OPM-SAME: (%struct.X* noalias nocapture nofree noundef nonnull writeonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] {
; IS________OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0 ; IS________OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0
; IS________OPM-NEXT: store i8* null, i8** [[G0]], align 8 ; IS________OPM-NEXT: store i8* null, i8** [[G0]], align 8
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS________NPM-LABEL: define {{[^@]+}}@test_byval ; IS________NPM-LABEL: define {{[^@]+}}@test_byval
; IS________NPM-SAME: (i8* [[TMP0:%.*]]) #[[ATTR2]] { ; IS________NPM-SAME: (i8* [[TMP0:%.*]]) #[[ATTR3]] {
; IS________NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8 ; IS________NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8
; IS________NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8** ; IS________NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8**
; IS________NPM-NEXT: store i8* [[TMP0]], i8** [[A_PRIV_CAST]], align 8 ; IS________NPM-NEXT: store i8* [[TMP0]], i8** [[A_PRIV_CAST]], align 8
; IS________NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0 ; IS________NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0
; IS________NPM-NEXT: store i8* null, i8** [[G0]], align 8 ; IS________NPM-NEXT: store i8* null, i8** [[G0]], align 8
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%g0 = getelementptr %struct.X, %struct.X* %a, i32 0, i32 0 %g0 = getelementptr %struct.X, %struct.X* %a, i32 0, i32 0
store i8* null, i8** %g0 store i8* null, i8** %g0
ret void ret void
} }
define void @complicated_args_byval() { define void @complicated_args_byval() {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__TUNIT_OPM-SAME: () #[[ATTR3:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR4:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: call void @test_byval(%struct.X* nocapture nofree noundef nonnull readonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR8]] ; IS__TUNIT_OPM-NEXT: call void @test_byval(%struct.X* nocapture nofree noundef nonnull readonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR10]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__TUNIT_NPM-SAME: () #[[ATTR3:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR4:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.X* @S to i8** ; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.X* @S to i8**
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i8*, i8** [[S_CAST]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i8*, i8** [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: call void @test_byval(i8* [[TMP1]]) #[[ATTR7]] ; IS__TUNIT_NPM-NEXT: call void @test_byval(i8* [[TMP1]]) #[[ATTR9]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__CGSCC_OPM-SAME: () #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: call void @test_byval(%struct.X* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR8:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @test_byval(%struct.X* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR10:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR4:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @test_byval(%struct.X* byval(%struct.X) @S) call void @test_byval(%struct.X* byval(%struct.X) @S)
ret void ret void
} }
declare void @sync() declare void @sync()
; Make sure we *do not* load @S here! ; Make sure we *do not* load @S here!
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; ;
%c = call i8* @test_byval2(%struct.X* byval(%struct.X) @S) %c = call i8* @test_byval2(%struct.X* byval(%struct.X) @S)
ret i8* %c ret i8* %c
} }
define void @fixpoint_changed(i32* %p) { define void @fixpoint_changed(i32* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fixpoint_changed ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30 ; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS__TUNIT_OPM: for.body: ; IS__TUNIT_OPM: for.body:
; IS__TUNIT_OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [ ; IS__TUNIT_OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
; IS__TUNIT_OPM-NEXT: i32 1, label [[SW_BB:%.*]] ; IS__TUNIT_OPM-NEXT: i32 1, label [[SW_BB:%.*]]
; IS__TUNIT_OPM-NEXT: ] ; IS__TUNIT_OPM-NEXT: ]
; IS__TUNIT_OPM: sw.bb: ; IS__TUNIT_OPM: sw.bb:
; IS__TUNIT_OPM-NEXT: br label [[SW_EPILOG]] ; IS__TUNIT_OPM-NEXT: br label [[SW_EPILOG]]
; IS__TUNIT_OPM: sw.epilog: ; IS__TUNIT_OPM: sw.epilog:
; IS__TUNIT_OPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ] ; IS__TUNIT_OPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ]
; IS__TUNIT_OPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1 ; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT_OPM: for.end: ; IS__TUNIT_OPM: for.end:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS________NPM-LABEL: define {{[^@]+}}@fixpoint_changed ; IS________NPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS________NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR2]] { ; IS________NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS________NPM: for.cond: ; IS________NPM: for.cond:
; IS________NPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ] ; IS________NPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30 ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS________NPM: for.body: ; IS________NPM: for.body:
; IS________NPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [ ; IS________NPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
; IS________NPM-NEXT: i32 1, label [[SW_BB:%.*]] ; IS________NPM-NEXT: i32 1, label [[SW_BB:%.*]]
; IS________NPM-NEXT: ] ; IS________NPM-NEXT: ]
; IS________NPM: sw.bb: ; IS________NPM: sw.bb:
; IS________NPM-NEXT: br label [[SW_EPILOG]] ; IS________NPM-NEXT: br label [[SW_EPILOG]]
; IS________NPM: sw.epilog: ; IS________NPM: sw.epilog:
; IS________NPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ] ; IS________NPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ]
; IS________NPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4 ; IS________NPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4
; IS________NPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1 ; IS________NPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
; IS________NPM-NEXT: br label [[FOR_COND]] ; IS________NPM-NEXT: br label [[FOR_COND]]
; IS________NPM: for.end: ; IS________NPM: for.end:
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fixpoint_changed ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond: ; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ] ; IS__CGSCC_OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS__CGSCC_OPM: for.body: ; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [ ; IS__CGSCC_OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
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; ;
%c = add i8 %a, 7 %c = add i8 %a, 7
ret i8 %c ret i8 %c
} }
define void @user_as3() { define void @user_as3() {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@user_as3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@user_as3
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4 ; IS__TUNIT____-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@user_as3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@user_as3
; IS__CGSCC____-SAME: () #[[ATTR4:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4 ; IS__CGSCC____-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%call = call fastcc i32 addrspace(3)* @const_ptr_return_as3() %call = call fastcc i32 addrspace(3)* @const_ptr_return_as3()
store i32 0, i32 addrspace(3)* %call store i32 0, i32 addrspace(3)* %call
ret void ret void
} }
define void @user() { define void @user() {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@user ; IS__TUNIT____-LABEL: define {{[^@]+}}@user
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR4]] {
; IS__TUNIT____-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4 ; IS__TUNIT____-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@user ; IS__CGSCC____-LABEL: define {{[^@]+}}@user
; IS__CGSCC____-SAME: () #[[ATTR4]] { ; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%call = call fastcc i32* @const_ptr_return() %call = call fastcc i32* @const_ptr_return()
store i32 0, i32* %call store i32 0, i32* %call
ret void ret void
} }
define i1 @test_merge_with_undef_values_ptr(i1 %c) { define i1 @test_merge_with_undef_values_ptr(i1 %c) {
; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@test_merge_with_undef_values_ptr ; CHECK-LABEL: define {{[^@]+}}@test_merge_with_undef_values_ptr
; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
; ;
%r1 = call i1 @undef_then_null(i1 %c, i32* undef, i32* undef) %r1 = call i1 @undef_then_null(i1 %c, i32* undef, i32* undef)
ret i1 %r1 ret i1 %r1
} }
define internal i1 @undef_then_null(i1 %c, i32* %i32Aptr, i32* %i32Bptr) { define internal i1 @undef_then_null(i1 %c, i32* %i32Aptr, i32* %i32Bptr) {
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_null ; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_null
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC____: a: ; IS__CGSCC____: a:
; IS__CGSCC____-NEXT: ret i1 false ; IS__CGSCC____-NEXT: ret i1 false
; IS__CGSCC____: b: ; IS__CGSCC____: b:
; IS__CGSCC____-NEXT: ret i1 false ; IS__CGSCC____-NEXT: ret i1 false
; ;
%cmp1 = icmp eq i32* %i32Aptr, %i32Bptr %cmp1 = icmp eq i32* %i32Aptr, %i32Bptr
%cmp2 = icmp eq i1 %cmp1, false %cmp2 = icmp eq i1 %cmp1, false
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; ;
%r1 = call i1 @undef_then_1(i1 %c, i32 undef, i32 undef) %r1 = call i1 @undef_then_1(i1 %c, i32 undef, i32 undef)
ret i1 %r1 ret i1 %r1
} }
define internal i1 @undef_then_1(i1 %c, i32 %i32A, i32 %i32B) { define internal i1 @undef_then_1(i1 %c, i32 %i32A, i32 %i32B) {
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC____: a: ; IS__CGSCC____: a:
; IS__CGSCC____-NEXT: ret i1 false ; IS__CGSCC____-NEXT: ret i1 false
; IS__CGSCC____: b: ; IS__CGSCC____: b:
; IS__CGSCC____-NEXT: ret i1 false ; IS__CGSCC____-NEXT: ret i1 false
; ;
%cmp1 = icmp eq i32 %i32A, %i32B %cmp1 = icmp eq i32 %i32A, %i32B
%cmp2 = icmp eq i1 %cmp1, false %cmp2 = icmp eq i1 %cmp1, false
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; Taken from 50683 ; Taken from 50683
; {{{ ; {{{
@g = internal constant { [2 x i8*] } { [2 x i8*] [i8* bitcast (void (i8***)* @f1 to i8*), i8* bitcast (void (i1 (i8*)*)* @f2 to i8*)] } @g = internal constant { [2 x i8*] } { [2 x i8*] [i8* bitcast (void (i8***)* @f1 to i8*), i8* bitcast (void (i1 (i8*)*)* @f2 to i8*)] }
define internal void @f1(i8*** %a) { define internal void @f1(i8*** %a) {
; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; CHECK-LABEL: define {{[^@]+}}@f1 ; CHECK-LABEL: define {{[^@]+}}@f1
; CHECK-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0 ; CHECK-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
; CHECK-NEXT: store i8** [[X]], i8*** [[A]], align 8 ; CHECK-NEXT: store i8** [[X]], i8*** [[A]], align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%x = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0 %x = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
store i8** %x , i8*** %a, align 8 store i8** %x , i8*** %a, align 8
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; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test_liveness ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test_liveness
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS__TUNIT_OPM: t:
; IS__TUNIT_OPM-NEXT: br label [[F]] ; IS__TUNIT_OPM-NEXT: br label [[F]]
; IS__TUNIT_OPM: f: ; IS__TUNIT_OPM: f:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[T]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[T]] ]
; IS__TUNIT_OPM-NEXT: [[RC1:%.*]] = call noundef i1 @ret(i1 noundef [[P]]) #[[ATTR6]] ; IS__TUNIT_OPM-NEXT: [[RC1:%.*]] = call noundef i1 @ret(i1 noundef [[P]]) #[[ATTR8]]
; IS__TUNIT_OPM-NEXT: ret i1 [[RC1]] ; IS__TUNIT_OPM-NEXT: ret i1 [[RC1]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_liveness ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_liveness
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS__TUNIT_NPM: t:
; IS__TUNIT_NPM-NEXT: br label [[F]] ; IS__TUNIT_NPM-NEXT: br label [[F]]
; IS__TUNIT_NPM: f: ; IS__TUNIT_NPM: f:
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[T]] ] ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[T]] ]
; IS__TUNIT_NPM-NEXT: [[RC1:%.*]] = call noundef i1 @ret(i1 noundef [[P]]) #[[ATTR5]] ; IS__TUNIT_NPM-NEXT: [[RC1:%.*]] = call noundef i1 @ret(i1 noundef [[P]]) #[[ATTR7]]
; IS__TUNIT_NPM-NEXT: ret i1 [[RC1]] ; IS__TUNIT_NPM-NEXT: ret i1 [[RC1]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_liveness ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_liveness
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: br label [[F]] ; IS__CGSCC_OPM-NEXT: br label [[F]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[T]] ] ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[T]] ]
; IS__CGSCC_OPM-NEXT: [[RC1:%.*]] = call noundef i1 @ret(i1 noundef [[P]]) #[[ATTR9:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[RC1:%.*]] = call noundef i1 @ret(i1 noundef [[P]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i1 [[RC1]] ; IS__CGSCC_OPM-NEXT: ret i1 [[RC1]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_liveness ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_liveness
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t: ; IS__CGSCC_NPM: t:
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; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%r = call i8 @dead_ret() %r = call i8 @dead_ret()
ret void ret void
} }
declare void @llvm.memcpy(i8* %dest, i8* %src, i32 %len, i1 %isvolatile) declare void @llvm.memcpy(i8* %dest, i8* %src, i32 %len, i1 %isvolatile)
define internal i8 @memcpy_uses_store(i8 %arg) { define internal i8 @memcpy_uses_store(i8 %arg) {
; NOT_TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@memcpy_uses_store ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@memcpy_uses_store
; NOT_TUNIT_NPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR6:[0-9]+]] {
; NOT_TUNIT_NPM-NEXT: [[SRC:%.*]] = alloca i8, align 1 ; IS__TUNIT_OPM-NEXT: [[SRC:%.*]] = alloca i8, align 1
; NOT_TUNIT_NPM-NEXT: [[DST:%.*]] = alloca i8, align 1 ; IS__TUNIT_OPM-NEXT: [[DST:%.*]] = alloca i8, align 1
; NOT_TUNIT_NPM-NEXT: store i8 [[ARG]], i8* [[SRC]], align 1 ; IS__TUNIT_OPM-NEXT: store i8 [[ARG]], i8* [[SRC]], align 1
; NOT_TUNIT_NPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR7:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR9]]
; NOT_TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[DST]], align 1 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[DST]], align 1
; NOT_TUNIT_NPM-NEXT: ret i8 [[L]] ; IS__TUNIT_OPM-NEXT: ret i8 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@memcpy_uses_store ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@memcpy_uses_store
; IS__TUNIT_NPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR0]] { ; IS__TUNIT_NPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[SRC:%.*]] = alloca i8, align 1 ; IS__TUNIT_NPM-NEXT: [[SRC:%.*]] = alloca i8, align 1
; IS__TUNIT_NPM-NEXT: [[DST:%.*]] = alloca i8, align 1 ; IS__TUNIT_NPM-NEXT: [[DST:%.*]] = alloca i8, align 1
; IS__TUNIT_NPM-NEXT: store i8 [[ARG]], i8* [[SRC]], align 1 ; IS__TUNIT_NPM-NEXT: store i8 [[ARG]], i8* [[SRC]], align 1
; IS__TUNIT_NPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR6]] ; IS__TUNIT_NPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR8]]
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[DST]], align 1 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[DST]], align 1
; IS__TUNIT_NPM-NEXT: ret i8 [[L]] ; IS__TUNIT_NPM-NEXT: ret i8 [[L]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@memcpy_uses_store
; IS__CGSCC____-SAME: (i8 [[ARG:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: [[SRC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: [[DST:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: store i8 [[ARG]], i8* [[SRC]], align 1
; IS__CGSCC____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[DST]], i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[SRC]], i32 noundef 1, i1 noundef false) #[[ATTR9]]
; IS__CGSCC____-NEXT: [[L:%.*]] = load i8, i8* [[DST]], align 1
; IS__CGSCC____-NEXT: ret i8 [[L]]
;
%src = alloca i8 %src = alloca i8
%dst = alloca i8 %dst = alloca i8
store i8 %arg, i8* %src store i8 %arg, i8* %src
call void @llvm.memcpy(i8* %dst, i8* %src, i32 1, i1 false) call void @llvm.memcpy(i8* %dst, i8* %src, i32 1, i1 false)
%l = load i8, i8* %dst %l = load i8, i8* %dst
ret i8 %l ret i8 %l
} }
define i8 @memcpy_uses_store_caller(i8 %arg) { define i8 @memcpy_uses_store_caller(i8 %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@memcpy_uses_store_caller ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@memcpy_uses_store_caller
; IS__TUNIT____-SAME: (i8 [[ARG:%.*]]) #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR6]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR0]] ; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR6]]
; IS__TUNIT____-NEXT: ret i8 [[R]] ; IS__TUNIT_OPM-NEXT: ret i8 [[R]]
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@memcpy_uses_store_caller
; IS__TUNIT_NPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR5]]
; IS__TUNIT_NPM-NEXT: ret i8 [[R]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@memcpy_uses_store_caller ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@memcpy_uses_store_caller
; IS__CGSCC_OPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR5]] { ; IS__CGSCC_OPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR6]] {
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR10:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR12:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i8 [[R]] ; IS__CGSCC_OPM-NEXT: ret i8 [[R]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@memcpy_uses_store_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@memcpy_uses_store_caller
; IS__CGSCC_NPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR5]] { ; IS__CGSCC_NPM-SAME: (i8 [[ARG:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR8:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[R:%.*]] = call i8 @memcpy_uses_store(i8 [[ARG]]) #[[ATTR10:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i8 [[R]] ; IS__CGSCC_NPM-NEXT: ret i8 [[R]]
; ;
%r = call i8 @memcpy_uses_store(i8 %arg) %r = call i8 @memcpy_uses_store(i8 %arg)
ret i8 %r ret i8 %r
} }
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR5]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR8]] = { willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR9]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { nounwind readnone willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR10]] = { nounwind readnone willreturn }
;. ;.
; CHECK: [[RNG0]] = !{i32 0, i32 -2147483648} ; CHECK: [[RNG0]] = !{i32 0, i32 -2147483648}
;. ;.

llvm/test/Transforms/Attributor/willreturn.ll

Show All 31 Lines
define i32 @fib(i32 %0) local_unnamed_addr #0 { define i32 @fib(i32 %0) local_unnamed_addr #0 {
; IS________OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS________OPM-LABEL: define {{[^@]+}}@fib ; IS________OPM-LABEL: define {{[^@]+}}@fib
; IS________OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS________OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2 ; IS________OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2
; IS________OPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]] ; IS________OPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]]
; IS________OPM: 3: ; IS________OPM: 3:
; IS________OPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1 ; IS________OPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1
; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR25:[0-9]+]] ; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR24:[0-9]+]]
; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2 ; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2
; IS________OPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR25]] ; IS________OPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR24]]
; IS________OPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________OPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS________OPM-NEXT: ret i32 [[TMP8]] ; IS________OPM-NEXT: ret i32 [[TMP8]]
; IS________OPM: 9: ; IS________OPM: 9:
; IS________OPM-NEXT: ret i32 [[TMP0]] ; IS________OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS________NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS________NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS________NPM-LABEL: define {{[^@]+}}@fib ; IS________NPM-LABEL: define {{[^@]+}}@fib
; IS________NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS________NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2 ; IS________NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2
; IS________NPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]] ; IS________NPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]]
; IS________NPM: 3: ; IS________NPM: 3:
; IS________NPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1 ; IS________NPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1
; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR27:[0-9]+]] ; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR26:[0-9]+]]
; IS________NPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2 ; IS________NPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2
; IS________NPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR27]] ; IS________NPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR26]]
; IS________NPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________NPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS________NPM-NEXT: ret i32 [[TMP8]] ; IS________NPM-NEXT: ret i32 [[TMP8]]
; IS________NPM: 9: ; IS________NPM: 9:
; IS________NPM-NEXT: ret i32 [[TMP0]] ; IS________NPM-NEXT: ret i32 [[TMP0]]
; ;
%2 = icmp slt i32 %0, 2 %2 = icmp slt i32 %0, 2
br i1 %2, label %9, label %3 br i1 %2, label %9, label %3
▲ Show 20 Lines • Show All 128 Lines • ▼ Show 20 Lines
declare void @sink() nounwind willreturn nosync nofree declare void @sink() nounwind willreturn nosync nofree
define void @mutual_recursion1(i1 %c) #0 { define void @mutual_recursion1(i1 %c) #0 {
; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion1 ; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] {
; IS________OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS________OPM: rec: ; IS________OPM: rec:
; IS________OPM-NEXT: call void @sink() #[[ATTR13:[0-9]+]] ; IS________OPM-NEXT: call void @sink() #[[ATTR12:[0-9]+]]
; IS________OPM-NEXT: call void @mutual_recursion2(i1 [[C]]) #[[ATTR26:[0-9]+]] ; IS________OPM-NEXT: call void @mutual_recursion2(i1 [[C]]) #[[ATTR25:[0-9]+]]
; IS________OPM-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; IS________OPM: end: ; IS________OPM: end:
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion1 ; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] {
; IS________NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS________NPM: rec: ; IS________NPM: rec:
; IS________NPM-NEXT: call void @sink() #[[ATTR13:[0-9]+]] ; IS________NPM-NEXT: call void @sink() #[[ATTR12:[0-9]+]]
; IS________NPM-NEXT: call void @mutual_recursion2(i1 noundef [[C]]) #[[ATTR28:[0-9]+]] ; IS________NPM-NEXT: call void @mutual_recursion2(i1 noundef [[C]]) #[[ATTR27:[0-9]+]]
; IS________NPM-NEXT: br label [[END]] ; IS________NPM-NEXT: br label [[END]]
; IS________NPM: end: ; IS________NPM: end:
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
br i1 %c, label %rec, label %end br i1 %c, label %rec, label %end
rec: rec:
call void @sink() call void @sink()
call void @mutual_recursion2(i1 %c) call void @mutual_recursion2(i1 %c)
br label %end br label %end
end: end:
ret void ret void
} }
define void @mutual_recursion2(i1 %c) #0 { define void @mutual_recursion2(i1 %c) #0 {
; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion2 ; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; IS________OPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR26]] ; IS________OPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR25]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion2 ; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; IS________NPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR28]] ; IS________NPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR27]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
call void @mutual_recursion1(i1 %c) call void @mutual_recursion1(i1 %c)
ret void ret void
} }
; TEST 5 (negative case) ; TEST 5 (negative case)
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines; <label>:8: ; preds = %5
unreachable unreachable
; <label>:9: ; preds = %5 ; <label>:9: ; preds = %5
ret void ret void
} }
; TEST 6 (positive case) ; TEST 6 (positive case)
; Call intrinsic function ; Call intrinsic function
; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn ; CHECK: Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
; CHECK-NEXT: declare float @llvm.floor.f32(float) ; CHECK-NEXT: declare float @llvm.floor.f32(float)
declare float @llvm.floor.f32(float) declare float @llvm.floor.f32(float)
define void @call_floor(float %a) #0 { define void @call_floor(float %a) #0 {
; CHECK: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone willreturn uwtable
; CHECK-LABEL: define {{[^@]+}}@call_floor ; CHECK-LABEL: define {{[^@]+}}@call_floor
; CHECK-SAME: (float [[A:%.*]]) #[[ATTR9:[0-9]+]] { ; CHECK-SAME: (float [[A:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
tail call float @llvm.floor.f32(float %a) tail call float @llvm.floor.f32(float %a)
ret void ret void
} }
define float @call_floor2(float %a) #0 { define float @call_floor2(float %a) #0 {
; IS________OPM: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable ; IS________OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone willreturn uwtable
; IS________OPM-LABEL: define {{[^@]+}}@call_floor2 ; IS________OPM-LABEL: define {{[^@]+}}@call_floor2
; IS________OPM-SAME: (float [[A:%.*]]) #[[ATTR9]] { ; IS________OPM-SAME: (float [[A:%.*]]) #[[ATTR0]] {
; IS________OPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR27:[0-9]+]] ; IS________OPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR26:[0-9]+]]
; IS________OPM-NEXT: ret float [[C]] ; IS________OPM-NEXT: ret float [[C]]
; ;
; IS________NPM: Function Attrs: nofree noinline nosync nounwind readnone willreturn uwtable ; IS________NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone willreturn uwtable
; IS________NPM-LABEL: define {{[^@]+}}@call_floor2 ; IS________NPM-LABEL: define {{[^@]+}}@call_floor2
; IS________NPM-SAME: (float [[A:%.*]]) #[[ATTR9]] { ; IS________NPM-SAME: (float [[A:%.*]]) #[[ATTR0]] {
; IS________NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR29:[0-9]+]] ; IS________NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR28:[0-9]+]]
; IS________NPM-NEXT: ret float [[C]] ; IS________NPM-NEXT: ret float [[C]]
; ;
%c = tail call float @llvm.floor.f32(float %a) %c = tail call float @llvm.floor.f32(float %a)
ret float %c ret float %c
} }
; TEST 7 (negative case) ; TEST 7 (negative case)
; Call function declaration without willreturn ; Call function declaration without willreturn
; CHECK: Function Attrs: noinline nounwind uwtable ; CHECK: Function Attrs: noinline nounwind uwtable
; CHECK-NOT: willreturn ; CHECK-NOT: willreturn
; CHECK-NEXT: declare void @maybe_noreturn() ; CHECK-NEXT: declare void @maybe_noreturn()
declare void @maybe_noreturn() #0 declare void @maybe_noreturn() #0
define void @call_maybe_noreturn() #0 { define void @call_maybe_noreturn() #0 {
; IS________OPM: Function Attrs: noinline nounwind uwtable ; IS________OPM: Function Attrs: noinline nounwind uwtable
; IS________OPM-LABEL: define {{[^@]+}}@call_maybe_noreturn ; IS________OPM-LABEL: define {{[^@]+}}@call_maybe_noreturn
; IS________OPM-SAME: () #[[ATTR7]] { ; IS________OPM-SAME: () #[[ATTR7]] {
; IS________OPM-NEXT: tail call void @maybe_noreturn() #[[ATTR28:[0-9]+]] ; IS________OPM-NEXT: tail call void @maybe_noreturn() #[[ATTR27:[0-9]+]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: noinline nounwind uwtable ; IS________NPM: Function Attrs: noinline nounwind uwtable
; IS________NPM-LABEL: define {{[^@]+}}@call_maybe_noreturn ; IS________NPM-LABEL: define {{[^@]+}}@call_maybe_noreturn
; IS________NPM-SAME: () #[[ATTR7]] { ; IS________NPM-SAME: () #[[ATTR7]] {
; IS________NPM-NEXT: tail call void @maybe_noreturn() #[[ATTR30:[0-9]+]] ; IS________NPM-NEXT: tail call void @maybe_noreturn() #[[ATTR29:[0-9]+]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
tail call void @maybe_noreturn() tail call void @maybe_noreturn()
ret void ret void
} }
; TEST 8 (positive case) ; TEST 8 (positive case)
; Check propagation. ; Check propagation.
; CHECK: Function Attrs: norecurse willreturn ; CHECK: Function Attrs: norecurse willreturn
; CHECK-NEXT: declare void @will_return() ; CHECK-NEXT: declare void @will_return()
declare void @will_return() willreturn norecurse declare void @will_return() willreturn norecurse
define void @f1() #0 { define void @f1() #0 {
; IS________OPM: Function Attrs: noinline nounwind willreturn uwtable ; IS________OPM: Function Attrs: noinline nounwind willreturn uwtable
; IS________OPM-LABEL: define {{[^@]+}}@f1 ; IS________OPM-LABEL: define {{[^@]+}}@f1
; IS________OPM-SAME: () #[[ATTR11:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR10:[0-9]+]] {
; IS________OPM-NEXT: tail call void @will_return() #[[ATTR29:[0-9]+]] ; IS________OPM-NEXT: tail call void @will_return() #[[ATTR28:[0-9]+]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: noinline nounwind willreturn uwtable ; IS________NPM: Function Attrs: noinline nounwind willreturn uwtable
; IS________NPM-LABEL: define {{[^@]+}}@f1 ; IS________NPM-LABEL: define {{[^@]+}}@f1
; IS________NPM-SAME: () #[[ATTR11:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR10:[0-9]+]] {
; IS________NPM-NEXT: tail call void @will_return() #[[ATTR31:[0-9]+]] ; IS________NPM-NEXT: tail call void @will_return() #[[ATTR30:[0-9]+]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
tail call void @will_return() tail call void @will_return()
ret void ret void
} }
define void @f2() #0 { define void @f2() #0 {
; CHECK: Function Attrs: noinline nounwind willreturn uwtable ; CHECK: Function Attrs: noinline nounwind willreturn uwtable
; CHECK-LABEL: define {{[^@]+}}@f2 ; CHECK-LABEL: define {{[^@]+}}@f2
; CHECK-SAME: () #[[ATTR11:[0-9]+]] { ; CHECK-SAME: () #[[ATTR10:[0-9]+]] {
; CHECK-NEXT: tail call void @f1() #[[ATTR13:[0-9]+]] ; CHECK-NEXT: tail call void @f1() #[[ATTR12:[0-9]+]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
tail call void @f1() tail call void @f1()
ret void ret void
} }
; TEST 9 (negative case) ; TEST 9 (negative case)
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; CHECK: Function Attrs: noinline willreturn uwtable ; CHECK: Function Attrs: noinline willreturn uwtable
; CHECK-NEXT: declare i1 @maybe_raise_exception() ; CHECK-NEXT: declare i1 @maybe_raise_exception()
declare i1 @maybe_raise_exception() #1 willreturn declare i1 @maybe_raise_exception() #1 willreturn
define void @invoke_test() personality i32 (...)* @__gxx_personality_v0 { define void @invoke_test() personality i32 (...)* @__gxx_personality_v0 {
; IS________OPM: Function Attrs: nounwind willreturn ; IS________OPM: Function Attrs: nounwind willreturn
; IS________OPM-LABEL: define {{[^@]+}}@invoke_test ; IS________OPM-LABEL: define {{[^@]+}}@invoke_test
; IS________OPM-SAME: () #[[ATTR13]] personality i32 (...)* @__gxx_personality_v0 { ; IS________OPM-SAME: () #[[ATTR12]] personality i32 (...)* @__gxx_personality_v0 {
; IS________OPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR29]] ; IS________OPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR28]]
; IS________OPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]] ; IS________OPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]]
; IS________OPM: N: ; IS________OPM: N:
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS________OPM: F: ; IS________OPM: F:
; IS________OPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 } ; IS________OPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 }
; IS________OPM-NEXT: catch i8* null ; IS________OPM-NEXT: catch i8* null
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: nounwind willreturn ; IS________NPM: Function Attrs: nounwind willreturn
; IS________NPM-LABEL: define {{[^@]+}}@invoke_test ; IS________NPM-LABEL: define {{[^@]+}}@invoke_test
; IS________NPM-SAME: () #[[ATTR13]] personality i32 (...)* @__gxx_personality_v0 { ; IS________NPM-SAME: () #[[ATTR12]] personality i32 (...)* @__gxx_personality_v0 {
; IS________NPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR31]] ; IS________NPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR30]]
; IS________NPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]] ; IS________NPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]]
; IS________NPM: N: ; IS________NPM: N:
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS________NPM: F: ; IS________NPM: F:
; IS________NPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 } ; IS________NPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 }
; IS________NPM-NEXT: catch i8* null ; IS________NPM-NEXT: catch i8* null
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
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; ans += p[i]; ; ans += p[i];
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @loop_constant_trip_count(i32* nocapture readonly %0) #0 { define i32 @loop_constant_trip_count(i32* nocapture readonly %0) #0 {
; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable ; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS________OPM-LABEL: define {{[^@]+}}@loop_constant_trip_count ; IS________OPM-LABEL: define {{[^@]+}}@loop_constant_trip_count
; IS________OPM-SAME: (i32* nocapture nofree readonly [[TMP0:%.*]]) #[[ATTR14:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree readonly [[TMP0:%.*]]) #[[ATTR13:[0-9]+]] {
; IS________OPM-NEXT: br label [[TMP3:%.*]] ; IS________OPM-NEXT: br label [[TMP3:%.*]]
; IS________OPM: 2: ; IS________OPM: 2:
; IS________OPM-NEXT: ret i32 [[TMP8:%.*]] ; IS________OPM-NEXT: ret i32 [[TMP8:%.*]]
; IS________OPM: 3: ; IS________OPM: 3:
; IS________OPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ] ; IS________OPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ]
; IS________OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ] ; IS________OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ]
; IS________OPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]] ; IS________OPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]]
; IS________OPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 ; IS________OPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
; IS________OPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________OPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS________OPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1 ; IS________OPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1
; IS________OPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10 ; IS________OPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10
; IS________OPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]] ; IS________OPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]]
; ;
; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly willreturn uwtable ; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly willreturn uwtable
; IS________NPM-LABEL: define {{[^@]+}}@loop_constant_trip_count ; IS________NPM-LABEL: define {{[^@]+}}@loop_constant_trip_count
; IS________NPM-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[TMP0:%.*]]) #[[ATTR14:[0-9]+]] { ; IS________NPM-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[TMP0:%.*]]) #[[ATTR13:[0-9]+]] {
; IS________NPM-NEXT: br label [[TMP3:%.*]] ; IS________NPM-NEXT: br label [[TMP3:%.*]]
; IS________NPM: 2: ; IS________NPM: 2:
; IS________NPM-NEXT: ret i32 [[TMP8:%.*]] ; IS________NPM-NEXT: ret i32 [[TMP8:%.*]]
; IS________NPM: 3: ; IS________NPM: 3:
; IS________NPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ] ; IS________NPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ]
; IS________NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ] ; IS________NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ]
; IS________NPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]] ; IS________NPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]]
; IS________NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 ; IS________NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
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; for(unsigned i = s;i != e;i+=offset){ ; for(unsigned i = s;i != e;i+=offset){
; ans += p[i]; ; ans += p[i];
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr #0 { define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr #0 {
; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable ; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS________OPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound ; IS________OPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound
; IS________OPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR14]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR13]] {
; IS________OPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] ; IS________OPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
; IS________OPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]] ; IS________OPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]]
; IS________OPM: 6: ; IS________OPM: 6:
; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ]
; IS________OPM-NEXT: ret i32 [[TMP7]] ; IS________OPM-NEXT: ret i32 [[TMP7]]
; IS________OPM: 8: ; IS________OPM: 8:
; IS________OPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ] ; IS________OPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ]
; IS________OPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ] ; IS________OPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ]
; IS________OPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64 ; IS________OPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64
; IS________OPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]] ; IS________OPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]]
; IS________OPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 ; IS________OPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
; IS________OPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]] ; IS________OPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]]
; IS________OPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]] ; IS________OPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]]
; IS________OPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]] ; IS________OPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]]
; IS________OPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]] ; IS________OPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]]
; ;
; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable ; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS________NPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound ; IS________NPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound
; IS________NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR15:[0-9]+]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR14:[0-9]+]] {
; IS________NPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] ; IS________NPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
; IS________NPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]] ; IS________NPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]]
; IS________NPM: 6: ; IS________NPM: 6:
; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ]
; IS________NPM-NEXT: ret i32 [[TMP7]] ; IS________NPM-NEXT: ret i32 [[TMP7]]
; IS________NPM: 8: ; IS________NPM: 8:
; IS________NPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ] ; IS________NPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ]
; IS________NPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ] ; IS________NPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ]
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; } ; }
; return ans; ; return ans;
; } ; }
define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 { define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 {
; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable ; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS________OPM-LABEL: define {{[^@]+}}@loop_trip_dec ; IS________OPM-LABEL: define {{[^@]+}}@loop_trip_dec
; IS________OPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR14]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR13]] {
; IS________OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1
; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]]
; IS________OPM: 4: ; IS________OPM: 4:
; IS________OPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64 ; IS________OPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64
; IS________OPM-NEXT: br label [[TMP6:%.*]] ; IS________OPM-NEXT: br label [[TMP6:%.*]]
; IS________OPM: 6: ; IS________OPM: 6:
; IS________OPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ]
; IS________OPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ] ; IS________OPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ]
; IS________OPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]] ; IS________OPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]]
; IS________OPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 ; IS________OPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
; IS________OPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]] ; IS________OPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]]
; IS________OPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1 ; IS________OPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1
; IS________OPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0 ; IS________OPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0
; IS________OPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]] ; IS________OPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]]
; IS________OPM: 14: ; IS________OPM: 14:
; IS________OPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ] ; IS________OPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ]
; IS________OPM-NEXT: ret i32 [[TMP15]] ; IS________OPM-NEXT: ret i32 [[TMP15]]
; ;
; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly willreturn uwtable ; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly willreturn uwtable
; IS________NPM-LABEL: define {{[^@]+}}@loop_trip_dec ; IS________NPM-LABEL: define {{[^@]+}}@loop_trip_dec
; IS________NPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR14]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR13]] {
; IS________NPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1 ; IS________NPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1
; IS________NPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]] ; IS________NPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]]
; IS________NPM: 4: ; IS________NPM: 4:
; IS________NPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64 ; IS________NPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64
; IS________NPM-NEXT: br label [[TMP6:%.*]] ; IS________NPM-NEXT: br label [[TMP6:%.*]]
; IS________NPM: 6: ; IS________NPM: 6:
; IS________NPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ]
; IS________NPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ] ; IS________NPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ]
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; TEST 15 (positive & negative case) ; TEST 15 (positive & negative case)
; unreachable exit ; unreachable exit
; 15.1 (positive case) ; 15.1 (positive case)
define void @unreachable_exit_positive1() #0 { define void @unreachable_exit_positive1() #0 {
; IS________OPM: Function Attrs: noinline nounwind willreturn uwtable ; IS________OPM: Function Attrs: noinline nounwind willreturn uwtable
; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1 ; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1
; IS________OPM-SAME: () #[[ATTR11]] { ; IS________OPM-SAME: () #[[ATTR10]] {
; IS________OPM-NEXT: tail call void @will_return() #[[ATTR29]] ; IS________OPM-NEXT: tail call void @will_return() #[[ATTR28]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS________OPM: unreachable_label: ; IS________OPM: unreachable_label:
; IS________OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; ;
; IS________NPM: Function Attrs: noinline nounwind willreturn uwtable ; IS________NPM: Function Attrs: noinline nounwind willreturn uwtable
; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1 ; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1
; IS________NPM-SAME: () #[[ATTR11]] { ; IS________NPM-SAME: () #[[ATTR10]] {
; IS________NPM-NEXT: tail call void @will_return() #[[ATTR31]] ; IS________NPM-NEXT: tail call void @will_return() #[[ATTR30]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS________NPM: unreachable_label: ; IS________NPM: unreachable_label:
; IS________NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; ;
tail call void @will_return() tail call void @will_return()
ret void ret void
unreachable_label: unreachable_label:
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unreachable_label: unreachable_label:
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
define void @unreachable_exit_negative2() #0 { define void @unreachable_exit_negative2() #0 {
; IS________OPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable ; IS________OPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2 ; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2
; IS________OPM-SAME: () #[[ATTR15:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR14:[0-9]+]] {
; IS________OPM-NEXT: br label [[L1:%.*]] ; IS________OPM-NEXT: br label [[L1:%.*]]
; IS________OPM: L1: ; IS________OPM: L1:
; IS________OPM-NEXT: br label [[L2:%.*]] ; IS________OPM-NEXT: br label [[L2:%.*]]
; IS________OPM: L2: ; IS________OPM: L2:
; IS________OPM-NEXT: br label [[L1]] ; IS________OPM-NEXT: br label [[L1]]
; IS________OPM: unreachable_label: ; IS________OPM: unreachable_label:
; IS________OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; ;
; IS________NPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable ; IS________NPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2 ; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2
; IS________NPM-SAME: () #[[ATTR16:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR15:[0-9]+]] {
; IS________NPM-NEXT: br label [[L1:%.*]] ; IS________NPM-NEXT: br label [[L1:%.*]]
; IS________NPM: L1: ; IS________NPM: L1:
; IS________NPM-NEXT: br label [[L2:%.*]] ; IS________NPM-NEXT: br label [[L2:%.*]]
; IS________NPM: L2: ; IS________NPM: L2:
; IS________NPM-NEXT: br label [[L1]] ; IS________NPM-NEXT: br label [[L1]]
; IS________NPM: unreachable_label: ; IS________NPM: unreachable_label:
; IS________NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; ;
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; ans++; ; ans++;
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @infinite_loop_inside_bounded_loop(i32 %n) { define i32 @infinite_loop_inside_bounded_loop(i32 %n) {
; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________OPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop ; IS________OPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop
; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17:[0-9]+]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR16:[0-9]+]] {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS________OPM: for.cond: ; IS________OPM: for.cond:
; IS________OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS________OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS________OPM-NEXT: br label [[FOR_END:%.*]] ; IS________OPM-NEXT: br label [[FOR_END:%.*]]
; IS________OPM: for.body: ; IS________OPM: for.body:
; IS________OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS________OPM: while.cond: ; IS________OPM: while.cond:
; IS________OPM-NEXT: br label [[WHILE_BODY:%.*]] ; IS________OPM-NEXT: br label [[WHILE_BODY:%.*]]
; IS________OPM: while.body: ; IS________OPM: while.body:
; IS________OPM-NEXT: br label [[WHILE_COND]] ; IS________OPM-NEXT: br label [[WHILE_COND]]
; IS________OPM: for.inc: ; IS________OPM: for.inc:
; IS________OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS________OPM: for.end: ; IS________OPM: for.end:
; IS________OPM-NEXT: ret i32 0 ; IS________OPM-NEXT: ret i32 0
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________NPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop ; IS________NPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop
; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18:[0-9]+]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR17:[0-9]+]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS________NPM: for.cond: ; IS________NPM: for.cond:
; IS________NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0 ; IS________NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS________NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS________NPM-NEXT: br label [[FOR_END:%.*]] ; IS________NPM-NEXT: br label [[FOR_END:%.*]]
; IS________NPM: for.body: ; IS________NPM: for.body:
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; } ; }
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @bounded_nested_loops(i32 %n) { define i32 @bounded_nested_loops(i32 %n) {
; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________OPM-LABEL: define {{[^@]+}}@bounded_nested_loops ; IS________OPM-LABEL: define {{[^@]+}}@bounded_nested_loops
; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS________OPM: for.cond: ; IS________OPM: for.cond:
; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ] ; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ]
; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ] ; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ]
; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ] ; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ]
; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]] ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]]
; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; IS________OPM: for.inc: ; IS________OPM: for.inc:
; IS________OPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1 ; IS________OPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1
; IS________OPM-NEXT: br label [[FOR_COND]] ; IS________OPM-NEXT: br label [[FOR_COND]]
; IS________OPM: for.end: ; IS________OPM: for.end:
; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS________NPM-LABEL: define {{[^@]+}}@bounded_nested_loops ; IS________NPM-LABEL: define {{[^@]+}}@bounded_nested_loops
; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR19:[0-9]+]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18:[0-9]+]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS________NPM: for.cond: ; IS________NPM: for.cond:
; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ] ; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ]
; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ] ; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ]
; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ] ; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ]
; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]] ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]]
; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; } ; }
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @bounded_loop_inside_unbounded_loop(i32 %n) { define i32 @bounded_loop_inside_unbounded_loop(i32 %n) {
; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________OPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop ; IS________OPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop
; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS________OPM: while.cond: ; IS________OPM: while.cond:
; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ] ; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ] ; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; IS________OPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1 ; IS________OPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; IS________OPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1 ; IS________OPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
; IS________OPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1
Show All 14 Lines
; IS________OPM: for.end: ; IS________OPM: for.end:
; IS________OPM-NEXT: br label [[WHILE_COND]] ; IS________OPM-NEXT: br label [[WHILE_COND]]
; IS________OPM: while.end: ; IS________OPM: while.end:
; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ] ; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________NPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop ; IS________NPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop
; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS________NPM: while.cond: ; IS________NPM: while.cond:
; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ] ; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ] ; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; IS________NPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1 ; IS________NPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; IS________NPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1 ; IS________NPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
; IS________NPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1 ; IS________NPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1
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; } ; }
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @nested_unbounded_loops(i32 %n) { define i32 @nested_unbounded_loops(i32 %n) {
; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________OPM-LABEL: define {{[^@]+}}@nested_unbounded_loops ; IS________OPM-LABEL: define {{[^@]+}}@nested_unbounded_loops
; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] {
; IS________OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS________OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS________OPM: while.cond: ; IS________OPM: while.cond:
; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ] ; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ] ; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0 ; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
; IS________OPM: while.body: ; IS________OPM: while.body:
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; IS________OPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]] ; IS________OPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]]
; IS________OPM-NEXT: br label [[WHILE_COND]] ; IS________OPM-NEXT: br label [[WHILE_COND]]
; IS________OPM: while.end11: ; IS________OPM: while.end11:
; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ] ; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS________NPM-LABEL: define {{[^@]+}}@nested_unbounded_loops ; IS________NPM-LABEL: define {{[^@]+}}@nested_unbounded_loops
; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS________NPM: while.cond: ; IS________NPM: while.cond:
; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ] ; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ] ; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
; IS________NPM: while.body: ; IS________NPM: while.body:
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; goto entry1; ; goto entry1;
; exit: ; exit:
; return; ; return;
; } ; }
define void @non_loop_cycle(i32 %n) { define void @non_loop_cycle(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] { ; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR25]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR24]]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY1:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY1:%.*]]
; IS__TUNIT_OPM: if.else: ; IS__TUNIT_OPM: if.else:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY2:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY2:%.*]]
; IS__TUNIT_OPM: entry1: ; IS__TUNIT_OPM: entry1:
; IS__TUNIT_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR25]] ; IS__TUNIT_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR24]]
; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5 ; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5
; IS__TUNIT_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]]
; IS__TUNIT_OPM: if.then3: ; IS__TUNIT_OPM: if.then3:
; IS__TUNIT_OPM-NEXT: br label [[EXIT:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[EXIT:%.*]]
; IS__TUNIT_OPM: if.else4: ; IS__TUNIT_OPM: if.else4:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY2]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY2]]
; IS__TUNIT_OPM: entry2: ; IS__TUNIT_OPM: entry2:
; IS__TUNIT_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR25]] ; IS__TUNIT_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR24]]
; IS__TUNIT_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5 ; IS__TUNIT_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5
; IS__TUNIT_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
; IS__TUNIT_OPM: if.then7: ; IS__TUNIT_OPM: if.then7:
; IS__TUNIT_OPM-NEXT: br label [[EXIT]] ; IS__TUNIT_OPM-NEXT: br label [[EXIT]]
; IS__TUNIT_OPM: if.else8: ; IS__TUNIT_OPM: if.else8:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY1]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY1]]
; IS__TUNIT_OPM: exit: ; IS__TUNIT_OPM: exit:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] { ; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR27]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR26]]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__TUNIT_NPM: if.then: ; IS__TUNIT_NPM: if.then:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY1:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY1:%.*]]
; IS__TUNIT_NPM: if.else: ; IS__TUNIT_NPM: if.else:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY2:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY2:%.*]]
; IS__TUNIT_NPM: entry1: ; IS__TUNIT_NPM: entry1:
; IS__TUNIT_NPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR27]] ; IS__TUNIT_NPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR26]]
; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5 ; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5
; IS__TUNIT_NPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]]
; IS__TUNIT_NPM: if.then3: ; IS__TUNIT_NPM: if.then3:
; IS__TUNIT_NPM-NEXT: br label [[EXIT:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[EXIT:%.*]]
; IS__TUNIT_NPM: if.else4: ; IS__TUNIT_NPM: if.else4:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY2]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY2]]
; IS__TUNIT_NPM: entry2: ; IS__TUNIT_NPM: entry2:
; IS__TUNIT_NPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR27]] ; IS__TUNIT_NPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR26]]
; IS__TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5 ; IS__TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5
; IS__TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
; IS__TUNIT_NPM: if.then7: ; IS__TUNIT_NPM: if.then7:
; IS__TUNIT_NPM-NEXT: br label [[EXIT]] ; IS__TUNIT_NPM-NEXT: br label [[EXIT]]
; IS__TUNIT_NPM: if.else8: ; IS__TUNIT_NPM: if.else8:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY1]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY1]]
; IS__TUNIT_NPM: exit: ; IS__TUNIT_NPM: exit:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] { ; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR30:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR29:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY1:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY1:%.*]]
; IS__CGSCC_OPM: if.else: ; IS__CGSCC_OPM: if.else:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY2:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY2:%.*]]
; IS__CGSCC_OPM: entry1: ; IS__CGSCC_OPM: entry1:
; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR30]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR29]]
; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5 ; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5
; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]]
; IS__CGSCC_OPM: if.then3: ; IS__CGSCC_OPM: if.then3:
; IS__CGSCC_OPM-NEXT: br label [[EXIT:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[EXIT:%.*]]
; IS__CGSCC_OPM: if.else4: ; IS__CGSCC_OPM: if.else4:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY2]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY2]]
; IS__CGSCC_OPM: entry2: ; IS__CGSCC_OPM: entry2:
; IS__CGSCC_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR30]] ; IS__CGSCC_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR29]]
; IS__CGSCC_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5 ; IS__CGSCC_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5
; IS__CGSCC_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
; IS__CGSCC_OPM: if.then7: ; IS__CGSCC_OPM: if.then7:
; IS__CGSCC_OPM-NEXT: br label [[EXIT]] ; IS__CGSCC_OPM-NEXT: br label [[EXIT]]
; IS__CGSCC_OPM: if.else8: ; IS__CGSCC_OPM: if.else8:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY1]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY1]]
; IS__CGSCC_OPM: exit: ; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] { ; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]])
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: br label [[ENTRY1:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[ENTRY1:%.*]]
; IS__CGSCC_NPM: if.else: ; IS__CGSCC_NPM: if.else:
; IS__CGSCC_NPM-NEXT: br label [[ENTRY2:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[ENTRY2:%.*]]
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
declare void @readonly() readonly declare void @readonly() readonly
declare void @readnone() readnone declare void @readnone() readnone
declare void @unknown_mustprogress() mustprogress declare void @unknown_mustprogress() mustprogress
declare void @readonly_mustprogress() readonly mustprogress declare void @readonly_mustprogress() readonly mustprogress
define void @willreturn_mustprogress_caller_1() mustprogress { define void @willreturn_mustprogress_caller_1() mustprogress {
; IS________OPM: Function Attrs: mustprogress ; IS________OPM: Function Attrs: mustprogress
; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1
; IS________OPM-SAME: () #[[ATTR20:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR19:[0-9]+]] {
; IS________OPM-NEXT: call void @unknown() ; IS________OPM-NEXT: call void @unknown()
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: mustprogress ; IS________NPM: Function Attrs: mustprogress
; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1
; IS________NPM-SAME: () #[[ATTR22:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR21:[0-9]+]] {
; IS________NPM-NEXT: call void @unknown() ; IS________NPM-NEXT: call void @unknown()
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
call void @unknown() call void @unknown()
ret void ret void
} }
define void @willreturn_mustprogress_caller_2() mustprogress { define void @willreturn_mustprogress_caller_2() mustprogress {
; IS________OPM: Function Attrs: mustprogress readonly willreturn ; IS________OPM: Function Attrs: mustprogress readonly willreturn
; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2
; IS________OPM-SAME: () #[[ATTR22:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR21:[0-9]+]] {
; IS________OPM-NEXT: call void @readonly() #[[ATTR18:[0-9]+]] ; IS________OPM-NEXT: call void @readonly() #[[ATTR17:[0-9]+]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: mustprogress readonly willreturn ; IS________NPM: Function Attrs: mustprogress readonly willreturn
; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2
; IS________NPM-SAME: () #[[ATTR24:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR23:[0-9]+]] {
; IS________NPM-NEXT: call void @readonly() #[[ATTR20:[0-9]+]] ; IS________NPM-NEXT: call void @readonly() #[[ATTR19:[0-9]+]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
call void @readonly() call void @readonly()
ret void ret void
} }
define void @willreturn_mustprogress_caller_3() mustprogress { define void @willreturn_mustprogress_caller_3() mustprogress {
; IS________OPM: Function Attrs: mustprogress nosync readnone willreturn ; IS________OPM: Function Attrs: mustprogress nosync readnone willreturn
; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3
; IS________OPM-SAME: () #[[ATTR23:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR22:[0-9]+]] {
; IS________OPM-NEXT: call void @readnone() ; IS________OPM-NEXT: call void @readnone()
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: mustprogress nosync readnone willreturn ; IS________NPM: Function Attrs: mustprogress nosync readnone willreturn
; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3
; IS________NPM-SAME: () #[[ATTR25:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR24:[0-9]+]] {
; IS________NPM-NEXT: call void @readnone() ; IS________NPM-NEXT: call void @readnone()
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
call void @readnone() call void @readnone()
ret void ret void
} }
define void @willreturn_mustprogress_callee_1() { define void @willreturn_mustprogress_callee_1() {
; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_1() { ; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_1() {
; CHECK-NEXT: call void @unknown_mustprogress() ; CHECK-NEXT: call void @unknown_mustprogress()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @unknown_mustprogress() call void @unknown_mustprogress()
ret void ret void
} }
define void @willreturn_mustprogress_callee_2() { define void @willreturn_mustprogress_callee_2() {
; IS________OPM: Function Attrs: readonly willreturn ; IS________OPM: Function Attrs: readonly willreturn
; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2
; IS________OPM-SAME: () #[[ATTR24:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR23:[0-9]+]] {
; IS________OPM-NEXT: call void @readonly_mustprogress() #[[ATTR24]] ; IS________OPM-NEXT: call void @readonly_mustprogress() #[[ATTR23]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: readonly willreturn ; IS________NPM: Function Attrs: readonly willreturn
; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2
; IS________NPM-SAME: () #[[ATTR26:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR25:[0-9]+]] {
; IS________NPM-NEXT: call void @readonly_mustprogress() #[[ATTR26]] ; IS________NPM-NEXT: call void @readonly_mustprogress() #[[ATTR25]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
call void @readonly_mustprogress() call void @readonly_mustprogress()
ret void ret void
} }
define void @willreturn_mustprogress_callee_3() { define void @willreturn_mustprogress_callee_3() {
; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_3() { ; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_3() {
; CHECK-NEXT: call void @willreturn_mustprogress_callee_1() ; CHECK-NEXT: call void @willreturn_mustprogress_callee_1()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @willreturn_mustprogress_callee_1() call void @willreturn_mustprogress_callee_1()
ret void ret void
} }
define void @willreturn_mustprogress_callee_4() { define void @willreturn_mustprogress_callee_4() {
; IS________OPM: Function Attrs: readonly willreturn ; IS________OPM: Function Attrs: readonly willreturn
; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4
; IS________OPM-SAME: () #[[ATTR24]] { ; IS________OPM-SAME: () #[[ATTR23]] {
; IS________OPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR24]] ; IS________OPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR23]]
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: readonly willreturn ; IS________NPM: Function Attrs: readonly willreturn
; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4
; IS________NPM-SAME: () #[[ATTR26]] { ; IS________NPM-SAME: () #[[ATTR25]] {
; IS________NPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR26]] ; IS________NPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR25]]
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
call void @willreturn_mustprogress_callee_2() call void @willreturn_mustprogress_callee_2()
ret void ret void
} }
attributes #0 = { nounwind uwtable noinline } attributes #0 = { nounwind uwtable noinline }
attributes #1 = { uwtable noinline } attributes #1 = { uwtable noinline }
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { noreturn } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { noreturn }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone willreturn uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR9:[0-9]+]] = { norecurse willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR10]] = { noinline nounwind willreturn uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR11]] = { noinline nounwind willreturn uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR11:[0-9]+]] = { noinline willreturn uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR12:[0-9]+]] = { noinline willreturn uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR12]] = { nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR13]] = { nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR13]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR14]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR15]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR15:[0-9]+]] = { noreturn nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR16:[0-9]+]] = { noreturn nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR16]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR17]] = { nofree norecurse nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR17]] = { readonly }
; IS__TUNIT_OPM: attributes #[[ATTR18]] = { readonly } ; IS__TUNIT_OPM: attributes #[[ATTR18:[0-9]+]] = { readnone }
; IS__TUNIT_OPM: attributes #[[ATTR19:[0-9]+]] = { readnone } ; IS__TUNIT_OPM: attributes #[[ATTR19]] = { mustprogress }
; IS__TUNIT_OPM: attributes #[[ATTR20]] = { mustprogress } ; IS__TUNIT_OPM: attributes #[[ATTR20:[0-9]+]] = { mustprogress readonly }
; IS__TUNIT_OPM: attributes #[[ATTR21:[0-9]+]] = { mustprogress readonly } ; IS__TUNIT_OPM: attributes #[[ATTR21]] = { mustprogress readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR22]] = { mustprogress readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR22]] = { mustprogress nosync readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR23]] = { mustprogress nosync readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR23]] = { readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR24]] = { readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR24]] = { nofree nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR25]] = { nofree nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR25]] = { nofree nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR26]] = { nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR26]] = { readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR27]] = { readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR27]] = { nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR28]] = { nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR28]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR29]] = { willreturn }
;. ;.
; IS________NPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable } ; IS________NPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable }
; IS________NPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS________NPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS________NPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable } ; IS________NPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS________NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS________NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS________NPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable } ; IS________NPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS________NPM: attributes #[[ATTR5]] = { noreturn } ; IS________NPM: attributes #[[ATTR5]] = { noreturn }
; IS________NPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable } ; IS________NPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS________NPM: attributes #[[ATTR7]] = { noinline nounwind uwtable } ; IS________NPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS________NPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS________NPM: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS________NPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone willreturn uwtable } ; IS________NPM: attributes #[[ATTR9:[0-9]+]] = { norecurse willreturn }
; IS________NPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn } ; IS________NPM: attributes #[[ATTR10]] = { noinline nounwind willreturn uwtable }
; IS________NPM: attributes #[[ATTR11]] = { noinline nounwind willreturn uwtable } ; IS________NPM: attributes #[[ATTR11:[0-9]+]] = { noinline willreturn uwtable }
; IS________NPM: attributes #[[ATTR12:[0-9]+]] = { noinline willreturn uwtable } ; IS________NPM: attributes #[[ATTR12]] = { nounwind willreturn }
; IS________NPM: attributes #[[ATTR13]] = { nounwind willreturn } ; IS________NPM: attributes #[[ATTR13]] = { argmemonly nofree noinline norecurse nosync nounwind readonly willreturn uwtable }
; IS________NPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly willreturn uwtable } ; IS________NPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS________NPM: attributes #[[ATTR15]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable } ; IS________NPM: attributes #[[ATTR15]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS________NPM: attributes #[[ATTR16]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable } ; IS________NPM: attributes #[[ATTR16:[0-9]+]] = { noreturn nounwind }
; IS________NPM: attributes #[[ATTR17:[0-9]+]] = { noreturn nounwind } ; IS________NPM: attributes #[[ATTR17]] = { nofree norecurse nosync nounwind readnone }
; IS________NPM: attributes #[[ATTR18]] = { nofree norecurse nosync nounwind readnone } ; IS________NPM: attributes #[[ATTR18]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS________NPM: attributes #[[ATTR19]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS________NPM: attributes #[[ATTR19]] = { readonly }
; IS________NPM: attributes #[[ATTR20]] = { readonly } ; IS________NPM: attributes #[[ATTR20:[0-9]+]] = { readnone }
; IS________NPM: attributes #[[ATTR21:[0-9]+]] = { readnone } ; IS________NPM: attributes #[[ATTR21]] = { mustprogress }
; IS________NPM: attributes #[[ATTR22]] = { mustprogress } ; IS________NPM: attributes #[[ATTR22:[0-9]+]] = { mustprogress readonly }
; IS________NPM: attributes #[[ATTR23:[0-9]+]] = { mustprogress readonly } ; IS________NPM: attributes #[[ATTR23]] = { mustprogress readonly willreturn }
; IS________NPM: attributes #[[ATTR24]] = { mustprogress readonly willreturn } ; IS________NPM: attributes #[[ATTR24]] = { mustprogress nosync readnone willreturn }
; IS________NPM: attributes #[[ATTR25]] = { mustprogress nosync readnone willreturn } ; IS________NPM: attributes #[[ATTR25]] = { readonly willreturn }
; IS________NPM: attributes #[[ATTR26]] = { readonly willreturn } ; IS________NPM: attributes #[[ATTR26]] = { nofree nosync nounwind readnone }
; IS________NPM: attributes #[[ATTR27]] = { nofree nosync nounwind readnone } ; IS________NPM: attributes #[[ATTR27]] = { nofree nosync nounwind }
; IS________NPM: attributes #[[ATTR28]] = { nofree nosync nounwind } ; IS________NPM: attributes #[[ATTR28]] = { readnone willreturn }
; IS________NPM: attributes #[[ATTR29]] = { readnone willreturn } ; IS________NPM: attributes #[[ATTR29]] = { nounwind }
; IS________NPM: attributes #[[ATTR30]] = { nounwind } ; IS________NPM: attributes #[[ATTR30]] = { willreturn }
; IS________NPM: attributes #[[ATTR31]] = { willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { noreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { noreturn }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR8:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR9:[0-9]+]] = { norecurse willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR10]] = { noinline nounwind willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { noinline nounwind willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR11:[0-9]+]] = { noinline willreturn uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { noinline willreturn uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR12]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR13]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR15:[0-9]+]] = { noreturn nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR16:[0-9]+]] = { noreturn nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR17]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR17]] = { readonly }
; IS__CGSCC_OPM: attributes #[[ATTR18]] = { readonly } ; IS__CGSCC_OPM: attributes #[[ATTR18:[0-9]+]] = { readnone }
; IS__CGSCC_OPM: attributes #[[ATTR19:[0-9]+]] = { readnone } ; IS__CGSCC_OPM: attributes #[[ATTR19]] = { mustprogress }
; IS__CGSCC_OPM: attributes #[[ATTR20]] = { mustprogress } ; IS__CGSCC_OPM: attributes #[[ATTR20:[0-9]+]] = { mustprogress readonly }
; IS__CGSCC_OPM: attributes #[[ATTR21:[0-9]+]] = { mustprogress readonly } ; IS__CGSCC_OPM: attributes #[[ATTR21]] = { mustprogress readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR22]] = { mustprogress readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR22]] = { mustprogress nosync readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR23]] = { mustprogress nosync readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR23]] = { readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR24]] = { readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR24]] = { nofree nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR25]] = { nofree nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR25]] = { nofree nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR26]] = { nofree nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR26]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR27]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR27]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR28]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR28]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR29]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR29]] = { nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR30]] = { nounwind readnone }
;. ;.

llvm/test/Transforms/DeadArgElim/2010-04-30-DbgInfo.ll

Show All 36 Lines
bb2: ; preds = %bb1, %bb bb2: ; preds = %bb1, %bb
%.0 = phi i8* [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %bb ], [ %name, %bb1 ] ; <i8*> [#uses=1] %.0 = phi i8* [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %bb ], [ %name, %bb1 ] ; <i8*> [#uses=1]
ret i8* %.0, !dbg !27 ret i8* %.0, !dbg !27
} }
declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
; CHECK: attributes #0 = { nounwind ssp } ; CHECK: attributes #0 = { nounwind ssp }
; CHECK: attributes #1 = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #1 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #2 = { noinline nounwind ssp } ; CHECK: attributes #2 = { noinline nounwind ssp }
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }
!llvm.dbg.cu = !{!3} !llvm.dbg.cu = !{!3}
!llvm.module.flags = !{!30} !llvm.module.flags = !{!30}
!0 = !DILocalVariable(name: "name", line: 8, arg: 1, scope: !1, file: !2, type: !6) !0 = !DILocalVariable(name: "name", line: 8, arg: 1, scope: !1, file: !2, type: !6)
!1 = distinct !DISubprogram(name: "vfs_addname", linkageName: "vfs_addname", line: 12, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: false, unit: !3, file: !28, scope: !2, type: !4) !1 = distinct !DISubprogram(name: "vfs_addname", linkageName: "vfs_addname", line: 12, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: false, unit: !3, file: !28, scope: !2, type: !4)
!2 = !DIFile(filename: "tail.c", directory: "/Users/echeng/LLVM/radars/r7927803/") !2 = !DIFile(filename: "tail.c", directory: "/Users/echeng/LLVM/radars/r7927803/")
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llvm/test/Transforms/DeadArgElim/keepalive.ll

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%c = call token @llvm.call.preallocated.setup(i32 1) %c = call token @llvm.call.preallocated.setup(i32 1)
%M = call i8* @llvm.call.preallocated.arg(token %c, i32 0) preallocated(i32) %M = call i8* @llvm.call.preallocated.arg(token %c, i32 0) preallocated(i32)
%m = bitcast i8* %M to i32* %m = bitcast i8* %M to i32*
store i32 42, i32* %m store i32 42, i32* %m
%v = call x86_thiscallcc i32 @unused_this_preallocated(i32* %t, i32* preallocated(i32) %m) ["preallocated"(token %c)] %v = call x86_thiscallcc i32 @unused_this_preallocated(i32* %t, i32* preallocated(i32) %m) ["preallocated"(token %c)]
ret i32 %v ret i32 %v
} }
; CHECK: attributes #0 = { nofree nosync nounwind willreturn } ; CHECK: attributes #0 = { nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #1 = { nounwind } ; CHECK: attributes #1 = { nounwind }

llvm/test/Transforms/Inline/inline_invoke.ll

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; CHECK: [[FIX]]: ; CHECK: [[FIX]]:
; CHECK-NEXT: [[T1:%.*]] = phi i32 [ 0, %[[JOIN]] ], [ 1, %lpad ] ; CHECK-NEXT: [[T1:%.*]] = phi i32 [ 0, %[[JOIN]] ], [ 1, %lpad ]
; CHECK-NEXT: call void @use(i32 [[T1]]) ; CHECK-NEXT: call void @use(i32 [[T1]])
; CHECK-NEXT: call void @_ZSt9terminatev() ; CHECK-NEXT: call void @_ZSt9terminatev()
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }
; CHECK: attributes #1 = { nounwind readnone } ; CHECK: attributes #1 = { nounwind readnone }
; CHECK: attributes #2 = { ssp uwtable } ; CHECK: attributes #2 = { ssp uwtable }
; CHECK: attributes #3 = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #3 = { argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #4 = { noreturn nounwind } ; CHECK: attributes #4 = { noreturn nounwind }

llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %b = add <4 x i32> %x, <i32 6, i32 6, i32 6, i32 6> ; CHECK-NEXT: %b = add <4 x i32> %x, <i32 6, i32 6, i32 6, i32 6>
; CHECK-NEXT: ret <4 x i32> %b ; CHECK-NEXT: ret <4 x i32> %b
} }
declare <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16>, <4 x i16>) nounwind readnone declare <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
declare <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16>, <4 x i16>) nounwind readnone declare <4 x i32> @llvm.aarch64.neon.umull.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
; CHECK: attributes #0 = { nounwind readnone ssp } ; CHECK: attributes #0 = { nounwind readnone ssp }
; CHECK: attributes #1 = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #1 = { nocallback nofree nosync nounwind readnone willreturn }
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }

llvm/test/Transforms/LowerMatrixIntrinsics/strided-store-double.ll

Show First 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
} }
declare void @llvm.matrix.column.major.store.v6f64.i64(<6 x double>, double*, i64, i1, i32, i32) declare void @llvm.matrix.column.major.store.v6f64.i64(<6 x double>, double*, i64, i1, i32, i32)
declare void @llvm.matrix.column.major.store.v6f64.i32(<6 x double>, double*, i32, i1, i32, i32) declare void @llvm.matrix.column.major.store.v6f64.i32(<6 x double>, double*, i32, i1, i32, i32)
declare void @llvm.matrix.column.major.store.v10f64.i64(<10 x double>, double*, i64, i1, i32, i32) declare void @llvm.matrix.column.major.store.v10f64.i64(<10 x double>, double*, i64, i1, i32, i32)
; CHECK: declare void @llvm.matrix.column.major.store.v6f64.i64(<6 x double>, double* nocapture writeonly, i64, i1 immarg, i32 immarg, i32 immarg) #0 ; CHECK: declare void @llvm.matrix.column.major.store.v6f64.i64(<6 x double>, double* nocapture writeonly, i64, i1 immarg, i32 immarg, i32 immarg) #0
; CHECK: declare void @llvm.matrix.column.major.store.v10f64.i64(<10 x double>, double* nocapture writeonly, i64, i1 immarg, i32 immarg, i32 immarg) #0 ; CHECK: declare void @llvm.matrix.column.major.store.v10f64.i64(<10 x double>, double* nocapture writeonly, i64, i1 immarg, i32 immarg, i32 immarg) #0
; CHECK: attributes #0 = { argmemonly nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #0 = { argmemonly nocallback nofree nosync nounwind willreturn writeonly }

llvm/test/Transforms/ObjCARC/basic.ll

Show First 20 Lines • Show All 3,068 Lines • ▼ Show 20 Lines
!3 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang", !3 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang",
file: !4, file: !4,
isOptimized: true, flags: "-O2", isOptimized: true, flags: "-O2",
splitDebugFilename: "abc.debug", emissionKind: 2) splitDebugFilename: "abc.debug", emissionKind: 2)
!4 = !DIFile(filename: "path/to/file", directory: "/path/to/dir") !4 = !DIFile(filename: "path/to/file", directory: "/path/to/dir")
!5 = !{i32 2, !"Debug Info Version", i32 3} !5 = !{i32 2, !"Debug Info Version", i32 3}
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }
; CHECK: attributes #1 = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #1 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: ![[RELEASE]] = !{} ; CHECK: ![[RELEASE]] = !{}

llvm/test/Transforms/ObjCARC/ensure-that-exception-unwind-path-is-visited.ll

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declare void @llvm.objc.release(i8*) nonlazybind declare void @llvm.objc.release(i8*) nonlazybind
declare void @NSLog(i8*, ...) declare void @NSLog(i8*, ...)
declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone
; CHECK: attributes #0 = { ssp uwtable } ; CHECK: attributes #0 = { ssp uwtable }
; CHECK: attributes #1 = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #1 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #2 = { nonlazybind } ; CHECK: attributes #2 = { nonlazybind }
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }
; CHECK: attributes #4 = { noinline ssp uwtable } ; CHECK: attributes #4 = { noinline ssp uwtable }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!33, !34, !35, !36, !61} !llvm.module.flags = !{!33, !34, !35, !36, !61}
!0 = distinct !DICompileUnit(language: DW_LANG_ObjC, producer: "clang version 3.3 ", isOptimized: true, runtimeVersion: 2, emissionKind: FullDebug, file: !60, enums: !1, retainedTypes: !1, globals: !1) !0 = distinct !DICompileUnit(language: DW_LANG_ObjC, producer: "clang version 3.3 ", isOptimized: true, runtimeVersion: 2, emissionKind: FullDebug, file: !60, enums: !1, retainedTypes: !1, globals: !1)
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llvm/test/Transforms/OpenMP/replace_globalization.ll

Show First 20 Lines • Show All 218 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i8* [[GEP]] ; CHECK-NEXT: ret i8* [[GEP]]
; ;
;. ;.
; CHECK: attributes #[[ATTR0]] = { "kernel" } ; CHECK: attributes #[[ATTR0]] = { "kernel" }
; CHECK: attributes #[[ATTR1]] = { nofree nounwind writeonly } ; CHECK: attributes #[[ATTR1]] = { nofree nounwind writeonly }
; CHECK: attributes #[[ATTR2]] = { nosync nounwind readonly allocsize(0) } ; CHECK: attributes #[[ATTR2]] = { nosync nounwind readonly allocsize(0) }
; CHECK: attributes #[[ATTR3:[0-9]+]] = { nosync nounwind } ; CHECK: attributes #[[ATTR3:[0-9]+]] = { nosync nounwind }
; CHECK: attributes #[[ATTR4:[0-9]+]] = { nounwind readnone speculatable } ; CHECK: attributes #[[ATTR4:[0-9]+]] = { nounwind readnone speculatable }
; CHECK: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #[[ATTR5:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #[[ATTR6]] = { "llvm.assume"="omp_no_openmp" } ; CHECK: attributes #[[ATTR6]] = { "llvm.assume"="omp_no_openmp" }
; CHECK: attributes #[[ATTR7]] = { nounwind readonly } ; CHECK: attributes #[[ATTR7]] = { nounwind readonly }
; CHECK: attributes #[[ATTR8]] = { nounwind writeonly } ; CHECK: attributes #[[ATTR8]] = { nounwind writeonly }
; CHECK: attributes #[[ATTR9]] = { nounwind } ; CHECK: attributes #[[ATTR9]] = { nounwind }
;. ;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "replace_globalization.c", directory: "/tmp/replace_globalization.c") ; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "replace_globalization.c", directory: "/tmp/replace_globalization.c")
; CHECK: [[META2:![0-9]+]] = !{} ; CHECK: [[META2:![0-9]+]] = !{}
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llvm/test/Transforms/OpenMP/spmdization.ll

Show First 20 Lines • Show All 2,416 Lines • ▼ Show 20 Lines
; AMDGPU: attributes #[[ATTR1]] = { norecurse } ; AMDGPU: attributes #[[ATTR1]] = { norecurse }
; AMDGPU: attributes #[[ATTR2]] = { convergent norecurse nounwind } ; AMDGPU: attributes #[[ATTR2]] = { convergent norecurse nounwind }
; AMDGPU: attributes #[[ATTR3]] = { alwaysinline convergent nounwind } ; AMDGPU: attributes #[[ATTR3]] = { alwaysinline convergent nounwind }
; AMDGPU: attributes #[[ATTR4]] = { nounwind } ; AMDGPU: attributes #[[ATTR4]] = { nounwind }
; AMDGPU: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind } ; AMDGPU: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind }
; AMDGPU: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) } ; AMDGPU: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) }
; AMDGPU: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; AMDGPU: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; AMDGPU: attributes #[[ATTR8]] = { convergent } ; AMDGPU: attributes #[[ATTR8]] = { convergent }
; AMDGPU: attributes #[[ATTR9:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; AMDGPU: attributes #[[ATTR9:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; AMDGPU: attributes #[[ATTR10:[0-9]+]] = { alwaysinline } ; AMDGPU: attributes #[[ATTR10:[0-9]+]] = { alwaysinline }
; AMDGPU: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind } ; AMDGPU: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind }
;. ;.
; NVPTX: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; NVPTX: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; NVPTX: attributes #[[ATTR1]] = { norecurse } ; NVPTX: attributes #[[ATTR1]] = { norecurse }
; NVPTX: attributes #[[ATTR2]] = { convergent norecurse nounwind } ; NVPTX: attributes #[[ATTR2]] = { convergent norecurse nounwind }
; NVPTX: attributes #[[ATTR3]] = { alwaysinline convergent nounwind } ; NVPTX: attributes #[[ATTR3]] = { alwaysinline convergent nounwind }
; NVPTX: attributes #[[ATTR4]] = { nounwind } ; NVPTX: attributes #[[ATTR4]] = { nounwind }
; NVPTX: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind } ; NVPTX: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind }
; NVPTX: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) } ; NVPTX: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) }
; NVPTX: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; NVPTX: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; NVPTX: attributes #[[ATTR8]] = { convergent } ; NVPTX: attributes #[[ATTR8]] = { convergent }
; NVPTX: attributes #[[ATTR9:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NVPTX: attributes #[[ATTR9:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; NVPTX: attributes #[[ATTR10:[0-9]+]] = { alwaysinline } ; NVPTX: attributes #[[ATTR10:[0-9]+]] = { alwaysinline }
; NVPTX: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind } ; NVPTX: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind }
;. ;.
; AMDGPU-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR1]] = { norecurse } ; AMDGPU-DISABLED: attributes #[[ATTR1]] = { norecurse }
; AMDGPU-DISABLED: attributes #[[ATTR2]] = { convergent norecurse nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR2]] = { convergent norecurse nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR3]] = { alwaysinline convergent nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR3]] = { alwaysinline convergent nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR4]] = { nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR4]] = { nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) } ; AMDGPU-DISABLED: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) }
; AMDGPU-DISABLED: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; AMDGPU-DISABLED: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; AMDGPU-DISABLED: attributes #[[ATTR8]] = { convergent } ; AMDGPU-DISABLED: attributes #[[ATTR8]] = { convergent }
; AMDGPU-DISABLED: attributes #[[ATTR9:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; AMDGPU-DISABLED: attributes #[[ATTR9:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; AMDGPU-DISABLED: attributes #[[ATTR10:[0-9]+]] = { alwaysinline } ; AMDGPU-DISABLED: attributes #[[ATTR10:[0-9]+]] = { alwaysinline }
; AMDGPU-DISABLED: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind }
;. ;.
; NVPTX-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; NVPTX-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; NVPTX-DISABLED: attributes #[[ATTR1]] = { norecurse } ; NVPTX-DISABLED: attributes #[[ATTR1]] = { norecurse }
; NVPTX-DISABLED: attributes #[[ATTR2]] = { convergent norecurse nounwind } ; NVPTX-DISABLED: attributes #[[ATTR2]] = { convergent norecurse nounwind }
; NVPTX-DISABLED: attributes #[[ATTR3]] = { alwaysinline convergent nounwind } ; NVPTX-DISABLED: attributes #[[ATTR3]] = { alwaysinline convergent nounwind }
; NVPTX-DISABLED: attributes #[[ATTR4]] = { nounwind } ; NVPTX-DISABLED: attributes #[[ATTR4]] = { nounwind }
; NVPTX-DISABLED: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind } ; NVPTX-DISABLED: attributes #[[ATTR5:[0-9]+]] = { nosync nounwind }
; NVPTX-DISABLED: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) } ; NVPTX-DISABLED: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind allocsize(0) }
; NVPTX-DISABLED: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; NVPTX-DISABLED: attributes #[[ATTR7]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; NVPTX-DISABLED: attributes #[[ATTR8]] = { convergent } ; NVPTX-DISABLED: attributes #[[ATTR8]] = { convergent }
; NVPTX-DISABLED: attributes #[[ATTR9:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NVPTX-DISABLED: attributes #[[ATTR9:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; NVPTX-DISABLED: attributes #[[ATTR10:[0-9]+]] = { alwaysinline } ; NVPTX-DISABLED: attributes #[[ATTR10:[0-9]+]] = { alwaysinline }
; NVPTX-DISABLED: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind } ; NVPTX-DISABLED: attributes #[[ATTR11:[0-9]+]] = { convergent nounwind }
;. ;.
; AMDGPU: [[META0:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_task", i32 74, i32 5} ; AMDGPU: [[META0:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_task", i32 74, i32 5}
; AMDGPU: [[META1:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_stack_var", i32 20, i32 1} ; AMDGPU: [[META1:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_stack_var", i32 20, i32 1}
; AMDGPU: [[META2:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop", i32 5, i32 0} ; AMDGPU: [[META2:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop", i32 5, i32 0}
; AMDGPU: [[META3:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_shared_var", i32 35, i32 2} ; AMDGPU: [[META3:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_shared_var", i32 35, i32 2}
; AMDGPU: [[META4:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_target", i32 65, i32 4} ; AMDGPU: [[META4:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_target", i32 65, i32 4}
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llvm/test/Transforms/OpenMP/spmdization_guarding.ll

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!11 = distinct !{!11, !12} !11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"} !12 = !{!"llvm.loop.mustprogress"}
;. ;.
; CHECK: attributes #[[ATTR0]] = { convergent norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK: attributes #[[ATTR0]] = { convergent norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { alwaysinline } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { alwaysinline }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { convergent "frame-pointer"="all" "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { convergent "frame-pointer"="all" "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK: attributes #[[ATTR3:[0-9]+]] = { convergent nounwind readonly willreturn "frame-pointer"="all" "llvm.assume"="ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK: attributes #[[ATTR3:[0-9]+]] = { convergent nounwind readonly willreturn "frame-pointer"="all" "llvm.assume"="ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK: attributes #[[ATTR4]] = { nounwind } ; CHECK: attributes #[[ATTR4]] = { nounwind }
; CHECK: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #[[ATTR6:[0-9]+]] = { convergent nounwind } ; CHECK: attributes #[[ATTR6:[0-9]+]] = { convergent nounwind }
; CHECK: attributes #[[ATTR7]] = { convergent nounwind "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" } ; CHECK: attributes #[[ATTR7]] = { convergent nounwind "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" }
;. ;.
; CHECK-DISABLED: attributes #[[ATTR0]] = { convergent norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK-DISABLED: attributes #[[ATTR0]] = { convergent norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK-DISABLED: attributes #[[ATTR1:[0-9]+]] = { alwaysinline } ; CHECK-DISABLED: attributes #[[ATTR1:[0-9]+]] = { alwaysinline }
; CHECK-DISABLED: attributes #[[ATTR2:[0-9]+]] = { convergent "frame-pointer"="all" "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK-DISABLED: attributes #[[ATTR2:[0-9]+]] = { convergent "frame-pointer"="all" "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK-DISABLED: attributes #[[ATTR3:[0-9]+]] = { convergent nounwind readonly willreturn "frame-pointer"="all" "llvm.assume"="ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK-DISABLED: attributes #[[ATTR3:[0-9]+]] = { convergent nounwind readonly willreturn "frame-pointer"="all" "llvm.assume"="ompx_spmd_amenable" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK-DISABLED: attributes #[[ATTR4]] = { nounwind } ; CHECK-DISABLED: attributes #[[ATTR4]] = { nounwind }
; CHECK-DISABLED: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; CHECK-DISABLED: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; CHECK-DISABLED: attributes #[[ATTR6:[0-9]+]] = { convergent nounwind } ; CHECK-DISABLED: attributes #[[ATTR6:[0-9]+]] = { convergent nounwind }
; CHECK-DISABLED: attributes #[[ATTR7]] = { convergent nounwind "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" } ; CHECK-DISABLED: attributes #[[ATTR7]] = { convergent nounwind "llvm.assume"="omp_no_openmp,ompx_spmd_amenable" }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 42, i32 16513658, !"sequential_loop", i32 6, i32 0} ; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 42, i32 16513658, !"sequential_loop", i32 6, i32 0}
; CHECK: [[META1:![0-9]+]] = !{void (i32*, i64)* @__omp_offloading_2a_fbfa7a_sequential_loop_l6, !"kernel", i32 1} ; CHECK: [[META1:![0-9]+]] = !{void (i32*, i64)* @__omp_offloading_2a_fbfa7a_sequential_loop_l6, !"kernel", i32 1}
; CHECK: [[META2:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} ; CHECK: [[META2:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
; CHECK: [[META3:![0-9]+]] = !{i32 7, !"openmp", i32 50} ; CHECK: [[META3:![0-9]+]] = !{i32 7, !"openmp", i32 50}
; CHECK: [[META4:![0-9]+]] = !{i32 7, !"openmp-device", i32 50} ; CHECK: [[META4:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
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llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll

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; Check pseudo_probe metadata attached to the direct call instruction. ; Check pseudo_probe metadata attached to the direct call instruction.
; CHECK-IL: call void @bar(i32 1), !dbg ![[#PROBE1:]] ; CHECK-IL: call void @bar(i32 1), !dbg ![[#PROBE1:]]
; CHECK-MIR: PSEUDO_PROBE [[#GUID2]], 3, 2, 0 ; CHECK-MIR: PSEUDO_PROBE [[#GUID2]], 3, 2, 0
; CHECK-ASM: .pseudoprobe [[#GUID2]] 3 2 0 ; CHECK-ASM: .pseudoprobe [[#GUID2]] 3 2 0
call void @bar(i32 1) call void @bar(i32 1)
ret void ret void
} }
; CHECK-IL: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; CHECK-IL: Function Attrs: inaccessiblememonly nocallback nofree nosync nounwind willreturn
; CHECK-IL-NEXT: declare void @llvm.pseudoprobe(i64, i64, i32, i64) ; CHECK-IL-NEXT: declare void @llvm.pseudoprobe(i64, i64, i32, i64)
; CHECK-IL: ![[#FOO:]] = distinct !DISubprogram(name: "foo" ; CHECK-IL: ![[#FOO:]] = distinct !DISubprogram(name: "foo"
; CHECK-IL: ![[#FAKELINE]] = !DILocation(line: 0, scope: ![[#FOO]]) ; CHECK-IL: ![[#FAKELINE]] = !DILocation(line: 0, scope: ![[#FOO]])
; CHECK-IL: ![[#REALLINE]] = !DILocation(line: 2, scope: ![[#FOO]]) ; CHECK-IL: ![[#REALLINE]] = !DILocation(line: 2, scope: ![[#FOO]])
; CHECK-IL: ![[#PROBE0]] = !DILocation(line: 2, column: 20, scope: ![[#SCOPE0:]]) ; CHECK-IL: ![[#PROBE0]] = !DILocation(line: 2, column: 20, scope: ![[#SCOPE0:]])
;; A discriminator of 67108887 which is 0x7200017 in hexdecimal, stands for a direct call probe ;; A discriminator of 67108887 which is 0x7200017 in hexdecimal, stands for a direct call probe
;; with an index of 2. ;; with an index of 2.
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llvm/test/Transforms/SimplifyCFG/X86/merge-compatible-invokes-of-landingpad-debuginfo.ll

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declare i1 @cond() declare i1 @cond()
declare void @sideeffect() declare void @sideeffect()
declare void @simple_throw() noreturn declare void @simple_throw() noreturn
declare void @destructor() declare void @destructor()
declare dso_local i32 @__gxx_personality_v0(...) declare dso_local i32 @__gxx_personality_v0(...)
;. ;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { noreturn } ; CHECK: attributes #[[ATTR0:[0-9]+]] = { noreturn }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug) ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "<stdin>", directory: "/") ; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "<stdin>", directory: "/")
; CHECK: [[META2:![0-9]+]] = !{i32 13} ; CHECK: [[META2:![0-9]+]] = !{i32 13}
; CHECK: [[META3:![0-9]+]] = !{i32 2} ; CHECK: [[META3:![0-9]+]] = !{i32 2}
; CHECK: [[META4:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3} ; CHECK: [[META4:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
; CHECK: [[META5:![0-9]+]] = distinct !DISubprogram(name: "t1_mergeable_invoke", linkageName: "t1_mergeable_invoke", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8) ; CHECK: [[META5:![0-9]+]] = distinct !DISubprogram(name: "t1_mergeable_invoke", linkageName: "t1_mergeable_invoke", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8)
; CHECK: [[META6:![0-9]+]] = !DISubroutineType(types: !7) ; CHECK: [[META6:![0-9]+]] = !DISubroutineType(types: !7)
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llvm/test/Verifier/fp-intrinsics.ll

; RUN: opt -verify -S < %s 2>&1 | FileCheck --check-prefix=CHECK1 %s ; RUN: opt -verify -S < %s 2>&1 | FileCheck --check-prefix=CHECK1 %s
; RUN: sed -e s/.T2:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK2 %s ; RUN: sed -e s/.T2:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK2 %s
; RUN: sed -e s/.T3:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK3 %s ; RUN: sed -e s/.T3:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK3 %s
; RUN: sed -e s/.T4:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK4 %s ; RUN: sed -e s/.T4:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK4 %s
; RUN: sed -e s/.T5:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK5 %s ; RUN: sed -e s/.T5:// %s | not opt -verify -disable-output 2>&1 | FileCheck --check-prefix=CHECK5 %s
; Common declarations used for all runs. ; Common declarations used for all runs.
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
; Test that the verifier accepts legal code, and that the correct attributes are ; Test that the verifier accepts legal code, and that the correct attributes are
; attached to the FP intrinsic. ; attached to the FP intrinsic.
; CHECK1: declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) #[[ATTR:[0-9]+]] ; CHECK1: declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) #[[ATTR:[0-9]+]]
; CHECK1: declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) #[[ATTR]] ; CHECK1: declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) #[[ATTR]]
; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly nocallback nofree nosync nounwind willreturn }
; Note: FP exceptions aren't usually caught through normal unwind mechanisms, ; Note: FP exceptions aren't usually caught through normal unwind mechanisms,
; but we may want to revisit this for asynchronous exception handling. ; but we may want to revisit this for asynchronous exception handling.
define double @f1(double %a, double %b) #0 { define double @f1(double %a, double %b) #0 {
entry: entry:
%fadd = call double @llvm.experimental.constrained.fadd.f64( %fadd = call double @llvm.experimental.constrained.fadd.f64(
double %a, double %b, double %a, double %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") #0 metadata !"fpexcept.strict") #0
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llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values.ll.funcsig.globals.expected

Show First 20 Lines • Show All 243 Lines • ▼ Show 20 Lines
!56 = !DILocation(line: 10, column: 10, scope: !48) !56 = !DILocation(line: 10, column: 10, scope: !48)
!57 = !DILocation(line: 9, column: 27, scope: !48) !57 = !DILocation(line: 9, column: 27, scope: !48)
!58 = distinct !{!58, !52, !59} !58 = distinct !{!58, !52, !59}
!59 = !DILocation(line: 10, column: 12, scope: !43) !59 = !DILocation(line: 10, column: 12, scope: !43)
!60 = !DILocation(line: 11, column: 1, scope: !39) !60 = !DILocation(line: 11, column: 1, scope: !39)
!61 = !{!"branch_weights", i32 1, i32 1048575} !61 = !{!"branch_weights", i32 1, i32 1048575}
;. ;.
; CHECK: attributes #[[ATTR0]] = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } ; CHECK: attributes #[[ATTR0]] = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="ieee,ieee" "denormal-fp-math-f32"="ieee,ieee" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nocallback nofree nosync nounwind willreturn }
; CHECK: attributes #[[ATTR3]] = { nounwind } ; CHECK: attributes #[[ATTR3]] = { nounwind }
;. ;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 11.0.0 (git@github.com:llvm/llvm-project.git 1d5da8cd30fce1c0a2c2fa6ba656dbfaa36192c8)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 11.0.0 (git@github.com:llvm/llvm-project.git 1d5da8cd30fce1c0a2c2fa6ba656dbfaa36192c8)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "various_ir_values.c", directory: "/data/build/llvm-project") ; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "various_ir_values.c", directory: "/data/build/llvm-project")
; CHECK: [[META2:![0-9]+]] = !{} ; CHECK: [[META2:![0-9]+]] = !{}
; CHECK: [[META3:![0-9]+]] = !{i32 7, !"Dwarf Version", i32 4} ; CHECK: [[META3:![0-9]+]] = !{i32 7, !"Dwarf Version", i32 4}
; CHECK: [[META4:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3} ; CHECK: [[META4:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
; CHECK: [[META5:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} ; CHECK: [[META5:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
▲ Show 20 Lines • Show All 57 Lines • Show Last 20 Lines

llvm/test/tools/llvm-reduce/no-replace-intrinsic-callee-with-undef.ll

; Intrinsic calls can't be uniformly replaced with undef without invalidating ; Intrinsic calls can't be uniformly replaced with undef without invalidating
; IR (eg: only intrinsic calls can have metadata arguments), so ensure they are ; IR (eg: only intrinsic calls can have metadata arguments), so ensure they are
; not replaced. The whole call instruction can be removed by instruction ; not replaced. The whole call instruction can be removed by instruction
; reduction instead. ; reduction instead.
; RUN: llvm-reduce --delta-passes=functions,instructions --test FileCheck --test-arg --check-prefixes=ALL,CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log ; RUN: llvm-reduce --delta-passes=functions,instructions --test FileCheck --test-arg --check-prefixes=ALL,CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
; RUN: FileCheck -implicit-check-not=uninteresting --check-prefixes=ALL,CHECK-FINAL %s < %t ; RUN: FileCheck -implicit-check-not=uninteresting --check-prefixes=ALL,CHECK-FINAL %s < %t
; Check that the call is removed by instruction reduction passes ; Check that the call is removed by instruction reduction passes
; RUN: llvm-reduce --delta-passes=functions,instructions --test FileCheck --test-arg --check-prefix=ALL --test-arg %s --test-arg --input-file %s -o %t ; RUN: llvm-reduce --delta-passes=functions,instructions --test FileCheck --test-arg --check-prefix=ALL --test-arg %s --test-arg --input-file %s -o %t
; RUN: FileCheck -implicit-check-not=uninteresting --check-prefixes=ALL,CHECK-NOCALL %s < %t ; RUN: FileCheck -implicit-check-not=uninteresting --check-prefixes=ALL,CHECK-NOCALL %s < %t
declare i8* @llvm.sponentry.p0i8() declare i8* @llvm.sponentry.p0i8()
declare void @uninteresting() declare i8 @uninteresting()
; ALL-LABEL: define i8* @interesting( ; ALL-LABEL: define i8* @interesting(
define i8* @interesting() { define i8* @interesting() {
entry: entry:
; CHECK-INTERESTINGNESS: call ; CHECK-INTERESTINGNESS: call i8
; CHECK-NOCALL-NOT: call ; CHECK-NOCALL-NOT: call i8
; CHECK-FINAL: %call = call i8* @llvm.sponentry.p0i8() ; CHECK-FINAL: %call = call i8* @llvm.sponentry.p0i8()
; CHECK-FINAL-NEXT: ret i8* %call ; CHECK-FINAL-NEXT: ret i8* %call
%call = call i8* @llvm.sponentry.p0i8() %call = call i8* @llvm.sponentry.p0i8()
call void @uninteresting() call i8 @uninteresting()
ret i8* %call ret i8* %call
} }

llvm/test/tools/llvm-reduce/remove-attributes-from-intrinsics.ll

Show All 20 Lines; CHECK-ALL: ret i32 %r
%r = call "arg0" "arg1" i32 @llvm.uadd.sat.i32(i32 "arg2" "arg3" %a, i32 %a) "arg4" "arg5" %r = call "arg0" "arg1" i32 @llvm.uadd.sat.i32(i32 "arg2" "arg3" %a, i32 %a) "arg4" "arg5"
ret i32 %r ret i32 %r
} }
; CHECK-ALL: declare i32 @llvm.uadd.sat.i32(i32, i32) #0 ; CHECK-ALL: declare i32 @llvm.uadd.sat.i32(i32, i32) #0
declare i32 @llvm.uadd.sat.i32(i32, i32) #0 declare i32 @llvm.uadd.sat.i32(i32, i32) #0
; CHECK-ALL: attributes #0 = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK-ALL: attributes #0 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
; CHECK-INTERESTINGNESS: attributes #1 = { ; CHECK-INTERESTINGNESS: attributes #1 = {
; CHECK-INTERESTINGNESS-SAME: "arg4" ; CHECK-INTERESTINGNESS-SAME: "arg4"
; CHECK-FINAL: attributes #1 = { "arg4" } ; CHECK-FINAL: attributes #1 = { "arg4" }
; CHECK-ALL-NOT: attributes # ; CHECK-ALL-NOT: attributes #
attributes #0 = { "arg6" "arg7" } attributes #0 = { "arg6" "arg7" }

llvm/utils/TableGen/CodeGenIntrinsics.h

Show First 20 Lines • Show All 119 Lines • ▼ Show 20 Linesstruct CodeGenIntrinsic {
bool isNoDuplicate; bool isNoDuplicate;
/// True if the intrinsic is marked as nomerge. /// True if the intrinsic is marked as nomerge.
bool isNoMerge; bool isNoMerge;
/// True if the intrinsic is no-return. /// True if the intrinsic is no-return.
bool isNoReturn; bool isNoReturn;
/// True if the intrinsic is no-callback.
bool isNoCallback;
/// True if the intrinsic is no-sync. /// True if the intrinsic is no-sync.
bool isNoSync; bool isNoSync;
/// True if the intrinsic is no-free. /// True if the intrinsic is no-free.
bool isNoFree; bool isNoFree;
/// True if the intrinsic is will-return. /// True if the intrinsic is will-return.
bool isWillReturn; bool isWillReturn;
▲ Show 20 Lines • Show All 89 Lines • Show Last 20 Lines

llvm/utils/TableGen/CodeGenTarget.cpp

Show First 20 Lines • Show All 657 Lines • ▼ Show 20 LinesCodeGenIntrinsic::CodeGenIntrinsic(Record *R,
std::string DefName = std::string(R->getName()); std::string DefName = std::string(R->getName());
ArrayRef<SMLoc> DefLoc = R->getLoc(); ArrayRef<SMLoc> DefLoc = R->getLoc();
ModRef = ReadWriteMem; ModRef = ReadWriteMem;
Properties = 0; Properties = 0;
isOverloaded = false; isOverloaded = false;
isCommutative = false; isCommutative = false;
canThrow = false; canThrow = false;
isNoReturn = false; isNoReturn = false;
isNoCallback = false;
isNoSync = false; isNoSync = false;
isNoFree = false; isNoFree = false;
isWillReturn = false; isWillReturn = false;
isCold = false; isCold = false;
isNoDuplicate = false; isNoDuplicate = false;
isNoMerge = false; isNoMerge = false;
isConvergent = false; isConvergent = false;
isSpeculatable = false; isSpeculatable = false;
▲ Show 20 Lines • Show All 182 Lines • ▼ Show 20 Linesvoid CodeGenIntrinsic::setProperty(Record *R) {
else if (R->getName() == "IntrNoDuplicate") else if (R->getName() == "IntrNoDuplicate")
isNoDuplicate = true; isNoDuplicate = true;
else if (R->getName() == "IntrNoMerge") else if (R->getName() == "IntrNoMerge")
isNoMerge = true; isNoMerge = true;
else if (R->getName() == "IntrConvergent") else if (R->getName() == "IntrConvergent")
isConvergent = true; isConvergent = true;
else if (R->getName() == "IntrNoReturn") else if (R->getName() == "IntrNoReturn")
isNoReturn = true; isNoReturn = true;
else if (R->getName() == "IntrNoCallback")
isNoCallback = true;
else if (R->getName() == "IntrNoSync") else if (R->getName() == "IntrNoSync")
isNoSync = true; isNoSync = true;
else if (R->getName() == "IntrNoFree") else if (R->getName() == "IntrNoFree")
isNoFree = true; isNoFree = true;
else if (R->getName() == "IntrWillReturn") else if (R->getName() == "IntrWillReturn")
isWillReturn = !isNoReturn; isWillReturn = !isNoReturn;
else if (R->getName() == "IntrCold") else if (R->getName() == "IntrCold")
isCold = true; isCold = true;
▲ Show 20 Lines • Show All 49 Lines • Show Last 20 Lines

llvm/utils/TableGen/IntrinsicEmitter.cpp

Show First 20 Lines • Show All 604 Lines • ▼ Show 20 Lines if (L->isNoDuplicate != R->isNoDuplicate)
return R->isNoDuplicate; return R->isNoDuplicate;
if (L->isNoMerge != R->isNoMerge) if (L->isNoMerge != R->isNoMerge)
return R->isNoMerge; return R->isNoMerge;
if (L->isNoReturn != R->isNoReturn) if (L->isNoReturn != R->isNoReturn)
return R->isNoReturn; return R->isNoReturn;
if (L->isNoCallback != R->isNoCallback)
return R->isNoCallback;
if (L->isNoSync != R->isNoSync) if (L->isNoSync != R->isNoSync)
return R->isNoSync; return R->isNoSync;
if (L->isNoFree != R->isNoFree) if (L->isNoFree != R->isNoFree)
return R->isNoFree; return R->isNoFree;
if (L->isWillReturn != R->isWillReturn) if (L->isWillReturn != R->isWillReturn)
return R->isWillReturn; return R->isWillReturn;
▲ Show 20 Lines • Show All 133 Lines • ▼ Show 20 Lines if (Ae) {
OS << ", AttrValParam" << AttrIdx; OS << ", AttrValParam" << AttrIdx;
OS << ");\n"; OS << ");\n";
} }
} }
if (!Intrinsic.canThrow || if (!Intrinsic.canThrow ||
(Intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem && (Intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem &&
!Intrinsic.hasSideEffects) || !Intrinsic.hasSideEffects) ||
Intrinsic.isNoReturn || Intrinsic.isNoSync || Intrinsic.isNoFree || Intrinsic.isNoReturn || Intrinsic.isNoCallback || Intrinsic.isNoSync ||
Intrinsic.isWillReturn || Intrinsic.isCold || Intrinsic.isNoDuplicate || Intrinsic.isNoFree || Intrinsic.isWillReturn || Intrinsic.isCold ||
Intrinsic.isNoMerge || Intrinsic.isConvergent || Intrinsic.isNoDuplicate || Intrinsic.isNoMerge ||
Intrinsic.isSpeculatable) { Intrinsic.isConvergent || Intrinsic.isSpeculatable) {
OS << " const Attribute::AttrKind Atts[] = {"; OS << " const Attribute::AttrKind Atts[] = {";
ListSeparator LS(","); ListSeparator LS(",");
if (!Intrinsic.canThrow) if (!Intrinsic.canThrow)
OS << LS << "Attribute::NoUnwind"; OS << LS << "Attribute::NoUnwind";
if (Intrinsic.isNoReturn) if (Intrinsic.isNoReturn)
OS << LS << "Attribute::NoReturn"; OS << LS << "Attribute::NoReturn";
if (Intrinsic.isNoCallback)
OS << LS << "Attribute::NoCallback";
if (Intrinsic.isNoSync) if (Intrinsic.isNoSync)
OS << LS << "Attribute::NoSync"; OS << LS << "Attribute::NoSync";
if (Intrinsic.isNoFree) if (Intrinsic.isNoFree)
OS << LS << "Attribute::NoFree"; OS << LS << "Attribute::NoFree";
if (Intrinsic.isWillReturn) if (Intrinsic.isWillReturn)
OS << LS << "Attribute::WillReturn"; OS << LS << "Attribute::WillReturn";
if (Intrinsic.isCold) if (Intrinsic.isCold)
OS << LS << "Attribute::Cold"; OS << LS << "Attribute::Cold";
▲ Show 20 Lines • Show All 184 Lines • Show Last 20 Lines