The SETcc/SETULT sets carry flag in the same way as usub, so it can
be considered as a carry flag and pulled into addcarry, subcarry nodes.
I'm totally inexperienced with X86ISelLowering but I'm guessing I'd need to duplicate some/all DAGCombine match patters which take carry flag into account. These tend to be quite complex.
This case looks like an easy X86 backend peephole.
X86ISD::ADC with an unused flag result, 0 for RHS, LHS is a single use ADD. If so fold the ADD operands into a new X86ISD::ADC.
I'm not sure about the @add_U320_without_i128_add case without staring at it for a lot longer.
No. I tried to untangle the graph here for long time but without any meaningful results. But I believe the test can be reduced. This is not my priority any more but I may contribute a reduced tests some day.
On the high level note, using builtin_subc() or builtin_sub_with_overflow() is good enough workaround.
I also think it would be very nice to have generic addc/subc intrinsic on LLVM IR level. Then many of these carry matching could be done in LLVM IR.
Yes, this is great. Thanks for reaching out. I will try to be little involved in both then.
I'm not actively working on this one so I will probably focus on regression tests for combining cmp into sbb (as the result of recent changes to InstCombine).