[ELF] Don't call assignAddresses in the absence of SECTIONS and SymbolAssignment

[MaskRay]

There is performance increase but the change may be too subtle.

lld/ELF/Relocations.h

 // This function writes undefined symbol diagnostics to an internal buffer.
 // Call reportUndefinedSymbols() after calling scanRelocations() to emit
 // the diagnostics.
 template <class ELFT> void scanRelocations(InputSectionBase &);
 void postScanRelocations();
 
 template <class ELFT> void reportUndefinedSymbols();
 
-void hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections);
+bool hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections);
 bool hexagonNeedsTLSSymbol(ArrayRef<OutputSection *> outputSections);
 
 class ThunkSection;
 class Thunk;
 class InputSectionDescription;
 
 class ThunkCreator {
 public:

lld/ELF/Relocations.cpp

forEachInputSectionDescription(
             if (rel.sym->type == llvm::ELF::STT_TLS && rel.expr == R_PLT_PC) {
               needTlsSymbol = true;
               return;
             }
       });
   return needTlsSymbol;
 }
 
-void elf::hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections) {
+bool elf::hexagonTLSSymbolUpdate(ArrayRef<OutputSection *> outputSections) {
   Symbol *sym = symtab->find("__tls_get_addr");
   if (!sym)
-    return;
+    return false;
   bool needEntry = true;
   forEachInputSectionDescription(
       outputSections, [&](OutputSection *os, InputSectionDescription *isd) {
         for (InputSection *isec : isd->sections)
           for (Relocation &rel : isec->relocations)
             if (rel.sym->type == llvm::ELF::STT_TLS && rel.expr == R_PLT_PC) {
               if (needEntry) {
                 sym->allocateAux();
                 addPltEntry(*in.plt, *in.gotPlt, *in.relaPlt, target->pltRel,
                             *sym);
                 needEntry = false;
               }
               rel.sym = sym;
             }
       });
+  return true;
 }
 
 template void elf::scanRelocations<ELF32LE>(InputSectionBase &);
 template void elf::scanRelocations<ELF32BE>(InputSectionBase &);
 template void elf::scanRelocations<ELF64LE>(InputSectionBase &);
 template void elf::scanRelocations<ELF64BE>(InputSectionBase &);
 template void elf::reportUndefinedSymbols<ELF32LE>();
 template void elf::reportUndefinedSymbols<ELF32BE>();
 template void elf::reportUndefinedSymbols<ELF64LE>();
 template void elf::reportUndefinedSymbols<ELF64BE>();

lld/ELF/Writer.cpp

public:
   Writer() : buffer(errorHandler().outputBuffer) {}
 
   void run();
 
 private:
   void copyLocalSymbols();
   void addSectionSymbols();
   void sortSections();
-  void resolveShfLinkOrder();
+  bool resolveShfLinkOrder();
   void finalizeAddressDependentContent();
   void optimizeBasicBlockJumps();
   void sortInputSections();
   void finalizeSections();
   void checkExecuteOnly();
   void setReservedSymbolSections();
 
   SmallVector<PhdrEntry *, 0> createPhdrs(Partition &part);
static bool compareByFilePosition(InputSection *a, InputSection *b) {
   OutputSection *aOut = la->getParent();
   OutputSection *bOut = lb->getParent();
 
   if (aOut != bOut)
     return aOut->addr < bOut->addr;
   return la->outSecOff < lb->outSecOff;
 }
 
-template <class ELFT> void Writer<ELFT>::resolveShfLinkOrder() {
+template <class ELFT> bool Writer<ELFT>::resolveShfLinkOrder() {
   llvm::TimeTraceScope timeScope("Resolve SHF_LINK_ORDER");
+  bool changed = false;
   for (OutputSection *sec : outputSections) {
     if (!(sec->flags & SHF_LINK_ORDER))
       continue;
+    changed = true;
 
     // The ARM.exidx section use SHF_LINK_ORDER, but we have consolidated
     // this processing inside the ARMExidxsyntheticsection::finalizeContents().
     if (!config->relocatable && config->emachine == EM_ARM &&
         sec->type == SHT_ARM_EXIDX)
       continue;
 
     // Link order may be distributed across several InputSectionDescriptions.
for (SectionCommand *cmd : sec->commands) {
       }
       if (hasLinkOrder && errorCount() == 0) {
         llvm::stable_sort(sections, compareByFilePosition);
         for (int i = 0, n = sections.size(); i != n; ++i)
           *scriptSections[i] = sections[i];
       }
     }
   }
+  return changed;
 }
 
 static void finalizeSynthetic(SyntheticSection *sec) {
   if (sec && sec->isNeeded() && sec->getParent()) {
     llvm::TimeTraceScope timeScope("Finalize synthetic sections", sec->name);
     sec->finalizeContents();
   }
 }
 
 // We need to generate and finalize the content that depends on the address of
 // InputSections. As the generation of the content may also alter InputSection
 // addresses we must converge to a fixed point. We do that here. See the comment
 // in Writer<ELFT>::finalizeSections().
 template <class ELFT> void Writer<ELFT>::finalizeAddressDependentContent() {
   llvm::TimeTraceScope timeScope("Finalize address dependent content");
   ThunkCreator tc;
   AArch64Err843419Patcher a64p;
   ARMErr657417Patcher a32p;
-  script->assignAddresses();
+  bool changed = script->assignAddresses() != nullptr;
   // .ARM.exidx and SHF_LINK_ORDER do not require precise addresses, but they
   // do require the relative addresses of OutputSections because linker scripts
   // can assign Virtual Addresses to OutputSections that are not monotonically
   // increasing.
   for (Partition &part : partitions)
     finalizeSynthetic(part.armExidx.get());
-  resolveShfLinkOrder();
+  changed |= resolveShfLinkOrder();
 
   // Converts call x@GDPLT to call __tls_get_addr
   if (config->emachine == EM_HEXAGON)
-    hexagonTLSSymbolUpdate(outputSections);
+    changed |= hexagonTLSSymbolUpdate(outputSections);
 
+  int passes = 0;
   int assignPasses = 0;
   for (;;) {
-    bool changed = target->needsThunks && tc.createThunks(outputSections);
+    changed |= target->needsThunks && tc.createThunks(outputSections);
 
     // With Thunk Size much smaller than branch range we expect to
     // converge quickly; if we get to 15 something has gone wrong.
     if (changed && tc.pass >= 15) {
       error("thunk creation not converged");
       break;
     }
 
     if (config->fixCortexA53Errata843419) {
       if (changed)
         script->assignAddresses();
       changed |= a64p.createFixes();
     }
     if (config->fixCortexA8) {
       if (changed)
         script->assignAddresses();
       changed |= a32p.createFixes();
     }
 
     if (in.mipsGot)
-      in.mipsGot->updateAllocSize();
+      changed |= in.mipsGot->updateAllocSize();
 
     for (Partition &part : partitions) {
       changed |= part.relaDyn->updateAllocSize();
       if (part.relrDyn)
         changed |= part.relrDyn->updateAllocSize();
     }
 
-    const Defined *changedSym = script->assignAddresses();
+    const Defined *changedSym = nullptr;
+    if (changed || passes > 0 || script->hasSectionsCommand)
+      changedSym = script->assignAddresses();
+    ++passes;
     if (!changed) {
       // Some symbols may be dependent on section addresses. When we break the
       // loop, the symbol values are finalized because a previous
       // assignAddresses() finalized section addresses.
       if (!changedSym)
         break;
       if (++assignPasses == 5) {
         errorOrWarn("assignment to symbol " + toString(*changedSym) +
                     " does not converge");
         break;
       }
     }
+    changed = false;
   }
 
   if (config->relocatable)
     for (OutputSection *sec : outputSections)
       sec->addr = 0;
 
   // If addrExpr is set, the address may not be a multiple of the alignment.
   // Warn because this is error-prone.

lld/test/ELF/linkerscript/symbol-assign-not-converge.test

 
 SECTIONS {
   . = 0x1000;
   a = b;
   b = c;
   c = d;
   d = e;
   e = f;
-  f = .;
+  f = g;
+  g = .;
 }