[fir] Add fir.zero_bits conversion pattern to LLVM IR dialect

[clementval]

Summary

This patch adds the ZeroOpConversion pattern to LLVM IR dialect.
Conversion of aggregate types is not implemented yet and will trigger a
failure to legalize the operation. This is tested in the
convert-to-llvm-invalid.fir test file.

This patch is part of the upstreaming effort from fir-dev branch.

Co-authored-by: Jean Perier <[e-mail]>
Co-authored-by: Eric Schweitz <[e-mail]>

[kiranchandramohan]

flang/test/Fir/convert-to-llvm.fir

121

What about f80 and f24?

129

Missed f64.

[clementval]

Add missing float tests

[clementval]

flang/test/Fir/convert-to-llvm.fir

121

Added bf16 and f80.

129

Thanks for catching this. This is fixed.

[clementval]

Remove unused loc variable

[kiranchandramohan]

LGTM.

Nit: Do we need a TODO for array types?

[clementval]

In D113014#3103244, @kiranchandramohan wrote:

LGTM.

Nit: Do we need a TODO for array types?

Thanks Kiran. Added array in the TODO before landing.

[mehdi_amini]

flang/lib/Optimizer/CodeGen/CodeGen.cpp

188

Nit: in general Patterns aren't supposed to emit errors directly but to wrap the message in notifyFailure(...).

The conversion may still succeed if another pattern ends up folding this op (or matching it), so having an error can be confusing.

In general if we want end-use diagnostic, it is best to use other mechanism (like using the partial conversion which has an extra argument for collecting "unconvertedOps").

[clementval]

flang/lib/Optimizer/CodeGen/CodeGen.cpp

188

Ok I'll update that.

[clementval]

flang/lib/Optimizer/CodeGen/CodeGen.cpp

188

Done in D113091

flang/lib/Optimizer/CodeGen/CodeGen.cpp

struct UndefOpConversion : public FIROpConversion<fir::UndefOp> {
   mlir::LogicalResult
   matchAndRewrite(fir::UndefOp undef, OpAdaptor,
                   mlir::ConversionPatternRewriter &rewriter) const override {
     rewriter.replaceOpWithNewOp<mlir::LLVM::UndefOp>(
         undef, convertType(undef.getType()));
     return success();
   }
 };
+
+struct ZeroOpConversion : public FIROpConversion<fir::ZeroOp> {
+  using FIROpConversion::FIROpConversion;
+
+  mlir::LogicalResult
+  matchAndRewrite(fir::ZeroOp zero, OpAdaptor,
+                  mlir::ConversionPatternRewriter &rewriter) const override {
+    auto ty = convertType(zero.getType());
+    if (ty.isa<mlir::LLVM::LLVMPointerType>()) {
+      rewriter.replaceOpWithNewOp<mlir::LLVM::NullOp>(zero, ty);
+    } else if (ty.isa<mlir::IntegerType>()) {
+      rewriter.replaceOpWithNewOp<mlir::LLVM::ConstantOp>(
+          zero, ty, mlir::IntegerAttr::get(zero.getType(), 0));
+    } else if (mlir::LLVM::isCompatibleFloatingPointType(ty)) {
+      rewriter.replaceOpWithNewOp<mlir::LLVM::ConstantOp>(
+          zero, ty, mlir::FloatAttr::get(zero.getType(), 0.0));
+    } else {
+      // TODO: create ConstantAggregateZero for FIR aggregate/array types.
+      return zero.emitOpError(
+          "conversion of fir.zero with aggregate type not implemented yet");
+    }
+    return success();
+  }
+};
 } // namespace
 
 namespace {
 /// Convert FIR dialect to LLVM dialect
 ///
 /// This pass lowers all FIR dialect operations to LLVM IR dialect. An
 /// MLIR pass is used to lower residual Std dialect to LLVM IR dialect.
 ///
 /// This pass is not complete yet. We are upstreaming it in small patches.
 class FIRToLLVMLowering : public fir::FIRToLLVMLoweringBase<FIRToLLVMLowering> {
 public:
   mlir::ModuleOp getModule() { return getOperation(); }
 
   void runOnOperation() override final {
     auto *context = getModule().getContext();
     fir::LLVMTypeConverter typeConverter{getModule()};
-    auto loc = mlir::UnknownLoc::get(context);
     mlir::OwningRewritePatternList pattern(context);
     pattern.insert<AddrOfOpConversion, HasValueOpConversion, GlobalOpConversion,
-                   UndefOpConversion>(typeConverter);
+                   UndefOpConversion, ZeroOpConversion>(typeConverter);
     mlir::populateStdToLLVMConversionPatterns(typeConverter, pattern);
     mlir::arith::populateArithmeticToLLVMConversionPatterns(typeConverter,
                                                             pattern);
     mlir::ConversionTarget target{*context};
     target.addLegalDialect<mlir::LLVM::LLVMDialect>();
 
     // required NOPs for applying a full conversion
     target.addLegalOp<mlir::ModuleOp>();
 
     // apply the patterns
     if (mlir::failed(mlir::applyFullConversion(getModule(), target,
                                                std::move(pattern)))) {
-      mlir::emitError(loc, "error in converting to LLVM-IR dialect\n");
       signalPassFailure();
     }
   }
 };
 } // namespace
 
 std::unique_ptr<mlir::Pass> fir::createFIRToLLVMPass() {
   return std::make_unique<FIRToLLVMLowering>();
 }

flang/test/Fir/convert-to-llvm-invalid.fir

+// Test FIR to LLVM IR conversion invalid cases and diagnostics.
+
+// RUN: fir-opt --split-input-file --fir-to-llvm-ir --verify-diagnostics %s
+
+func @zero_aggregate() {
+  // expected-error@+2{{'fir.zero_bits' op conversion of fir.zero with aggregate type not implemented yet}}
+  // expected-error@+1{{failed to legalize operation 'fir.zero_bits'}}
+  %a = fir.zero_bits !fir.array<10xf32>
+  return
+}
+

flang/test/Fir/convert-to-llvm.fir

fir.global internal @_QEmultiarray : !fir.array<32x32xi32> {
   %2 = fir.insert_on_range %0, %c0_i32, [0 : index, 31 : index, 0 : index, 31 : index] : (!fir.array<32x32xi32>, i32) -> !fir.array<32x32xi32>
   fir.has_value %2 : !fir.array<32x32xi32>
 }
 
 // CHECK: llvm.mlir.global internal @_QEmultiarray() : !llvm.array<32 x array<32 x i32>> {
 // CHECK:   %[[CST:.*]] = llvm.mlir.constant(dense<1> : vector<32x32xi32>) : !llvm.array<32 x array<32 x i32>>
 // CHECK:   llvm.return %[[CST]] : !llvm.array<32 x array<32 x i32>>
 // CHECK: }
+
+// -----
+
+// Test fir.zero_bits operation with LLVM ptr type
+
+func @zero_test_ptr() {
+  %z = fir.zero_bits !llvm.ptr<f32>
+  return
+}
+
+// CHECK: %{{.*}} = llvm.mlir.null : !llvm.ptr<f32>
+// CHECK-NOT: fir.zero_bits
+
+// -----
+
+// Test fir.zero_bits operation with integer type.
+
+func @zero_test_integer() {
+  %z0 = fir.zero_bits i8
+  %z1 = fir.zero_bits i16
+  %z2 = fir.zero_bits i32
+  %z3 = fir.zero_bits i64
+  return
+}
+
+// CHECK: %{{.*}} = llvm.mlir.constant(0 : i8) : i8
+// CHECK: %{{.*}} = llvm.mlir.constant(0 : i16) : i16
+// CHECK: %{{.*}} = llvm.mlir.constant(0 : i32) : i32
+// CHECK: %{{.*}} = llvm.mlir.constant(0 : i64) : i64
+// CHECK-NOT: fir.zero_bits
+
+// -----
+
+// Test fir.zero_bits operation with floating points types.
+
+func @zero_test_float() {
+  %z0 = fir.zero_bits f16
+  %z1 = fir.zero_bits bf16
+  %z2 = fir.zero_bits f32
+  %z3 = fir.zero_bits f64
+  %z4 = fir.zero_bits f80
+  %z5 = fir.zero_bits f128
+  return
+}
+
+// CHECK: %{{.*}} = llvm.mlir.constant(0.000000e+00 : f16) : f16
+// CHECK: %{{.*}} = llvm.mlir.constant(0.000000e+00 : bf16) : bf16
+// CHECK: %{{.*}} = llvm.mlir.constant(0.000000e+00 : f32) : f32
+// CHECK: %{{.*}} = llvm.mlir.constant(0.000000e+00 : f64) : f64
+// CHECK: %{{.*}} = llvm.mlir.constant(0.000000e+00 : f80) : f80
+// CHECK: %{{.*}} = llvm.mlir.constant(0.000000e+00 : f128) : f128
+// CHECK-NOT: fir.zero_bits