[ARM] emit PACBTI-M build attributes

[stuij]

Summary

This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:

https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension

The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:

https://developer.arm.com/documentation/ddi0553/latest

The following people contributed to this patch:

• Victor Campos
• Ties Stuij

[ostannard]

LGTM

llvm/include/llvm/Support/ARMAttributeParser.h

 //===- ARMAttributeParser.h - ARM Attribute Information Printer -*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
class ARMAttributeParser : public ELFAttributeParser {
   Error CPU_unaligned_access(ARMBuildAttrs::AttrType tag);
   Error FP_HP_extension(ARMBuildAttrs::AttrType tag);
   Error ABI_FP_16bit_format(ARMBuildAttrs::AttrType tag);
   Error MPextension_use(ARMBuildAttrs::AttrType tag);
   Error DIV_use(ARMBuildAttrs::AttrType tag);
   Error DSP_extension(ARMBuildAttrs::AttrType tag);
   Error T2EE_use(ARMBuildAttrs::AttrType tag);
   Error Virtualization_use(ARMBuildAttrs::AttrType tag);
+  Error PAC_extension(ARMBuildAttrs::AttrType tag);
+  Error BTI_extension(ARMBuildAttrs::AttrType tag);
+  Error PACRET_use(ARMBuildAttrs::AttrType tag);
+  Error BTI_use(ARMBuildAttrs::AttrType tag);
   Error nodefaults(ARMBuildAttrs::AttrType tag);
 
 public:
   ARMAttributeParser(ScopedPrinter *sw)
       : ELFAttributeParser(sw, ARMBuildAttrs::getARMAttributeTags(), "aeabi") {}
   ARMAttributeParser()
       : ELFAttributeParser(ARMBuildAttrs::getARMAttributeTags(), "aeabi") {}
 };
 }
 
 #endif

llvm/include/llvm/Support/ARMBuildAttributes.h

 //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
enum AttrType : unsigned {
   compatibility = 32,
   CPU_unaligned_access = 34,
   FP_HP_extension = 36,
   ABI_FP_16bit_format = 38,
   MPextension_use = 42, // recoded from 70 (ABI r2.08)
   DIV_use = 44,
   DSP_extension = 46,
   MVE_arch = 48,
+  PAC_extension = 50,
+  BTI_extension = 52,
   also_compatible_with = 65,
   conformance = 67,
   Virtualization_use = 68,
+  BTI_use = 74,
+  PACRET_use = 76,
 
   /// Legacy Tags
   Section = 2,               // deprecated (ABI r2.09)
   Symbol = 3,                // deprecated (ABI r2.09)
   ABI_align8_needed = 24,    // renamed to ABI_align_needed (ABI r2.09)
   ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09)
   nodefaults = 64,           // deprecated (ABI r2.09)
   T2EE_use = 66,             // deprecated (ABI r2.09)

 // The following have a lot of common use cases
 enum {
   Not_Allowed = 0,
   Allowed = 1,
 
   // Tag_ARM_ISA_use (=8), uleb128
 
   // Tag_THUMB_ISA_use, (=9), uleb128
   AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
   AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile
 
   // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
   AllowFPv2  = 2,     // v2 FP ISA permitted (implies use of the v1 FP ISA)
   AllowFPv3A = 3,     // v3 FP ISA permitted (implies use of the v2 FP ISA)
   AllowFPv3B = 4,     // v3 FP ISA permitted, but only D0-D15, S0-S31
   AllowFPv4A = 5,     // v4 FP ISA permitted (implies use of v3 FP ISA)
   AllowFPv4B = 6,     // v4 FP ISA was permitted, but only D0-D15, S0-S31
   AllowFPARMv8A = 7,  // Use of the ARM v8-A FP ISA was permitted
   AllowFPARMv8B = 8,  // Use of the ARM v8-A FP ISA was permitted, but only
                       // D0-D15, S0-S31
 
   // Tag_WMMX_arch, (=11), uleb128
   AllowWMMXv1 = 1,  // The user permitted this entity to use WMMX v1
   AllowWMMXv2 = 2,  // The user permitted this entity to use WMMX v2
 
   // Tag_Advanced_SIMD_arch, (=12), uleb128
   AllowNeon = 1,      // SIMDv1 was permitted
   AllowNeon2 = 2,     // SIMDv2 was permitted (Half-precision FP, MAC operations)
   AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
   AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA)
 
   // Tag_MVE_arch, (=48), uleb128
   AllowMVEInteger = 1, // integer-only MVE was permitted
   AllowMVEIntegerAndFloat = 2, // both integer and floating point MVE were permitted
 
   // Tag_ABI_PCS_R9_use, (=14), uleb128
   R9IsGPR = 0,        // R9 used as v6 (just another callee-saved register)
   R9IsSB = 1,         // R9 used as a global static base rgister
   R9IsTLSPointer = 2, // R9 used as a thread local storage pointer
   R9Reserved = 3,     // R9 not used by code associated with attributed entity
 
   // Tag_ABI_PCS_RW_data, (=15), uleb128
   AddressRWPCRel = 1, // Address RW static data PC-relative
   AddressRWSBRel = 2, // Address RW static data SB-relative
   AddressRWNone = 3, // No RW static data permitted
 
   // Tag_ABI_PCS_RO_data, (=14), uleb128
   AddressROPCRel = 1, // Address RO static data PC-relative
   AddressRONone = 2, // No RO static data permitted
 
   // Tag_ABI_PCS_GOT_use, (=17), uleb128
   AddressDirect = 1, // Address imported data directly
   AddressGOT = 2, // Address imported data indirectly (via GOT)
 
   // Tag_ABI_PCS_wchar_t, (=18), uleb128
   WCharProhibited = 0,  // wchar_t is not used
   WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2
   WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4
 
   // Tag_ABI_align_needed, (=24), uleb128
   Align8Byte = 1,
   Align4Byte = 2,
   AlignReserved = 3,
 
   // Tag_ABI_align_needed, (=25), uleb128
   AlignNotPreserved = 0,
   AlignPreserve8Byte = 1,
   AlignPreserveAll = 2,
 
   // Tag_ABI_FP_denormal, (=20), uleb128
   PositiveZero = 0,
   IEEEDenormals = 1,
   PreserveFPSign = 2, // sign when flushed-to-zero is preserved
 
   // Tag_ABI_FP_number_model, (=23), uleb128
   AllowIEEENormal = 1,
   AllowRTABI = 2,  // numbers, infinities, and one quiet NaN (see [RTABI])
   AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
 
   // Tag_ABI_enum_size, (=26), uleb128
   EnumProhibited = 0, // The user prohibited the use of enums when building
                       // this entity.
   EnumSmallest = 1,   // Enum is smallest container big enough to hold all
                       // values.
   Enum32Bit = 2,      // Enum is at least 32 bits.
   Enum32BitABI = 3,   // Every enumeration visible across an ABI-complying
                       // interface contains a value needing 32 bits to encode
                       // it; other enums can be containerized.
 
   // Tag_ABI_HardFP_use, (=27), uleb128
   HardFPImplied = 0,          // FP use should be implied by Tag_FP_arch
   HardFPSinglePrecision = 1,  // Single-precision only
 
   // Tag_ABI_VFP_args, (=28), uleb128
   BaseAAPCS = 0,
   HardFPAAPCS = 1,
   ToolChainFPPCS = 2,
   CompatibleFPAAPCS = 3,
 
enum {
   DisallowDIV = 1,      // Hardware divide explicitly disallowed.
   AllowDIVExt = 2,      // Allow hardware divide as optional architecture
                         // extension above the base arch specified by
                         // Tag_CPU_arch and Tag_CPU_arch_profile.
 
   // Tag_Virtualization_use, (=68), uleb128
   AllowTZ = 1,
   AllowVirtualization = 2,
-  AllowTZVirtualization = 3
+  AllowTZVirtualization = 3,
+
+  // Tag_PAC_extension, (=50), uleb128
+  DisallowPAC = 0,
+  AllowPACInNOPSpace = 1,
+  AllowPAC = 2,
+
+  // Tag_BTI_extension, (=52), uleb128
+  DisallowBTI = 0,
+  AllowBTIInNOPSpace = 1,
+  AllowBTI = 2,
+
+  // Tag_BTI_use, (=74), uleb128
+  BTINotUsed = 0,
+  BTIUsed = 1,
+
+  // Tag_PACRET_use, (=76), uleb128
+  PACRETNotUsed = 0,
+  PACRETUsed = 1
 };
 
 } // namespace ARMBuildAttrs
 } // namespace llvm
 
 #endif

llvm/lib/Support/ARMAttributeParser.cpp

 //===- ARMAttributeParser.cpp - ARM Attribute Information Printer ---------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
const ARMAttributeParser::DisplayHandler ARMAttributeParser::displayRoutines[] =
         ATTRIBUTE_HANDLER(CPU_unaligned_access),
         ATTRIBUTE_HANDLER(FP_HP_extension),
         ATTRIBUTE_HANDLER(ABI_FP_16bit_format),
         ATTRIBUTE_HANDLER(MPextension_use),
         ATTRIBUTE_HANDLER(DIV_use),
         ATTRIBUTE_HANDLER(DSP_extension),
         ATTRIBUTE_HANDLER(T2EE_use),
         ATTRIBUTE_HANDLER(Virtualization_use),
+        ATTRIBUTE_HANDLER(PAC_extension),
+        ATTRIBUTE_HANDLER(BTI_extension),
+        ATTRIBUTE_HANDLER(PACRET_use),
+        ATTRIBUTE_HANDLER(BTI_use),
         ATTRIBUTE_HANDLER(nodefaults),
 };
 
 #undef ATTRIBUTE_HANDLER
 
 Error ARMAttributeParser::stringAttribute(AttrType tag) {
   StringRef tagName =
       ELFAttrs::attrTypeAsString(tag, tagToStringMap, /*TagPrefix=*/false);

 
 Error ARMAttributeParser::Virtualization_use(AttrType tag) {
   static const char *strings[] = {"Not Permitted", "TrustZone",
                                   "Virtualization Extensions",
                                   "TrustZone + Virtualization Extensions"};
   return parseStringAttribute("Virtualization_use", tag, makeArrayRef(strings));
 }
 
+Error ARMAttributeParser::PAC_extension(ARMBuildAttrs::AttrType tag) {
+  static const char *strings[] = {"Not Permitted", "Permitted in NOP space",
+                                  "Permitted"};
+  return parseStringAttribute("PAC_extension", tag, makeArrayRef(strings));
+}
+
+Error ARMAttributeParser::BTI_extension(ARMBuildAttrs::AttrType tag) {
+  static const char *strings[] = {"Not Permitted", "Permitted in NOP space",
+                                  "Permitted"};
+  return parseStringAttribute("BTI_extension", tag, makeArrayRef(strings));
+}
+
+Error ARMAttributeParser::PACRET_use(ARMBuildAttrs::AttrType tag) {
+  static const char *strings[] = {"Not Used", "Used"};
+  return parseStringAttribute("PACRET_use", tag, makeArrayRef(strings));
+}
+
+Error ARMAttributeParser::BTI_use(ARMBuildAttrs::AttrType tag) {
+  static const char *strings[] = {"Not Used", "Used"};
+  return parseStringAttribute("BTI_use", tag, makeArrayRef(strings));
+}
+
 Error ARMAttributeParser::nodefaults(AttrType tag) {
   uint64_t value = de.getULEB128(cursor);
   printAttribute(tag, value, "Unspecified Tags UNDEFINED");
   return Error::success();
 }
 
 Error ARMAttributeParser::handler(uint64_t tag, bool &handled) {
   handled = false;

llvm/lib/Support/ARMBuildAttrs.cpp

 //===-- ARMBuildAttrs.cpp - ARM Build Attributes --------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
static const TagNameItem tagData[] = {
     {ARMBuildAttrs::ABI_FP_optimization_goals, "Tag_ABI_FP_optimization_goals"},
     {ARMBuildAttrs::compatibility, "Tag_compatibility"},
     {ARMBuildAttrs::CPU_unaligned_access, "Tag_CPU_unaligned_access"},
     {ARMBuildAttrs::FP_HP_extension, "Tag_FP_HP_extension"},
     {ARMBuildAttrs::ABI_FP_16bit_format, "Tag_ABI_FP_16bit_format"},
     {ARMBuildAttrs::MPextension_use, "Tag_MPextension_use"},
     {ARMBuildAttrs::DIV_use, "Tag_DIV_use"},
     {ARMBuildAttrs::DSP_extension, "Tag_DSP_extension"},
+    {ARMBuildAttrs::PAC_extension, "Tag_PAC_extension"},
+    {ARMBuildAttrs::BTI_extension, "Tag_BTI_extension"},
+    {ARMBuildAttrs::BTI_use, "Tag_BTI_use"},
+    {ARMBuildAttrs::PACRET_use, "Tag_PACRET_use"},
     {ARMBuildAttrs::nodefaults, "Tag_nodefaults"},
     {ARMBuildAttrs::also_compatible_with, "Tag_also_compatible_with"},
     {ARMBuildAttrs::T2EE_use, "Tag_T2EE_use"},
     {ARMBuildAttrs::conformance, "Tag_conformance"},
     {ARMBuildAttrs::Virtualization_use, "Tag_Virtualization_use"},
 
     // Legacy Names
     {ARMBuildAttrs::FP_arch, "Tag_VFP_arch"},

llvm/lib/Target/ARM/ARMAsmPrinter.cpp

 //===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
if (const Module *SourceModule = MMI->getModule()) {
       if (auto EnumWidthValue = mdconst::extract_or_null<ConstantInt>(
               SourceModule->getModuleFlag("min_enum_size"))) {
         int EnumWidth = EnumWidthValue->getZExtValue();
         assert((EnumWidth == 1 || EnumWidth == 4) &&
                "Minimum enum width must be 1 or 4 bytes");
         int EnumBuildAttr = EnumWidth == 1 ? 1 : 2;
         ATS.emitAttribute(ARMBuildAttrs::ABI_enum_size, EnumBuildAttr);
       }
+
+      auto *PACValue = mdconst::extract_or_null<ConstantInt>(
+          SourceModule->getModuleFlag("sign-return-address"));
+      if (PACValue && PACValue->getZExtValue() == 1) {
+        // If "+pacbti" is used as an architecture extension,
+        // Tag_PAC_extension is emitted in
+        // ARMTargetStreamer::emitTargetAttributes().
+        if (!STI.hasPACBTI()) {
+          ATS.emitAttribute(ARMBuildAttrs::PAC_extension,
+                            ARMBuildAttrs::AllowPACInNOPSpace);
+        }
+        ATS.emitAttribute(ARMBuildAttrs::PACRET_use, ARMBuildAttrs::PACRETUsed);
+      }
+
+      auto *BTIValue = mdconst::extract_or_null<ConstantInt>(
+          SourceModule->getModuleFlag("branch-target-enforcement"));
+      if (BTIValue && BTIValue->getZExtValue() == 1) {
+        // If "+pacbti" is used as an architecture extension,
+        // Tag_BTI_extension is emitted in
+        // ARMTargetStreamer::emitTargetAttributes().
+        if (!STI.hasPACBTI()) {
+          ATS.emitAttribute(ARMBuildAttrs::BTI_extension,
+                            ARMBuildAttrs::AllowBTIInNOPSpace);
+        }
+        ATS.emitAttribute(ARMBuildAttrs::BTI_use, ARMBuildAttrs::BTIUsed);
+      }
     }
   }
 
   // We currently do not support using R9 as the TLS pointer.
   if (STI.isRWPI())
     ATS.emitAttribute(ARMBuildAttrs::ABI_PCS_R9_use,
                       ARMBuildAttrs::R9IsSB);
   else if (STI.isR9Reserved())

llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp

 //===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
if (STI.hasFeature(ARM::FeatureTrustZone) &&
       STI.hasFeature(ARM::FeatureVirtualization))
     emitAttribute(ARMBuildAttrs::Virtualization_use,
                   ARMBuildAttrs::AllowTZVirtualization);
   else if (STI.hasFeature(ARM::FeatureTrustZone))
     emitAttribute(ARMBuildAttrs::Virtualization_use, ARMBuildAttrs::AllowTZ);
   else if (STI.hasFeature(ARM::FeatureVirtualization))
     emitAttribute(ARMBuildAttrs::Virtualization_use,
                   ARMBuildAttrs::AllowVirtualization);
+
+  if (STI.hasFeature(ARM::FeaturePACBTI)) {
+    emitAttribute(ARMBuildAttrs::PAC_extension, ARMBuildAttrs::AllowPAC);
+    emitAttribute(ARMBuildAttrs::BTI_extension, ARMBuildAttrs::AllowBTI);
+  }
 }

llvm/test/CodeGen/ARM/build-attributes-encoding.s

 .eabi_attribute 42, 1
 
 // Tag_DIV_use (=44)
 .eabi_attribute 44, 2
 
 // Tag_DSP_extension (=46)
 .eabi_attribute 46, 1
 
+// Tag_PAC_extension (=50)
+.eabi_attribute 50, 0
+
+// Tag_BTI_extension (=52)
+.eabi_attribute 52, 0
+
+// Tag_BTI_use (=74)
+.eabi_attribute 74, 0
+
+// Tag_PACRET_use (=76)
+.eabi_attribute 76, 0
+
 // Tag_Virtualization_use (=68)
 .eabi_attribute 68, 3
 
 // Check that values > 128 are encoded properly
 .eabi_attribute 110, 160
 
 // Check that tags > 128 are encoded properly
 .eabi_attribute 129, "1"
 .eabi_attribute 250, 1
 
-// CHECK:        Section {
-// CHECK:          Name: .ARM.attributes
-// CHECK-NEXT:     Type: SHT_ARM_ATTRIBUTES
-// CHECK-NEXT:     Flags [ (0x0)
-// CHECK-NEXT:     ]
-// CHECK-NEXT:     Address: 0x0
-// CHECK-NEXT:     Offset: 0x34
-// CHECK-NEXT:     Size: 73
-// CHECK-NEXT:     Link: 0
-// CHECK-NEXT:     Info: 0
-// CHECK-NEXT:     AddressAlignment: 1
-// CHECK-NEXT:     EntrySize: 0
-// CHECK-NEXT:     SectionData (
-// CHECK-NEXT:       0000: 41480000 00616561 62690001 3E000000
-// CHECK-NEXT:       0010: 05636F72 7465782D 61380006 0A074108
-// CHECK-NEXT:       0020: 0109020A 030C0214 01150117 01180119
-// CHECK-NEXT:       0030: 011B001C 0124012A 012C022E 0144036E
-// CHECK-NEXT:       0040: A0018101 3100FA01 01
-// CHECK-NEXT:     )
+// CHECK:       Section {
+// CHECK:         Name: .ARM.attributes (7)
+// CHECK-NEXT:    Type: SHT_ARM_ATTRIBUTES (0x70000003)
+// CHECK-NEXT:    Flags [ (0x0)
+// CHECK-NEXT:    ]
+// CHECK-NEXT:    Address: 0x0
+// CHECK-NEXT:    Offset: 0x34
+// CHECK-NEXT:    Size: 81
+// CHECK-NEXT:    Link: 0
+// CHECK-NEXT:    Info: 0
+// CHECK-NEXT:    AddressAlignment: 1
+// CHECK-NEXT:    EntrySize: 0
+// CHECK-NEXT:    SectionData (
+// CHECK-NEXT:      0000: 41500000 00616561 62690001 46000000  |AP...aeabi..F...|
+// CHECK-NEXT:      0010: 05636F72 7465782D 61380006 0A074108  |.cortex-a8....A.|
+// CHECK-NEXT:      0020: 0109020A 030C0214 01150117 01180119  |................|
+// CHECK-NEXT:      0030: 011B001C 0124012A 012C022E 01320034  |.....$.*.,...2.4|
+// CHECK-NEXT:      0040: 0044034A 004C006E A0018101 3100FA01  |.D.J.L.n....1...|
+// CHECK-NEXT:      0050: 01                                   |.|
+// CHECK-NEXT:    )

llvm/test/CodeGen/ARM/build-attributes.ll

 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN
 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN
 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
 ; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi | FileCheck %s --check-prefix=ARMv81M-MAIN
 ; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEINT
 ; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEFP
+; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+pacbti | FileCheck %s --check-prefix=ARMv81M-MAIN-PACBTI
 ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m55 | FileCheck %s --check-prefix=CORTEX-M55
 
 ; CPU-SUPPORTED-NOT: is not a recognized processor for this target
 
 ; XSCALE:      .eabi_attribute 6, 5
 ; XSCALE:      .eabi_attribute 8, 1
 ; XSCALE:      .eabi_attribute 9, 1
 

 ; ARMv8R: .eabi_attribute 14, 0   @ Tag_ABI_PCS_R9_use
 
 ; ARMv81M-MAIN: .eabi_attribute 6, 21 @ Tag_CPU_arch
 ; ARMv81M-MAIN-NOT: .eabi_attribute 48
 ; ARMv81M-MAIN-MVEINT: .eabi_attribute 6, 21 @ Tag_CPU_arch
 ; ARMv81M-MAIN-MVEINT: .eabi_attribute 48, 1 @ Tag_MVE_arch
 ; ARMv81M-MAIN-MVEFP: .eabi_attribute 6, 21 @ Tag_CPU_arch
 ; ARMv81M-MAIN-MVEFP: .eabi_attribute 48, 2 @ Tag_MVE_arch
+; ARMv81M-MAIN-PACBTI: .eabi_attribute 50, 2 @ Tag_PAC_extension
+; ARMv81M-MAIN-PACBTI: .eabi_attribute 52, 2 @ Tag_BTI_extension
 
 ; CORTEX-M55: .cpu cortex-m55
 ; CORTEX-M55: .eabi_attribute 6, 21
 ; CORTEX-M55: .eabi_attribute 7, 77
 ; CORTEX-M55: .eabi_attribute 8, 0
 ; CORTEX-M55: .eabi_attribute 9, 3
 ; CORTEX-M55: .fpu fpv5-d16
 ; CORTEX-M55: .eabi_attribute 36, 1

llvm/test/CodeGen/ARM/pacbti-module-attrs.ll

+; RUN: llc -mtriple thumbv8.1m.main-arm-none-eabi %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-USE
+; RUN: llc -mtriple thumbv8.1m.main-arm-none-eabi -mattr=+pacbti %s -o - | FileCheck %s --check-prefixes=CHECK-ARCHEXT,CHECK-USE
+
+; CHECK-DAG:         .eabi_attribute  50, 1 @ Tag_PAC_extension
+; CHECK-ARCHEXT-DAG: .eabi_attribute  50, 2 @ Tag_PAC_extension
+; CHECK-DAG:         .eabi_attribute  52, 1 @ Tag_BTI_extension
+; CHECK-ARCHEXT-DAG: .eabi_attribute  52, 2 @ Tag_BTI_extension
+; CHECK-USE-DAG:     .eabi_attribute  76, 1 @ Tag_PACRET_use
+; CHECK-USE-DAG:     .eabi_attribute  74, 1 @ Tag_BTI_use
+
+define i32 @foo(i32 %a) {
+entry:
+  %add = add nsw i32 %a, 1
+  ret i32 %add
+}
+
+!llvm.module.flags = !{!0, !1, !2}
+
+!0 = !{i32 1, !"branch-target-enforcement", i32 1}
+!1 = !{i32 1, !"sign-return-address", i32 1}
+!2 = !{i32 1, !"sign-return-address-all", i32 0}

llvm/test/MC/ARM/directive-eabi_attribute.s

 @ CHECK-OBJ-NEXT:   TagName: DIV_use
 @ CHECK-OBJ-NEXT:   Description: If Available
   .eabi_attribute Tag_DSP_extension, 0
 @ CHECK: .eabi_attribute 46, 0
 @ CHECK-OBJ:        Tag: 46
 @ CHECK-OBJ-NEXT:   Value: 0
 @ CHECK-OBJ-NEXT:   TagName: DSP_extension
 @ CHECK-OBJ-NEXT:   Description: Not Permitted
+  .eabi_attribute Tag_PAC_extension, 0
+@ CHECK: .eabi_attribute 50, 0
+@ CHECK-OBJ:        Tag: 50
+@ CHECK-OBJ-NEXT:   Value: 0
+@ CHECK-OBJ-NEXT:   TagName: PAC_extension
+@ CHECK-OBJ-NEXT:   Description: Not Permitted
+  .eabi_attribute Tag_BTI_extension, 0
+@ CHECK: .eabi_attribute 52, 0
+@ CHECK-OBJ:        Tag: 52
+@ CHECK-OBJ-NEXT:   Value: 0
+@ CHECK-OBJ-NEXT:   TagName: BTI_extension
+@ CHECK-OBJ-NEXT:   Description: Not Permitted
   .eabi_attribute Tag_nodefaults, 0
 @ CHECK: .eabi_attribute 64, 0
 @ CHECK-OBJ:        Tag: 64
 @ CHECK-OBJ-NEXT:   Value: 0
 @ CHECK-OBJ-NEXT:   TagName: nodefaults
 @ CHECK-OBJ-NEXT:   Description: Unspecified Tags UNDEFINED
   .eabi_attribute Tag_also_compatible_with, "gnu"
 @ CHECK: .eabi_attribute 65, "gnu"
 @ CHECK-OBJ:        Tag: 65
 @ CHECK-OBJ-NEXT:   TagName: also_compatible_with
 @ CHECK-OBJ-NEXT:   Value: gnu
   .eabi_attribute Tag_T2EE_use, 0
 @ CHECK: .eabi_attribute 66, 0
 @ CHECK-OBJ:        Tag: 66
 @ CHECK-OBJ-NEXT:   Value: 0
 @ CHECK-OBJ-NEXT:   TagName: T2EE_use
 @ CHECK-OBJ-NEXT:   Description: Not Permitted
   .eabi_attribute Tag_Virtualization_use, 0
 @ CHECK: .eabi_attribute 68, 0
 @ CHECK-OBJ:        Tag: 68
 @ CHECK-OBJ-NEXT:   Value: 0
 @ CHECK-OBJ-NEXT:   TagName: Virtualization_use
 @ CHECK-OBJ-NEXT:   Description: Not Permitted
+  .eabi_attribute Tag_BTI_use, 0
+@ CHECK: .eabi_attribute 74, 0
+@ CHECK-OBJ:        Tag: 74
+@ CHECK-OBJ-NEXT:   Value: 0
+@ CHECK-OBJ-NEXT:   TagName: BTI_use
+@ CHECK-OBJ-NEXT:   Description: Not Used
+  .eabi_attribute Tag_PACRET_use, 0
+@ CHECK: .eabi_attribute 76, 0
+@ CHECK-OBJ:        Tag: 76
+@ CHECK-OBJ-NEXT:   Value: 0
+@ CHECK-OBJ-NEXT:   TagName: PACRET_use
+@ CHECK-OBJ-NEXT:   Description: Not Used
+
 
 @ ===--- Compatibility Checks ---===
 
   .eabi_attribute Tag_ABI_align8_needed, 1
 @ CHECK: .eabi_attribute 24, 1
   .eabi_attribute Tag_ABI_align8_preserved, 2
 @ CHECK: .eabi_attribute 25, 2
 
 @ ===--- GNU AS Compatibility Checks ---===
 
   .eabi_attribute 2 * 2 + 1, "cortex-a9"
 @ CHECK: .cpu cortex-a9
   .eabi_attribute 2 * 2 + 2, 5 * 2
 @ CHECK: .eabi_attribute 6, 10