[RISCV] Add vcsr CSR name for V extension.

[kito-cheng]

LGTM, I am surprise this CSR isn't added yet, double checked with v-spec[1].

[1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#3-vector-extension-programmers-model

llvm/lib/Target/RISCV/RISCVSystemOperands.td

 def : SysReg<"dscratch1", 0x7B3>;
 
 //===-----------------------------------------------
 // User Vector CSRs
 //===-----------------------------------------------
 def : SysReg<"vstart", 0x008>;
 def : SysReg<"vxsat", 0x009>;
 def : SysReg<"vxrm", 0x00A>;
+def : SysReg<"vcsr", 0x00F>;
 def : SysReg<"vl", 0xC20>;
 def : SysReg<"vtype", 0xC21>;
 def : SysReg<"vlenb", 0xC22>;

llvm/test/MC/RISCV/rvv-user-csr-names.s

 # CHECK-INST: csrrs t2, vxrm, zero
 # CHECK-ENC:  encoding: [0xf3,0x23,0xa0,0x00]
 # CHECK-INST-ALIAS: csrr t2, vxrm
 # name
 csrrs t1, vxrm, zero
 # uimm12
 csrrs t2, 0x00a, zero
 
+# vcsr
+# name
+# CHECK-INST: csrrs t1, vcsr, zero
+# CHECK-ENC:  encoding: [0x73,0x23,0xf0,0x00]
+# CHECK-INST-ALIAS: csrr t1, vcsr
+# uimm12
+# CHECK-INST: csrrs t2, vcsr, zero
+# CHECK-ENC:  encoding: [0xf3,0x23,0xf0,0x00]
+# CHECK-INST-ALIAS: csrr t2, vcsr
+# name
+csrrs t1, vcsr, zero
+# uimm12
+csrrs t2, 0x00f, zero
+
 # vl
 # name
 # CHECK-INST: csrrs t1, vl, zero
 # CHECK-ENC:  encoding: [0x73,0x23,0x00,0xc2]
 # CHECK-INST-ALIAS: csrr t1, vl
 # uimm12
 # CHECK-INST: csrrs t2, vl, zero
 # CHECK-ENC:  encoding: [0xf3,0x23,0x00,0xc2]