[AArch64] Model Cortex-A55 Q register NEON instructions

[dmgreen]

Summary

Cortex-A55 has 2 64bit NEON vector units, meaning a 128bit instruction requires taking both units (and can only be issued as the first instruction in a dual issue pair). This patch models that by splitting the WriteV SchedWrite into two - the WriteVd that reads/writes only 64bit operands, and the WriteVq that read/writes 128bit registers. The A55 schedule then uses this distinction to model the WriteVq as taking both resource units, and starting a Schedule Group and WriteVd as taking one as before.

I believe this is more correct, even if it does not lead to much better performance.

[dmgreen]

ping

[NickGuy]

LGTM

llvm/lib/Target/AArch64/AArch64InstrFormats.td

 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDThreeSameVector<bit Q, bit U, bits<3> size, bits<5> opcode,
                         RegisterOperand regtype, string asm, string kind,
                         list<dag> pattern>
   : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind #
       "|" # kind # "\t$Rd, $Rn, $Rm|}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-21} = size;
   let Inst{20-16} = Rm;
   let Inst{15-11} = opcode;
   let Inst{10}    = 1;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDThreeSameVectorTied<bit Q, bit U, bits<3> size, bits<5> opcode,
                         RegisterOperand regtype, string asm, string kind,
                         list<dag> pattern>
   : I<(outs regtype:$dst), (ins regtype:$Rd, regtype:$Rn, regtype:$Rm), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind #
       "|" # kind # "\t$Rd, $Rn, $Rm}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-21} = size;
   let Inst{20-16} = Rm;
   let Inst{15-11} = opcode;
   let Inst{10}    = 1;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDThreeSameVectorPseudo<RegisterOperand regtype, list<dag> pattern>
   : Pseudo<(outs regtype:$dst), (ins regtype:$Rd, regtype:$Rn, regtype:$Rm), pattern>,
-    Sched<[WriteV]>;
+    Sched<[!if(!eq(regtype, V128), WriteVq, WriteVd)]>;
 
 multiclass SIMDLogicalThreeVectorPseudo<SDPatternOperator OpNode> {
   def v8i8  : BaseSIMDThreeSameVectorPseudo<V64,
              [(set (v8i8 V64:$dst),
                    (OpNode (v8i8 V64:$Rd), (v8i8 V64:$Rn), (v8i8 V64:$Rm)))]>;
   def v16i8  : BaseSIMDThreeSameVectorPseudo<V128,
              [(set (v16i8 V128:$dst),
                    (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn),

 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDTwoSameVector<bit Q, bit U, bits<2> size, bits<5> opcode,
                             bits<2> size2, RegisterOperand regtype, string asm,
                             string dstkind, string srckind, list<dag> pattern>
   : I<(outs regtype:$Rd), (ins regtype:$Rn), asm,
       "{\t$Rd" # dstkind # ", $Rn" # srckind #
       "|" # dstkind # "\t$Rd, $Rn}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21} = 0b1;
   let Inst{20-19} = size2;
   let Inst{18-17} = 0b00;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDTwoSameVectorTied<bit Q, bit U, bits<2> size, bits<5> opcode,
                                 bits<2> size2, RegisterOperand regtype,
                                 string asm, string dstkind, string srckind,
                                 list<dag> pattern>
   : I<(outs regtype:$dst), (ins regtype:$Rd, regtype:$Rn), asm,
       "{\t$Rd" # dstkind # ", $Rn" # srckind #
       "|" # dstkind # "\t$Rd, $Rn}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21} = 0b1;

 }
 
 class BaseSIMDVectorLShiftLongBySize<bit Q, bits<2> size,
                             RegisterOperand regtype, string asm, string dstkind,
                             string srckind, string amount>
   : I<(outs V128:$Rd), (ins regtype:$Rn), asm,
       "{\t$Rd" # dstkind # ", $Rn" # srckind # ", #" # amount #
       "|" # dstkind # "\t$Rd, $Rn, #" #  amount # "}", "", []>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29-24} = 0b101110;
   let Inst{23-22} = size;
   let Inst{21-10} = 0b100001001110;
   let Inst{9-5}   = Rn;

 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDMixedTwoVector<bit Q, bit U, bits<2> size, bits<5> opcode,
                            RegisterOperand inreg, RegisterOperand outreg,
                            string asm, string outkind, string inkind,
                            list<dag> pattern>
   : I<(outs outreg:$Rd), (ins inreg:$Rn), asm,
       "{\t$Rd" # outkind # ", $Rn" # inkind #
       "|" # outkind # "\t$Rd, $Rn}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b10000;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDMixedTwoVectorTied<bit Q, bit U, bits<2> size, bits<5> opcode,
                            RegisterOperand inreg, RegisterOperand outreg,
                            string asm, string outkind, string inkind,
                            list<dag> pattern>
   : I<(outs outreg:$dst), (ins outreg:$Rd, inreg:$Rn), asm,
       "{\t$Rd" # outkind # ", $Rn" # inkind #
       "|" # outkind # "\t$Rd, $Rn}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b10000;

 class BaseSIMDCmpTwoVector<bit Q, bit U, bits<2> size, bits<2> size2,
                            bits<5> opcode, RegisterOperand regtype, string asm,
                            string kind, string zero, ValueType dty,
                            ValueType sty, SDNode OpNode>
   : I<(outs regtype:$Rd), (ins regtype:$Rn), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", #" # zero #
       "|" # kind # "\t$Rd, $Rn, #" # zero # "}", "",
       [(set (dty regtype:$Rd), (OpNode (sty regtype:$Rn)))]>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21} = 0b1;

 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDFPCvtTwoVector<bit Q, bit U, bits<2> size, bits<5> opcode,
                              RegisterOperand outtype, RegisterOperand intype,
                              string asm, string VdTy, string VnTy,
                              list<dag> pattern>
   : I<(outs outtype:$Rd), (ins intype:$Rn), asm,
       !strconcat("\t$Rd", VdTy, ", $Rn", VnTy), "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b10000;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDFPCvtTwoVectorTied<bit Q, bit U, bits<2> size, bits<5> opcode,
                              RegisterOperand outtype, RegisterOperand intype,
                              string asm, string VdTy, string VnTy,
                              list<dag> pattern>
   : I<(outs outtype:$dst), (ins outtype:$Rd, intype:$Rn), asm,
       !strconcat("\t$Rd", VdTy, ", $Rn", VnTy), "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b10000;

 class BaseSIMDDifferentThreeVector<bit U, bits<3> size, bits<4> opcode,
                       RegisterOperand outtype, RegisterOperand intype1,
                       RegisterOperand intype2, string asm,
                       string outkind, string inkind1, string inkind2,
                       list<dag> pattern>
   : I<(outs outtype:$Rd), (ins intype1:$Rn, intype2:$Rm), asm,
       "{\t$Rd" # outkind # ", $Rn" # inkind1 # ", $Rm" # inkind2 #
       "|" # outkind # "\t$Rd, $Rn, $Rm}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31}    = 0;
   let Inst{30}    = size{0};
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size{2-1};

 class BaseSIMDDifferentThreeVectorTied<bit U, bits<3> size, bits<4> opcode,
                       RegisterOperand outtype, RegisterOperand intype1,
                       RegisterOperand intype2, string asm,
                       string outkind, string inkind1, string inkind2,
                       list<dag> pattern>
   : I<(outs outtype:$dst), (ins outtype:$Rd, intype1:$Rn, intype2:$Rm), asm,
       "{\t$Rd" # outkind # ", $Rn" # inkind1 # ", $Rm" # inkind2 #
       "|" # outkind # "\t$Rd, $Rn, $Rm}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31}    = 0;
   let Inst{30}    = size{0};
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size{2-1};

 
 class BaseSIMDBitwiseExtract<bit size, RegisterOperand regtype, ValueType vty,
                              string asm, string kind>
   : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm, i32imm:$imm), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # ", $imm" #
       "|" # kind # "\t$Rd, $Rn, $Rm, $imm}", "",
       [(set (vty regtype:$Rd),
             (AArch64ext regtype:$Rn, regtype:$Rm, (i32 imm:$imm)))]>,
-    Sched<[WriteV]> {
+    Sched<[!if(size, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   bits<4> imm;
   let Inst{31}    = 0;
   let Inst{30}    = size;
   let Inst{29-21} = 0b101110000;
   let Inst{20-16} = Rm;

 //----------------------------------------------------------------------------
 
 class BaseSIMDZipVector<bits<3> size, bits<3> opc, RegisterOperand regtype,
                         string asm, string kind, SDNode OpNode, ValueType valty>
   : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind #
       "|" # kind # "\t$Rd, $Rn, $Rm}", "",
       [(set (valty regtype:$Rd), (OpNode regtype:$Rn, regtype:$Rm))]>,
-    Sched<[WriteV]> {
+    Sched<[!if(!eq(regtype, V128), WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31}    = 0;
   let Inst{30}    = size{0};
   let Inst{29-24} = 0b001110;
   let Inst{23-22} = size{2-1};
   let Inst{21}    = 0;

 //----------------------------------------------------------------------------
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDThreeScalar<bit U, bits<3> size, bits<5> opcode,
                         RegisterClass regtype, string asm,
                         list<dag> pattern>
   : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm), asm,
       "\t$Rd, $Rn, $Rm", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-21} = size;
   let Inst{20-16} = Rm;
   let Inst{15-11} = opcode;
   let Inst{10}    = 1;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDThreeScalarTied<bit U, bits<2> size, bit R, bits<5> opcode,
                         dag oops, dag iops, string asm,
             list<dag> pattern>
   : I<oops, iops, asm, "\t$Rd, $Rn, $Rm", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-22} = size;
   let Inst{21}    = R;
multiclass SIMDThreeScalarFPCmp<bit U, bit S, bits<3> opc, string asm,
   def : Pat<(v1i64 (OpNode (v1f64 FPR64:$Rn), (v1f64 FPR64:$Rm))),
             (!cast<Instruction>(NAME # "64") FPR64:$Rn, FPR64:$Rm)>;
 }
 
 class BaseSIMDThreeScalarMixed<bit U, bits<2> size, bits<5> opcode,
               dag oops, dag iops, string asm, string cstr, list<dag> pat>
   : I<oops, iops, asm,
       "\t$Rd, $Rn, $Rm", cstr, pat>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-22} = size;
   let Inst{21}    = 1;

 //----------------------------------------------------------------------------
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDTwoScalar<bit U, bits<2> size, bits<2> size2, bits<5> opcode,
                         RegisterClass regtype, RegisterClass regtype2,
                         string asm, list<dag> pat>
   : I<(outs regtype:$Rd), (ins regtype2:$Rn), asm,
       "\t$Rd, $Rn", "", pat>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-22} = size;
   let Inst{21} = 0b1;
   let Inst{20-19} = size2;
   let Inst{18-17} = 0b00;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDTwoScalarTied<bit U, bits<2> size, bits<5> opcode,
                         RegisterClass regtype, RegisterClass regtype2,
                         string asm, list<dag> pat>
   : I<(outs regtype:$dst), (ins regtype:$Rd, regtype2:$Rn), asm,
       "\t$Rd, $Rn", "$Rd = $dst", pat>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b10000;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDCmpTwoScalar<bit U, bits<2> size, bits<2> size2, bits<5> opcode,
                         RegisterClass regtype, string asm, string zero>
   : I<(outs regtype:$Rd), (ins regtype:$Rn), asm,
       "\t$Rd, $Rn, #" # zero, "", []>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-22} = size;
   let Inst{21} = 0b1;
   let Inst{20-19} = size2;
   let Inst{18-17} = 0b00;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 class SIMDInexactCvtTwoScalar<bits<5> opcode, string asm>
   : I<(outs FPR32:$Rd), (ins FPR64:$Rn), asm, "\t$Rd, $Rn", "",
      [(set (f32 FPR32:$Rd), (int_aarch64_sisd_fcvtxn (f64 FPR64:$Rn)))]>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-17} = 0b011111100110000;
   let Inst{16-12} = opcode;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }

 //----------------------------------------------------------------------------
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDPairwiseScalar<bit U, bits<2> size, bits<5> opcode,
                         RegisterOperand regtype, RegisterOperand vectype,
                         string asm, string kind>
   : I<(outs regtype:$Rd), (ins vectype:$Rn), asm,
       "{\t$Rd, $Rn" # kind # "|" # kind # "\t$Rd, $Rn}", "", []>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-24} = 0b11110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b11000;
   let Inst{16-12} = opcode;

 //----------------------------------------------------------------------------
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDAcrossLanes<bit Q, bit U, bits<2> size, bits<5> opcode,
                           RegisterClass regtype, RegisterOperand vectype,
                           string asm, string kind, list<dag> pattern>
   : I<(outs regtype:$Rd), (ins vectype:$Rn), asm,
       "{\t$Rd, $Rn" # kind # "|" # kind # "\t$Rd, $Rn}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
   let Inst{23-22} = size;
   let Inst{21-17} = 0b11000;

 // AdvSIMD INS/DUP instructions
 //----------------------------------------------------------------------------
 
 // FIXME: There has got to be a better way to factor these. ugh.
 
 class BaseSIMDInsDup<bit Q, bit op, dag outs, dag ins, string asm,
                      string operands, string constraints, list<dag> pattern>
   : I<outs, ins, asm, operands, constraints, pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31} = 0;
   let Inst{30} = Q;
   let Inst{29} = op;
   let Inst{28-21} = 0b01110000;
   let Inst{15} = 0;
   let Inst{10} = 1;

 // AdvSIMD TBL/TBX
 //----------------------------------------------------------------------------
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDTableLookup<bit Q, bits<2> len, bit op, RegisterOperand vectype,
                           RegisterOperand listtype, string asm, string kind>
   : I<(outs vectype:$Vd), (ins listtype:$Vn, vectype:$Vm), asm,
        "\t$Vd" # kind # ", $Vn, $Vm" # kind, "", []>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Vd;
   bits<5> Vn;
   bits<5> Vm;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29-21} = 0b001110000;
   let Inst{20-16} = Vm;
   let Inst{15}    = 0;
   let Inst{14-13} = len;
   let Inst{12}    = op;
   let Inst{11-10} = 0b00;
   let Inst{9-5}   = Vn;
   let Inst{4-0}   = Vd;
 }
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDTableLookupTied<bit Q, bits<2> len, bit op, RegisterOperand vectype,
                           RegisterOperand listtype, string asm, string kind>
   : I<(outs vectype:$dst), (ins vectype:$Vd, listtype:$Vn, vectype:$Vm), asm,
        "\t$Vd" # kind # ", $Vn, $Vm" # kind, "$Vd = $dst", []>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Vd;
   bits<5> Vn;
   bits<5> Vm;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29-21} = 0b001110000;
   let Inst{20-16} = Vm;
   let Inst{15}    = 0;

 // AdvSIMD scalar CPY
 //----------------------------------------------------------------------------
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDScalarCPY<RegisterClass regtype, RegisterOperand vectype,
                         string asm, string kind, Operand idxtype>
   : I<(outs regtype:$dst), (ins vectype:$src, idxtype:$idx), asm,
        "{\t$dst, $src" # kind # "$idx" #
        "|\t$dst, $src$idx}", "", []>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> dst;
   bits<5> src;
   let Inst{31-21} = 0b01011110000;
   let Inst{15-10} = 0b000001;
   let Inst{9-5}   = src;
   let Inst{4-0}   = dst;
 }
 

 //----------------------------------------------------------------------------
 // AdvSIMD modified immediate instructions
 //----------------------------------------------------------------------------
 
 class BaseSIMDModifiedImm<bit Q, bit op, bit op2, dag oops, dag iops,
                           string asm, string op_string,
                           string cstr, list<dag> pattern>
   : I<oops, iops, asm, op_string, cstr, pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<8> imm8;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = op;
   let Inst{28-19} = 0b0111100000;
   let Inst{18-16} = imm8{7-5};
   let Inst{11} = op2;
class BaseSIMDIndexed<bit Q, bit U, bit Scalar, bits<2> size, bits<4> opc,
                       RegisterOperand dst_reg, RegisterOperand lhs_reg,
                       RegisterOperand rhs_reg, Operand vec_idx, string asm,
                       string apple_kind, string dst_kind, string lhs_kind,
                       string rhs_kind, list<dag> pattern>
   : I<(outs dst_reg:$Rd), (ins lhs_reg:$Rn, rhs_reg:$Rm, vec_idx:$idx),
       asm,
       "{\t$Rd" # dst_kind # ", $Rn" # lhs_kind # ", $Rm" # rhs_kind # "$idx" #
       "|" # apple_kind # "\t$Rd, $Rn, $Rm$idx}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
 
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28}    = Scalar;
class BaseSIMDIndexedTied<bit Q, bit U, bit Scalar, bits<2> size, bits<4> opc,
                       RegisterOperand dst_reg, RegisterOperand lhs_reg,
                       RegisterOperand rhs_reg, Operand vec_idx, string asm,
                       string apple_kind, string dst_kind, string lhs_kind,
                       string rhs_kind, list<dag> pattern>
   : I<(outs dst_reg:$dst),
       (ins dst_reg:$Rd, lhs_reg:$Rn, rhs_reg:$Rm, vec_idx:$idx), asm,
       "{\t$Rd" # dst_kind # ", $Rn" # lhs_kind # ", $Rm" # rhs_kind # "$idx" #
       "|" # apple_kind # "\t$Rd, $Rn, $Rm$idx}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
 
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28}    = Scalar;
: I<(outs V128:$dst),
       (ins V128:$Rd, V128:$Rn, V128_lo:$Rm, VectorIndexH:$idx), asm,
       "{\t$Rd.4s, $Rn.8h, $Rm.h$idx}", "$Rd = $dst",
           [(set (v4f32 V128:$dst),
                 (v4f32 (OpNode (v4f32 V128:$Rd),
                                (v8bf16 V128:$Rn),
                                (v8bf16
                                   (AArch64duplane16 (v8bf16 V128_lo:$Rm),
                                       VectorIndexH:$idx)))))]>,
-    Sched<[WriteV]> {
+    Sched<[WriteVq]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<4> Rm;
   bits<3> idx;
 
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29-22} = 0b00111111;

 //----------------------------------------------------------------------------
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDScalarShift<bit U, bits<5> opc, bits<7> fixed_imm,
                      RegisterClass regtype1, RegisterClass regtype2,
                      Operand immtype, string asm, list<dag> pattern>
   : I<(outs regtype1:$Rd), (ins regtype2:$Rn, immtype:$imm),
       asm, "\t$Rd, $Rn, $imm", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<7> imm;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-23} = 0b111110;
   let Inst{22-16} = fixed_imm;
   let Inst{15-11} = opc;
   let Inst{10}    = 1;
   let Inst{9-5} = Rn;
   let Inst{4-0} = Rd;
 }
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDScalarShiftTied<bit U, bits<5> opc, bits<7> fixed_imm,
                      RegisterClass regtype1, RegisterClass regtype2,
                      Operand immtype, string asm, list<dag> pattern>
   : I<(outs regtype1:$dst), (ins regtype1:$Rd, regtype2:$Rn, immtype:$imm),
       asm, "\t$Rd, $Rn, $imm", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[WriteVd]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<7> imm;
   let Inst{31-30} = 0b01;
   let Inst{29}    = U;
   let Inst{28-23} = 0b111110;
   let Inst{22-16} = fixed_imm;
   let Inst{15-11} = opc;

 class BaseSIMDVectorShift<bit Q, bit U, bits<5> opc, bits<7> fixed_imm,
                      RegisterOperand dst_reg, RegisterOperand src_reg,
                      Operand immtype,
                      string asm, string dst_kind, string src_kind,
                      list<dag> pattern>
   : I<(outs dst_reg:$Rd), (ins src_reg:$Rn, immtype:$imm),
       asm, "{\t$Rd" # dst_kind # ", $Rn" # src_kind # ", $imm" #
            "|" # dst_kind # "\t$Rd, $Rn, $imm}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-23} = 0b011110;
   let Inst{22-16} = fixed_imm;
   let Inst{15-11} = opc;
   let Inst{10}    = 1;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 let mayStore = 0, mayLoad = 0, hasSideEffects = 0 in
 class BaseSIMDVectorShiftTied<bit Q, bit U, bits<5> opc, bits<7> fixed_imm,
                      RegisterOperand vectype1, RegisterOperand vectype2,
                      Operand immtype,
                      string asm, string dst_kind, string src_kind,
                      list<dag> pattern>
   : I<(outs vectype1:$dst), (ins vectype1:$Rd, vectype2:$Rn, immtype:$imm),
       asm, "{\t$Rd" # dst_kind # ", $Rn" # src_kind # ", $imm" #
            "|" # dst_kind # "\t$Rd, $Rn, $imm}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-23} = 0b011110;
   let Inst{22-16} = fixed_imm;
   let Inst{15-11} = opc;

 }
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class BaseSIMDThreeSameVectorComplex<bit Q, bit U, bits<2> size, bits<3> opcode,
                                      RegisterOperand regtype, Operand rottype,
                                      string asm, string kind, list<dag> pattern>
   : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm, rottype:$rot), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # ", $rot"
       "|" # kind # "\t$Rd, $Rn, $Rm, $rot}", "", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   bits<1> rot;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
class BaseSIMDThreeSameVectorTiedComplex<bit Q, bit U, bits<2> size,
                                          bits<3> opcode,
                                          RegisterOperand regtype,
                                          Operand rottype, string asm,
                                          string kind, list<dag> pattern>
   : I<(outs regtype:$dst),
       (ins regtype:$Rd, regtype:$Rn, regtype:$Rm, rottype:$rot), asm,
       "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # ", $rot"
       "|" # kind # "\t$Rd, $Rn, $Rm, $rot}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   bits<2> rot;
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;
   let Inst{28-24} = 0b01110;
class BaseSIMDIndexedTiedComplex<bit Q, bit U, bit Scalar, bits<2> size,
                                  string dst_kind, string lhs_kind,
                                  string rhs_kind, list<dag> pattern>
   : I<(outs dst_reg:$dst),
       (ins dst_reg:$Rd, lhs_reg:$Rn, rhs_reg:$Rm, vec_idx:$idx, rottype:$rot),
       asm,
       "{\t$Rd" # dst_kind # ", $Rn" # lhs_kind # ", $Rm" # rhs_kind #
       "$idx, $rot" # "|" # apple_kind #
       "\t$Rd, $Rn, $Rm$idx, $rot}", "$Rd = $dst", pattern>,
-    Sched<[WriteV]> {
+    Sched<[!if(Q, WriteVq, WriteVd)]> {
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   bits<2> rot;
 
   let Inst{31}    = 0;
   let Inst{30}    = Q;
   let Inst{29}    = U;

 //----------------------------------------------------------------------------
 // Crypto extensions
 //----------------------------------------------------------------------------
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class AESBase<bits<4> opc, string asm, dag outs, dag ins, string cstr,
               list<dag> pat>
   : I<outs, ins, asm, "{\t$Rd.16b, $Rn.16b|.16b\t$Rd, $Rn}", cstr, pat>,
-    Sched<[WriteV]>{
+    Sched<[WriteVq]>{
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-16} = 0b0100111000101000;
   let Inst{15-12} = opc;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
: AESBase<opc, asm, (outs V128:$dst), (ins V128:$Rd, V128:$Rn),
                   (OpNode (v16i8 V128:$Rd), (v16i8 V128:$Rn)))]>;
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class SHA3OpTiedInst<bits<3> opc, string asm, string dst_lhs_kind,
                      dag oops, dag iops, list<dag> pat>
   : I<oops, iops, asm,
       "{\t$Rd" # dst_lhs_kind # ", $Rn" # dst_lhs_kind # ", $Rm.4s" #
       "|.4s\t$Rd, $Rn, $Rm}", "$Rd = $dst", pat>,
-    Sched<[WriteV]>{
+    Sched<[WriteVq]>{
   bits<5> Rd;
   bits<5> Rn;
   bits<5> Rm;
   let Inst{31-21} = 0b01011110000;
   let Inst{20-16} = Rm;
   let Inst{15}    = 0;
   let Inst{14-12} = opc;
   let Inst{11-10} = 0b00;
: SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst),
                                  (v4i32 V128:$Rm)))]>;
 
 let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
 class SHA2OpInst<bits<4> opc, string asm, string kind,
                  string cstr, dag oops, dag iops,
                  list<dag> pat>
   : I<oops, iops, asm, "{\t$Rd" # kind # ", $Rn" # kind #
                        "|" # kind # "\t$Rd, $Rn}", cstr, pat>,
-    Sched<[WriteV]>{
+    Sched<[WriteVq]>{
   bits<5> Rd;
   bits<5> Rn;
   let Inst{31-16} = 0b0101111000101000;
   let Inst{15-12} = opc;
   let Inst{11-10} = 0b10;
   let Inst{9-5}   = Rn;
   let Inst{4-0}   = Rd;
 }
 
 class SHATiedInstVV<bits<4> opc, string asm, Intrinsic OpNode>
   : SHA2OpInst<opc, asm, ".4s", "$Rd = $dst", (outs V128:$dst),
                (ins V128:$Rd, V128:$Rn),
                [(set (v4i32 V128:$dst),
                      (OpNode (v4i32 V128:$Rd), (v4i32 V128:$Rn)))]>;
 
 class SHAInstSS<bits<4> opc, string asm, Intrinsic OpNode>
   : SHA2OpInst<opc, asm, "", "", (outs FPR32:$Rd), (ins FPR32:$Rn),
                [(set (i32 FPR32:$Rd), (OpNode (i32 FPR32:$Rn)))]>;
 
 // Armv8.2-A Crypto extensions
 class BaseCryptoV82<dag oops, dag iops, string asm, string asmops, string cst,
                     list<dag> pattern>
-  : I <oops, iops, asm, asmops, cst, pattern>, Sched<[WriteV]> {
+  : I <oops, iops, asm, asmops, cst, pattern>, Sched<[WriteVq]> {
   bits<5> Vd;
   bits<5> Vn;
   let Inst{31-25} = 0b1100111;
   let Inst{9-5}   = Vn;
   let Inst{4-0}   = Vd;
 }
 
 class CryptoRRTied<bits<1>op0, bits<2>op1, string asm, string asmops>

llvm/lib/Target/AArch64/AArch64InstrInfo.td

 def AESMCrr  : AESInst<    0b0110, "aesmc",  int_aarch64_crypto_aesmc>;
 def AESIMCrr : AESInst<    0b0111, "aesimc", int_aarch64_crypto_aesimc>;
 }
 
 // Pseudo instructions for AESMCrr/AESIMCrr with a register constraint required
 // for AES fusion on some CPUs.
 let hasSideEffects = 0, mayStore = 0, mayLoad = 0 in {
 def AESMCrrTied: Pseudo<(outs V128:$Rd), (ins V128:$Rn), [], "$Rn = $Rd">,
-                        Sched<[WriteV]>;
+                        Sched<[WriteVq]>;
 def AESIMCrrTied: Pseudo<(outs V128:$Rd), (ins V128:$Rn), [], "$Rn = $Rd">,
-                         Sched<[WriteV]>;
+                         Sched<[WriteVq]>;
 }
 
 // Only use constrained versions of AES(I)MC instructions if they are paired with
 // AESE/AESD.
 def : Pat<(v16i8 (int_aarch64_crypto_aesmc
             (v16i8 (int_aarch64_crypto_aese (v16i8 V128:$src1),
                                             (v16i8 V128:$src2))))),
           (v16i8 (AESMCrrTied (v16i8 (AESErr (v16i8 V128:$src1),

llvm/lib/Target/AArch64/AArch64SchedA53.td

 def : WriteRes<WriteHint, [A53UnitB]>;
 
 // FP ALU
 def : WriteRes<WriteF, [A53UnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFCmp, [A53UnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFCvt, [A53UnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFCopy, [A53UnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFImm, [A53UnitFPALU]> { let Latency = 6; }
-def : WriteRes<WriteV, [A53UnitFPALU]> { let Latency = 6; }
+def : WriteRes<WriteVd, [A53UnitFPALU]> { let Latency = 6; }
+def : WriteRes<WriteVq, [A53UnitFPALU]> { let Latency = 6; }
 
 // FP Mul, Div, Sqrt
 def : WriteRes<WriteFMul, [A53UnitFPMDS]> { let Latency = 6; }
 def : WriteRes<WriteFDiv, [A53UnitFPMDS]> { let Latency = 33;
                                             let ResourceCycles = [29]; }
 def A53WriteFMAC : SchedWriteRes<[A53UnitFPMDS]> { let Latency = 10; }
 def A53WriteFDivSP : SchedWriteRes<[A53UnitFPMDS]> { let Latency = 18;
                                                      let ResourceCycles = [14]; }

llvm/lib/Target/AArch64/AArch64SchedA55.td

 // FP ALU
 //   As WriteF result is produced in F5 and it can be mostly forwarded
 //   to consumer at F1, the effectively latency is set as 4.
 def : WriteRes<WriteF, [CortexA55UnitFPALU]> { let Latency = 4; }
 def : WriteRes<WriteFCmp, [CortexA55UnitFPALU]> { let Latency = 3; }
 def : WriteRes<WriteFCvt, [CortexA55UnitFPALU]> { let Latency = 4; }
 def : WriteRes<WriteFCopy, [CortexA55UnitFPALU]> { let Latency = 3; }
 def : WriteRes<WriteFImm, [CortexA55UnitFPALU]> { let Latency = 3; }
-def : WriteRes<WriteV, [CortexA55UnitFPALU]> { let Latency = 4; }
+def : WriteRes<WriteVd, [CortexA55UnitFPALU]> { let Latency = 4; }
+def : WriteRes<WriteVq, [CortexA55UnitFPALU,CortexA55UnitFPALU]> { let Latency = 4; let BeginGroup = 1; }
 
 // FP ALU specific new schedwrite definitions
+def CortexA55WriteFPALU_F2 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 2;}
 def CortexA55WriteFPALU_F3 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 3;}
 def CortexA55WriteFPALU_F4 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 4;}
 def CortexA55WriteFPALU_F5 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 5;}
 
 // FP Mul, Div, Sqrt. Div/Sqrt are not pipelined
 def : WriteRes<WriteFMul, [CortexA55UnitFPMAC]> { let Latency = 4; }
 
 let RetireOOO = 1 in {

 def : InstRW<[CortexA55WriteVST2], (instregex "ST4i(8|16|32|64)$")>;
 def : InstRW<[CortexA55WriteVST4], (instregex "ST4Fourv(8b|4h|2s|1d|16b|8h|4s|2d)$")>;
 def : InstRW<[CortexA55WriteVST2, WriteAdr], (instregex "ST4i(8|16|32|64)_POST$")>;
 def : InstRW<[CortexA55WriteVST4, WriteAdr], (instregex "ST4Fourv(8b|4h|2s|1d|16b|8h|4s|2d)_POST$")>;
 
 //---
 // Floating Point Conversions, MAC, DIV, SQRT
 //---
+def : InstRW<[CortexA55WriteFPALU_F2], (instregex "^DUP(v2i64|v4i32|v8i16|v16i8)")>;
+def : InstRW<[CortexA55WriteFPALU_F2], (instregex "^XTN")>;
 def : InstRW<[CortexA55WriteFPALU_F3], (instregex "^FCVT[ALMNPZ][SU](S|U)?(W|X)")>;
 def : InstRW<[CortexA55WriteFPALU_F4], (instregex "^FCVT(X)?[ALMNPXZ](S|U|N)?v")>;
 
 def : InstRW<[CortexA55WriteFPALU_F4], (instregex "^(S|U)CVTF(S|U)(W|X)(H|S|D)")>;
 def : InstRW<[CortexA55WriteFPALU_F4], (instregex "^(S|U)CVTF(h|s|d)")>;
 def : InstRW<[CortexA55WriteFPALU_F4], (instregex "^(S|U)CVTFv")>;
 
 def : InstRW<[CortexA55WriteFMAC], (instregex "^FN?M(ADD|SUB).*")>;

llvm/lib/Target/AArch64/AArch64SchedA57.td

 def : SchedAlias<WriteSTIdx, A57Write_1cyc_1I_1S>;
 def : SchedAlias<WriteF,     A57Write_3cyc_1V>;
 def : SchedAlias<WriteFCmp,  A57Write_3cyc_1V>;
 def : SchedAlias<WriteFCvt,  A57Write_5cyc_1V>;
 def : SchedAlias<WriteFCopy, A57Write_5cyc_1L>;
 def : SchedAlias<WriteFImm,  A57Write_3cyc_1V>;
 def : WriteRes<WriteFMul, [A57UnitV]> { let Latency = 5;}
 def : SchedAlias<WriteFDiv,  A57Write_17cyc_1W>;
-def : SchedAlias<WriteV,     A57Write_3cyc_1V>;
+def : SchedAlias<WriteVd,    A57Write_3cyc_1V>;
+def : SchedAlias<WriteVq,    A57Write_3cyc_1V>;
 def : SchedAlias<WriteVLD,   A57Write_5cyc_1L>;
 def : SchedAlias<WriteVST,   A57Write_1cyc_1S>;
 
 def : WriteRes<WriteAtomic,  []> { let Unsupported = 1; }
 
 def : WriteRes<WriteSys,     []> { let Latency = 1; }
 def : WriteRes<WriteBarrier, []> { let Latency = 1; }
 def : WriteRes<WriteHint,    []> { let Latency = 1; }

llvm/lib/Target/AArch64/AArch64SchedA64FX.td

 // ASIMD shift by immed, basic
 // ASIMD shift by immed and insert, basic, D-form
 // ASIMD shift by immed and insert, basic, Q-form
 // ASIMD shift by immed, complex
 // ASIMD shift by register, basic, D-form
 // ASIMD shift by register, basic, Q-form
 // ASIMD shift by register, complex, D-form
 // ASIMD shift by register, complex, Q-form
-def : WriteRes<WriteV, [A64FXGI03]> {
+def : WriteRes<WriteVd, [A64FXGI03]> {
+  let Latency = 4;
+  let ResourceCycles = [1];
+}
+def : WriteRes<WriteVq, [A64FXGI03]> {
   let Latency = 4;
   let ResourceCycles = [1];
 }
 
 // ASIMD arith, reduce, 4H/4S
 // ASIMD arith, reduce, 8B/8H
 // ASIMD arith, reduce, 16B
 

llvm/lib/Target/AArch64/AArch64SchedCyclone.td

 // System instructions get an invalid latency because the latency of
 // other operations across them is meaningless.
 def : WriteRes<WriteSys, []> {let Latency = -1;}
 
 //===----------------------------------------------------------------------===//
 // 7.9 Vector Unit Instructions
 
 // Simple vector operations take 2 cycles.
-def : WriteRes<WriteV, [CyUnitV]> {let Latency = 2;}
+def : WriteRes<WriteVd, [CyUnitV]> {let Latency = 2;}
+def : WriteRes<WriteVq, [CyUnitV]> {let Latency = 2;}
 
 // Define some longer latency vector op types for Cyclone.
 def CyWriteV3 : SchedWriteRes<[CyUnitV]> {let Latency = 3;}
 def CyWriteV4 : SchedWriteRes<[CyUnitV]> {let Latency = 4;}
 def CyWriteV5 : SchedWriteRes<[CyUnitV]> {let Latency = 5;}
 def CyWriteV6 : SchedWriteRes<[CyUnitV]> {let Latency = 6;}
 
 // Simple floating-point operations take 2 cycles.

 // MOVI,MVNI are WriteV
 // FMOVv2f32ns,FMOVv2f64ns,FMOVv4f32ns are WriteV
 
 // Move FPR is a register rename and single nop micro-op.
 // ORR.16b Vd,Vn,Vn
 // COPY is handled above in the WriteMov Variant.
 def WriteVMov    : SchedWriteVariant<[
                      SchedVar<WriteVMovPred, [WriteX]>,
-                     SchedVar<NoSchedPred,   [WriteV]>]>;
+                     SchedVar<NoSchedPred,   [WriteVq]>]>;
 def : InstRW<[WriteVMov], (instrs ORRv16i8)>;
 
 // FMOVSr,FMOVDr are WriteF.
 
 // MOV V,V is a WriteV.
 
 // CPY D,V[x] is a WriteV
 
 // INS V[x],V[y] is a WriteV.
 
 // FMOVWSr,FMOVXDr,FMOVXDHighr
 def : WriteRes<WriteFCopy, [CyUnitLS]> {
   let Latency = 5;
 }
 
 // FMOVSWr,FMOVDXr
 def : InstRW<[WriteLD], (instrs FMOVSWr,FMOVDXr,FMOVDXHighr)>;
 
 // INS V[x],R
-def CyWriteCopyToFPR : WriteSequence<[WriteVLD, WriteV]>;
+def CyWriteCopyToFPR : WriteSequence<[WriteVLD, WriteVq]>;
 def : InstRW<[CyWriteCopyToFPR], (instregex "INSv")>;
 
 // SMOV,UMOV R,V[x]
 def CyWriteCopyToGPR : WriteSequence<[WriteLD, WriteI]>;
 def : InstRW<[CyWriteCopyToGPR], (instregex "SMOVv","UMOVv")>;
 
 // DUP V,R
 def : InstRW<[CyWriteCopyToFPR], (instregex "DUPv")>;

 def : InstRW<[WriteFRECPS],  (instregex "FRECPSv")>;
 def : InstRW<[WriteFRSQRTS], (instregex "FRSQRTSv")>;
 
 //---
 // 7.9.7 Integer-FP Conversions
 //---
 
 // FCVT lengthen f16/s32
-def : InstRW<[WriteV], (instrs FCVTSHr,FCVTDHr,FCVTDSr)>;
+def : InstRW<[WriteVq], (instrs FCVTSHr,FCVTDHr,FCVTDSr)>;
 
 // FCVT,FCVTN,FCVTXN
 // SCVTF,UCVTF V,V
 // FRINT(AIMNPXZ) V,V
 def : WriteRes<WriteFCvt, [CyUnitV]> {let Latency = 4;}
 
 // SCVT/UCVT S/D, Rd = VLD5+V4: 9 cycles.
 def CyWriteCvtToFPR : WriteSequence<[WriteVLD, CyWriteV4]>;

 def : InstRW<[WriteVLDShuffle, ReadVLD],          (instrs LD1i64)>;
 def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr],(instrs LD1i64_POST)>;
 
 def : InstRW<[WriteVLDShuffle],
              (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>;
 def : InstRW<[WriteVLDShuffle, WriteAdr],
              (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST$")>;
 
-def : InstRW<[WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVq],
              (instregex "LD2Twov(8b|4h|2s)$")>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq],
              (instregex "LD2Twov(8b|4h|2s)_POST$")>;
 def : InstRW<[WriteVLDShuffle, WriteVLDShuffle],
              (instregex "LD2Twov(16b|8h|4s|2d)$")>;
 def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle],
              (instregex "LD2Twov(16b|8h|4s|2d)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq],
              (instregex "LD2i(8|16|32)$")>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq],
              (instregex "LD2i(8|16|32)_POST")>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq],
              (instregex "LD2i64$")>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq],
              (instregex "LD2i64_POST")>;
 
-def : InstRW<[WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVq],
              (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq],
              (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq],
              (instregex "LD3Threev(8b|4h|2s)$")>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq],
              (instregex "LD3Threev(8b|4h|2s)_POST")>;
 def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVLDShuffle],
              (instregex "LD3Threev(16b|8h|4s|2d)$")>;
 def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVLDShuffle],
              (instregex "LD3Threev(16b|8h|4s|2d)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq, WriteVq],
              (instregex "LD3i(8|16|32)$")>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq, WriteVq],
              (instregex "LD3i(8|16|32)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteVq],
              (instregex "LD3i64$")>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteVq],
              (instregex "LD3i64_POST")>;
 
-def : InstRW<[WriteVLDShuffle, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVq, WriteVq],
              (instregex "LD3Rv(8b|4h|2s|16b|8h|4s)$")>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq, WriteVq],
              (instregex "LD3Rv(8b|4h|2s|16b|8h|4s)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq],
              (instrs LD3Rv1d,LD3Rv2d)>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq],
              (instrs LD3Rv1d_POST,LD3Rv2d_POST)>;
 
-def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq, WriteVq],
              (instregex "LD4Fourv(8b|4h|2s)$")>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq, WriteVq],
              (instregex "LD4Fourv(8b|4h|2s)_POST")>;
 def : InstRW<[WriteVLDPairShuffle, WriteVLDPairShuffle,
               WriteVLDPairShuffle, WriteVLDPairShuffle],
              (instregex "LD4Fourv(16b|8h|4s|2d)$")>;
 def : InstRW<[WriteVLDPairShuffle, WriteAdr, WriteVLDPairShuffle,
               WriteVLDPairShuffle, WriteVLDPairShuffle],
              (instregex "LD4Fourv(16b|8h|4s|2d)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq, WriteVq, WriteVq],
              (instregex "LD4i(8|16|32)$")>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq, WriteVq, WriteVq],
              (instregex "LD4i(8|16|32)_POST")>;
 
 
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteVq, WriteVq],
              (instrs LD4i64)>;
-def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteV],
+def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteVq],
              (instrs LD4i64_POST)>;
 
-def : InstRW<[WriteVLDShuffle, WriteV, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVq, WriteVq, WriteVq],
              (instregex "LD4Rv(8b|4h|2s|16b|8h|4s)$")>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq, WriteVq, WriteVq],
              (instregex "LD4Rv(8b|4h|2s|16b|8h|4s)_POST")>;
 
-def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq, WriteVq],
              (instrs LD4Rv1d,LD4Rv2d)>;
-def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV, WriteV],
+def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq, WriteVq],
              (instrs LD4Rv1d_POST,LD4Rv2d_POST)>;
 
 //---
 // 7.9.16 Store, element operations
 //---
 
 // Only the WriteAdr for writeback matches a def operands.
 // Subsequent WriteVLDs only consume resources.

llvm/lib/Target/AArch64/AArch64SchedExynosM3.td

 def : SchedAlias<WriteVLD, M3WriteL5>;
 
 // FP store instructions.
 def : WriteRes<WriteVST, [M3UnitS,
                           M3UnitFST]> { let Latency = 1;
                                         let NumMicroOps = 1; }
 
 // ASIMD FP instructions.
-def : WriteRes<WriteV, [M3UnitNALU]> { let Latency = 3; }
+def : WriteRes<WriteVd, [M3UnitNALU]> { let Latency = 3; }
+def : WriteRes<WriteVq, [M3UnitNALU]> { let Latency = 3; }
 
 // Other miscellaneous instructions.
 def : WriteRes<WriteAtomic,  []> { let Unsupported = 1; }
 def : WriteRes<WriteBarrier, []> { let Latency = 1; }
 def : WriteRes<WriteHint,    []> { let Latency = 1; }
 def : WriteRes<WriteSys,     []> { let Latency = 1; }
 
 //===----------------------------------------------------------------------===//

llvm/lib/Target/AArch64/AArch64SchedExynosM4.td

 
 // FP load instructions.
 def : SchedAlias<WriteVLD, M4WriteL5>;
 
 // FP store instructions.
 def : SchedAlias<WriteVST, M4WriteVST1>;
 
 // ASIMD FP instructions.
-def : SchedAlias<WriteV, M4WriteNALU1>;
+def : SchedAlias<WriteVd, M4WriteNALU1>;
+def : SchedAlias<WriteVq, M4WriteNALU1>;
 
 // Other miscellaneous instructions.
 def : WriteRes<WriteAtomic,  []> { let Unsupported = 1; }
 def : WriteRes<WriteBarrier, []> { let Latency = 1; }
 def : WriteRes<WriteHint,    []> { let Latency = 1; }
 def : WriteRes<WriteSys,     []> { let Latency = 1; }
 
 //===----------------------------------------------------------------------===//

llvm/lib/Target/AArch64/AArch64SchedExynosM5.td

 
 // FP load instructions.
 def : SchedAlias<WriteVLD, M5WriteL6>;
 
 // FP store instructions.
 def : SchedAlias<WriteVST, M5WriteVST1>;
 
 // ASIMD FP instructions.
-def : SchedAlias<WriteV, M5WriteNALU1>;
+def : SchedAlias<WriteVd, M5WriteNALU1>;
+def : SchedAlias<WriteVq, M5WriteNALU1>;
 
 // Other miscellaneous instructions.
 def : WriteRes<WriteBarrier, []> { let Latency = 1; }
 def : WriteRes<WriteHint,    []> { let Latency = 1; }
 def : WriteRes<WriteSys,     []> { let Latency = 1; }
 
 //===----------------------------------------------------------------------===//
 // Generic fast forwarding.

llvm/lib/Target/AArch64/AArch64SchedFalkor.td

 def : WriteRes<WriteSTIdx, []>   { let Unsupported = 1; }
 def : WriteRes<WriteF, []>       { let Unsupported = 1; }
 def : WriteRes<WriteFCmp, []>    { let Unsupported = 1; }
 def : WriteRes<WriteFCvt, []>    { let Unsupported = 1; }
 def : WriteRes<WriteFCopy, []>   { let Unsupported = 1; }
 def : WriteRes<WriteFImm, []>    { let Unsupported = 1; }
 def : WriteRes<WriteFMul, []>    { let Unsupported = 1; }
 def : WriteRes<WriteFDiv, []>    { let Unsupported = 1; }
-def : WriteRes<WriteV, []>       { let Unsupported = 1; }
+def : WriteRes<WriteVd, []>      { let Unsupported = 1; }
+def : WriteRes<WriteVq, []>      { let Unsupported = 1; }
 def : WriteRes<WriteVLD, []>     { let Unsupported = 1; }
 def : WriteRes<WriteVST, []>     { let Unsupported = 1; }
 def : WriteRes<WriteSys, []>     { let Unsupported = 1; }
 def : WriteRes<WriteBarrier, []> { let Unsupported = 1; }
 def : WriteRes<WriteHint, []>    { let Unsupported = 1; }
 def : WriteRes<WriteLDHi, []>    { let Unsupported = 1; }
 def : WriteRes<WriteAtomic, []>  { let Unsupported = 1; }
 

llvm/lib/Target/AArch64/AArch64SchedKryo.td

 def : WriteRes<WriteFCmp,  [KryoUnitXY]> { let Latency = 2; }
 def : WriteRes<WriteFCvt,  [KryoUnitX]> { let Latency = 4; }
 def : WriteRes<WriteFCopy, [KryoUnitXY]> { let Latency = 6; }
 def : WriteRes<WriteFImm,  [KryoUnitXY]> { let Latency = 6; }
 def : WriteRes<WriteFMul,  [KryoUnitX, KryoUnitX]>
       { let Latency = 6; let NumMicroOps = 2; }
 def : WriteRes<WriteFDiv,  [KryoUnitXA, KryoUnitY]>
       { let Latency = 12; let NumMicroOps = 2; } // Fragent -1 / NoRSV +1
-def : WriteRes<WriteV,     [KryoUnitXY]> { let Latency = 6; }
+def : WriteRes<WriteVd,    [KryoUnitXY]> { let Latency = 6; }
+def : WriteRes<WriteVq,    [KryoUnitXY]> { let Latency = 6; }
 def : WriteRes<WriteVLD,   [KryoUnitLS]> { let Latency = 4; }
 def : WriteRes<WriteVST,   [KryoUnitLS]> { let Latency = 4; }
 
 def : WriteRes<WriteSys,     []> { let Latency = 1; }
 def : WriteRes<WriteBarrier, []> { let Latency = 1; }
 def : WriteRes<WriteHint,    []> { let Latency = 1; }
 
 def : WriteRes<WriteLDHi,    []> { let Latency = 4; }

llvm/lib/Target/AArch64/AArch64SchedTSV110.td

 def : WriteRes<WriteFCvt,  [TSV110UnitF]> { let Latency = 3; } 
 def : WriteRes<WriteFCopy, [TSV110UnitF]> { let Latency = 2; }
 def : WriteRes<WriteFImm,  [TSV110UnitF]> { let Latency = 2; } 
 def : WriteRes<WriteFMul,  [TSV110UnitF]> { let Latency = 5; }
 
 // FP Div, Sqrt
 def : WriteRes<WriteFDiv,  [TSV110UnitFSU1]> { let Latency = 18; } 
 
-def : WriteRes<WriteV,     [TSV110UnitF]>     { let Latency = 4; }
+def : WriteRes<WriteVd,    [TSV110UnitF]>     { let Latency = 4; }
+def : WriteRes<WriteVq,    [TSV110UnitF]>     { let Latency = 4; }
 def : WriteRes<WriteVLD,   [TSV110UnitFLdSt]> { let Latency = 5; }
 def : WriteRes<WriteVST,   [TSV110UnitF]>     { let Latency = 1; }
 
 // Branch
 def : WriteRes<WriteBr,    [TSV110UnitAB]> { let Latency = 1; }
 def : WriteRes<WriteBrReg, [TSV110UnitAB]> { let Latency = 1; }
 def : WriteRes<WriteSys,     []> { let Latency = 1; }
 def : WriteRes<WriteBarrier, []> { let Latency = 1; }

llvm/lib/Target/AArch64/AArch64SchedThunderX.td

 def : WriteRes<WriteHint, [THXT8XUnitBr]>;
 
 // FP ALU
 def : WriteRes<WriteF, [THXT8XUnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFCmp, [THXT8XUnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFCvt, [THXT8XUnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFCopy, [THXT8XUnitFPALU]> { let Latency = 6; }
 def : WriteRes<WriteFImm, [THXT8XUnitFPALU]> { let Latency = 6; }
-def : WriteRes<WriteV, [THXT8XUnitFPALU]> { let Latency = 6; }
+def : WriteRes<WriteVd, [THXT8XUnitFPALU]> { let Latency = 6; }
+def : WriteRes<WriteVq, [THXT8XUnitFPALU]> { let Latency = 6; }
 
 // FP Mul, Div, Sqrt
 def : WriteRes<WriteFMul, [THXT8XUnitFPMDS]> { let Latency = 6; }
 def : WriteRes<WriteFDiv, [THXT8XUnitFPMDS]> {
   let Latency = 22;
   let ResourceCycles = [19];
 }
 

llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td

 // ASIMD shift by immed, basic
 // ASIMD shift by immed and insert, basic, D-form
 // ASIMD shift by immed and insert, basic, Q-form
 // ASIMD shift by immed, complex
 // ASIMD shift by register, basic, D-form
 // ASIMD shift by register, basic, Q-form
 // ASIMD shift by register, complex, D-form
 // ASIMD shift by register, complex, Q-form
-def : WriteRes<WriteV, [THX2T99F01]> {
+def : WriteRes<WriteVd, [THX2T99F01]> {
+  let Latency = 7;
+  let NumMicroOps = 4;
+  let ResourceCycles = [4];
+}
+def : WriteRes<WriteVq, [THX2T99F01]> {
   let Latency = 7;
   let NumMicroOps = 4;
   let ResourceCycles = [4];
 }
 
 // ASIMD arith, reduce, 4H/4S
 // ASIMD arith, reduce, 8B/8H
 // ASIMD arith, reduce, 16B

llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td

 // ASIMD shift by immed, basic
 // ASIMD shift by immed and insert, basic, D-form
 // ASIMD shift by immed and insert, basic, Q-form
 // ASIMD shift by immed, complex
 // ASIMD shift by register, basic, D-form
 // ASIMD shift by register, basic, Q-form
 // ASIMD shift by register, complex, D-form
 // ASIMD shift by register, complex, Q-form
-def : WriteRes<WriteV, [THX3T110FP0123]> {
+def : WriteRes<WriteVd, [THX3T110FP0123]> {
+  let Latency = 5;
+  let NumMicroOps = 4;
+  let ResourceCycles = [4];
+}
+def : WriteRes<WriteVq, [THX3T110FP0123]> {
   let Latency = 5;
   let NumMicroOps = 4;
   let ResourceCycles = [4];
 }
 
 // ASIMD arith, reduce, 4H/4S
 // ASIMD arith, reduce, 8B/8H
 // ASIMD arith, reduce, 16B

llvm/lib/Target/AArch64/AArch64Schedule.td

 def WriteF       : SchedWrite; // General floating-point ops.
 def WriteFCmp    : SchedWrite; // Floating-point compare.
 def WriteFCvt    : SchedWrite; // Float conversion.
 def WriteFCopy   : SchedWrite; // Float-int register copy.
 def WriteFImm    : SchedWrite; // Floating-point immediate.
 def WriteFMul    : SchedWrite; // Floating-point multiply.
 def WriteFDiv    : SchedWrite; // Floating-point division.
 
-def WriteV   : SchedWrite; // Vector ops.
+def WriteVd  : SchedWrite; // 64bit Vector D ops.
+def WriteVq  : SchedWrite; // 128bit Vector Q ops.
 def WriteVLD : SchedWrite; // Vector loads.
 def WriteVST : SchedWrite; // Vector stores.
 
 def WriteAtomic : SchedWrite; // Atomic memory operations (CAS, Swap, LDOP)
 
 // Read the unwritten lanes of the VLD's destination registers.
 def ReadVLD : SchedRead;
 
 // Sequential vector load and shuffle.
-def WriteVLDShuffle     : WriteSequence<[WriteVLD, WriteV]>;
-def WriteVLDPairShuffle : WriteSequence<[WriteVLD, WriteV, WriteV]>;
+def WriteVLDShuffle     : WriteSequence<[WriteVLD, WriteVq]>;
+def WriteVLDPairShuffle : WriteSequence<[WriteVLD, WriteVq, WriteVq]>;
 
 // Store a shuffled vector.
-def WriteVSTShuffle : WriteSequence<[WriteV, WriteVST]>;
-def WriteVSTPairShuffle : WriteSequence<[WriteV, WriteV, WriteVST]>;
+def WriteVSTShuffle : WriteSequence<[WriteVq, WriteVST]>;
+def WriteVSTPairShuffle : WriteSequence<[WriteVq, WriteVq, WriteVST]>;

llvm/test/tools/llvm-mca/AArch64/Cortex/A55-neon-instructions.s

 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      4     0.50                        abs d29, d24
-# CHECK-NEXT:  1      4     0.50                        abs v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        abs v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        abs v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        abs v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        abs v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        abs v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        abs v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        abs v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        abs v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        abs v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        abs v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        add d17, d31, d29
 # CHECK-NEXT:  1      4     0.50                        add v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        addhn v0.2s, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        addhn v0.4h, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        addhn v0.8b, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        addhn2  v0.16b, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        addhn2  v0.4s, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        addhn2  v0.8h, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        addp  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        addhn2  v0.16b, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        addhn2  v0.4s, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        addhn2  v0.8h, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        addp  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        addp  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        and v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        bic v0.4h, #15, lsl #8
 # CHECK-NEXT:  1      4     0.50                        bic v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        bif v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        bit v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        bsl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        cls v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        cls v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        cls v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        cls v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        cls v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        cls v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        cls v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        cls v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        clz v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        cls v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        clz v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        clz v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        clz v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        clz v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        clz v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        clz v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        clz v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        clz v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        cmeq  d20, d21, #0
 # CHECK-NEXT:  1      4     0.50                        cmeq  d20, d21, d22
-# CHECK-NEXT:  1      4     0.50                        cmeq  v0.16b, v0.16b, #0
-# CHECK-NEXT:  1      4     0.50                        cmeq  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        cmeq  v0.16b, v0.16b, #0
+# CHECK-NEXT:  1      4     1.00                        cmeq  v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        cmge  d20, d21, #0
 # CHECK-NEXT:  1      4     0.50                        cmge  d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        cmge  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        cmge  v0.8b, v0.8b, #0
 # CHECK-NEXT:  1      4     0.50                        cmgt  d20, d21, #0
 # CHECK-NEXT:  1      4     0.50                        cmgt  d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        cmgt  v0.2s, v0.2s, #0
-# CHECK-NEXT:  1      4     0.50                        cmgt  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        cmgt  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        cmhi  d20, d21, d22
-# CHECK-NEXT:  1      4     0.50                        cmhi  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        cmhi  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        cmhs  d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        cmhs  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        cmle  d20, d21, #0
-# CHECK-NEXT:  1      4     0.50                        cmle  v0.2d, v0.2d, #0
+# CHECK-NEXT:  1      4     1.00                        cmle  v0.2d, v0.2d, #0
 # CHECK-NEXT:  1      4     0.50                        cmlt  d20, d21, #0
-# CHECK-NEXT:  1      4     0.50                        cmlt  v0.8h, v0.8h, #0
+# CHECK-NEXT:  1      4     1.00                        cmlt  v0.8h, v0.8h, #0
 # CHECK-NEXT:  1      4     0.50                        cmtst d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        cmtst v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        cnt v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        cnt v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        cnt v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        dup v0.16b, w28
-# CHECK-NEXT:  1      4     0.50                        dup v0.2d, x28
+# CHECK-NEXT:  1      2     0.50                        dup v0.16b, w28
+# CHECK-NEXT:  1      2     0.50                        dup v0.2d, x28
 # CHECK-NEXT:  1      4     0.50                        dup v0.2s, w28
 # CHECK-NEXT:  1      4     0.50                        dup v0.4h, w28
-# CHECK-NEXT:  1      4     0.50                        dup v0.4s, w28
+# CHECK-NEXT:  1      2     0.50                        dup v0.4s, w28
 # CHECK-NEXT:  1      4     0.50                        dup v0.8b, w28
-# CHECK-NEXT:  1      4     0.50                        dup v0.8h, w28
-# CHECK-NEXT:  1      4     0.50                        eor v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      2     0.50                        dup v0.8h, w28
+# CHECK-NEXT:  1      4     1.00                        eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        ext v0.16b, v0.16b, v0.16b, #3
 # CHECK-NEXT:  1      4     0.50                        ext v0.8b, v0.8b, v0.8b, #3
 # CHECK-NEXT:  1      4     0.50                        fabd  d29, d24, d20
 # CHECK-NEXT:  1      4     0.50                        fabd  s29, s24, s20
-# CHECK-NEXT:  1      4     0.50                        fabd  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fabs  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fabd  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fabs  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fabs  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fabs  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        fabs  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fabs  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        fabs  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fabs  v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        facge d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        facge s10, s11, s12
-# CHECK-NEXT:  1      4     0.50                        facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        facge v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        facgt d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        facgt s10, s11, s12
-# CHECK-NEXT:  1      4     0.50                        facgt v0.2d, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        fadd  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fadd  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        faddp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        faddp v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        fcmeq d20, d21, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmeq d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        fcmeq s10, s11, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmeq s10, s11, s12
 # CHECK-NEXT:  1      4     0.50                        fcmeq v0.2s, v0.2s, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmeq v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fcmge d20, d21, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmge d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        fcmge s10, s11, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmge s10, s11, s12
-# CHECK-NEXT:  1      4     0.50                        fcmge v0.2d, v0.2d, #0.0
-# CHECK-NEXT:  1      4     0.50                        fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT:  1      4     1.00                        fcmge v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        fcmgt d20, d21, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmgt d20, d21, d22
 # CHECK-NEXT:  1      4     0.50                        fcmgt s10, s11, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmgt s10, s11, s12
-# CHECK-NEXT:  1      4     0.50                        fcmgt v0.4s, v0.4s, #0.0
-# CHECK-NEXT:  1      4     0.50                        fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT:  1      4     1.00                        fcmgt v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        fcmle d20, d21, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmle s10, s11, #0.0
-# CHECK-NEXT:  1      4     0.50                        fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT:  1      4     1.00                        fcmle v0.2d, v0.2d, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmlt d20, d21, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcmlt s10, s11, #0.0
-# CHECK-NEXT:  1      4     0.50                        fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT:  1      4     1.00                        fcmlt v0.4s, v0.4s, #0.0
 # CHECK-NEXT:  1      4     0.50                        fcvtas  d21, d14
 # CHECK-NEXT:  1      4     0.50                        fcvtas  s12, s13
 # CHECK-NEXT:  1      4     0.50                        fcvtas  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fcvtas  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fcvtas  v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        fcvtas  v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        fcvtas  v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        fcvtau  d21, d14

 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        fcvtzu  v0.8h, v0.8h
 # CHECK-NEXT:  1      13    10.00                       fdiv  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmax  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmax  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fmax  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmax  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fmaxnm  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmax  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fmaxnm  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fmaxnm  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmaxnm  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fmaxnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmaxnm  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fmaxnmp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fmaxnmp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmaxnmp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fmaxp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmaxnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fmaxp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fmaxp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmaxp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fmin  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fmin  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fmin  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmin  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fminnm  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmin  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fminnm  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fminnm  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fminnm  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fminnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fminnm  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fminnmp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fminnmp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fminnmp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fminp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fminnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fminp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fminp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fminp v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        fmla  d0, d1, v0.d[1]
 # CHECK-NEXT:  1      4     0.50                        fmla  s0, s1, v0.s[3]
 # CHECK-NEXT:  1      4     0.50                        fmla  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fmls  d0, d4, v0.d[1]
 # CHECK-NEXT:  1      4     0.50                        fmls  s3, s5, v0.s[3]
 # CHECK-NEXT:  1      4     0.50                        fmls  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmov  v0.2d, #-1.25000000
+# CHECK-NEXT:  1      4     1.00                        fmov  v0.2d, #-1.25000000
 # CHECK-NEXT:  1      4     0.50                        fmov  v0.2s, #13.00000000
-# CHECK-NEXT:  1      4     0.50                        fmov  v0.4s, #1.00000000
+# CHECK-NEXT:  1      4     1.00                        fmov  v0.4s, #1.00000000
 # CHECK-NEXT:  1      4     0.50                        fmul  d0, d1, v0.d[1]
 # CHECK-NEXT:  1      4     0.50                        fmul  s0, s1, v0.s[3]
 # CHECK-NEXT:  1      4     0.50                        fmul  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fmulx d0, d4, v0.d[1]
 # CHECK-NEXT:  1      4     0.50                        fmulx d23, d11, d1
 # CHECK-NEXT:  1      4     0.50                        fmulx s20, s22, s15
 # CHECK-NEXT:  1      4     0.50                        fmulx s3, s5, v0.s[3]
-# CHECK-NEXT:  1      4     0.50                        fmulx v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmulx v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fmulx v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        fmulx v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fneg  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        fmulx v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fneg  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        fneg  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        fneg  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        fneg  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        fneg  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        fneg  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        fneg  v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        frecpe  d13, d13
 # CHECK-NEXT:  1      4     0.50                        frecpe  s19, s14
-# CHECK-NEXT:  1      4     0.50                        frecpe  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frecpe  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frecpe  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frecpe  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frecpe  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frecpe  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frecps  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frecpe  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frecpe  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frecps  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        frecps  d22, d30, d21
 # CHECK-NEXT:  1      4     0.50                        frecps  s21, s16, s13
 # CHECK-NEXT:  1      4     0.50                        frecpx  d16, d19
 # CHECK-NEXT:  1      4     0.50                        frecpx  s18, s10
-# CHECK-NEXT:  1      4     0.50                        frinta  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frinta  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frinta  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frinta  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frinta  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frinta  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frinti  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frinta  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frinta  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frinti  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frinti  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frinti  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frinti  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frinti  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frintm  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frinti  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frinti  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frintm  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frintm  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frintm  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frintm  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frintm  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frintn  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frintm  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frintm  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frintn  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frintn  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frintn  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frintn  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frintn  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frintp  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frintn  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frintn  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frintp  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frintp  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frintp  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frintp  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frintp  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frintx  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frintp  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frintp  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frintx  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frintx  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frintx  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frintx  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frintx  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        frintz  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        frintx  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frintx  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frintz  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        frintz  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        frintz  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        frintz  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        frintz  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        frintz  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        frintz  v0.8h, v0.8h
 # CHECK-NEXT:  1      22    19.00                       frsqrte d21, d12
 # CHECK-NEXT:  1      12    9.00                        frsqrte s22, s13
 # CHECK-NEXT:  1      22    19.00                       frsqrte v0.2d, v0.2d
 # CHECK-NEXT:  1      12    9.00                        frsqrte v0.2s, v0.2s
 # CHECK-NEXT:  1      8     5.00                        frsqrte v0.4h, v0.4h
 # CHECK-NEXT:  1      12    9.00                        frsqrte v0.4s, v0.4s
 # CHECK-NEXT:  1      8     5.00                        frsqrte v0.8h, v0.8h
 # CHECK-NEXT:  1      22    19.00                       frsqrts d8, d22, d18

 # CHECK-NEXT:  1      5     2.00    *                   ld4r  { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
 # CHECK-NEXT:  2      5     2.00    *                   ld4r  { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
 # CHECK-NEXT:  1      4     0.50                        mla v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        mls v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        mov b0, v0.b[15]
 # CHECK-NEXT:  1      4     0.50                        mov d6, v0.d[1]
 # CHECK-NEXT:  1      4     0.50                        mov h2, v0.h[5]
 # CHECK-NEXT:  1      4     0.50                        mov s17, v0.s[2]
-# CHECK-NEXT:  1      4     0.50                        mov v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        mov v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        mov v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        movi  d15, #0xff00ff00ff00ff
-# CHECK-NEXT:  1      4     0.50                        movi  v0.16b, #31
-# CHECK-NEXT:  1      4     0.50                        movi  v0.2d, #0xff0000ff0000ffff
+# CHECK-NEXT:  1      4     1.00                        movi  v0.16b, #31
+# CHECK-NEXT:  1      4     1.00                        movi  v0.2d, #0xff0000ff0000ffff
 # CHECK-NEXT:  1      4     0.50                        movi  v0.2s, #8, msl #8
-# CHECK-NEXT:  1      4     0.50                        movi  v0.4s, #255, lsl #24
+# CHECK-NEXT:  1      4     1.00                        movi  v0.4s, #255, lsl #24
 # CHECK-NEXT:  1      4     0.50                        movi  v0.8b, #255
 # CHECK-NEXT:  1      4     0.50                        mul v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        mvni  v0.2s, #0
-# CHECK-NEXT:  1      4     0.50                        mvni  v0.4s, #16, msl #16
+# CHECK-NEXT:  1      4     1.00                        mvni  v0.4s, #16, msl #16
 # CHECK-NEXT:  1      4     0.50                        neg d29, d24
-# CHECK-NEXT:  1      4     0.50                        neg v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        neg v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        neg v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        neg v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        neg v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        neg v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        neg v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        neg v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        neg v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        neg v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        mvn v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        neg v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        mvn v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        mvn v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        orn v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        mov v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        orr v0.8h, #31
-# CHECK-NEXT:  1      4     0.50                        pmul  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        orn v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        mov v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        orr v0.8h, #31
+# CHECK-NEXT:  1      4     1.00                        pmul  v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        pmul  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        pmull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        pmull2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        raddhn  v0.2s, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        raddhn  v0.4h, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        raddhn  v0.8b, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        raddhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        raddhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        raddhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        rbit  v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        pmull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        pmull2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        raddhn  v0.2s, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        raddhn  v0.4h, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        raddhn  v0.8b, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        raddhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        raddhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        raddhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        rbit  v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        rbit  v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        rev16 v21.8b, v1.8b
-# CHECK-NEXT:  1      4     0.50                        rev16 v30.16b, v31.16b
+# CHECK-NEXT:  1      4     1.00                        rev16 v30.16b, v31.16b
 # CHECK-NEXT:  1      4     0.50                        rev32 v0.4h, v9.4h
 # CHECK-NEXT:  1      4     0.50                        rev32 v21.8b, v1.8b
-# CHECK-NEXT:  1      4     0.50                        rev32 v30.16b, v31.16b
-# CHECK-NEXT:  1      4     0.50                        rev32 v4.8h, v7.8h
-# CHECK-NEXT:  1      4     0.50                        rev64 v0.16b, v31.16b
+# CHECK-NEXT:  1      4     1.00                        rev32 v30.16b, v31.16b
+# CHECK-NEXT:  1      4     1.00                        rev32 v4.8h, v7.8h
+# CHECK-NEXT:  1      4     1.00                        rev64 v0.16b, v31.16b
 # CHECK-NEXT:  1      4     0.50                        rev64 v1.8b, v9.8b
 # CHECK-NEXT:  1      4     0.50                        rev64 v13.4h, v21.4h
-# CHECK-NEXT:  1      4     0.50                        rev64 v2.8h, v4.8h
+# CHECK-NEXT:  1      4     1.00                        rev64 v2.8h, v4.8h
 # CHECK-NEXT:  1      4     0.50                        rev64 v4.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        rev64 v6.4s, v8.4s
+# CHECK-NEXT:  1      4     1.00                        rev64 v6.4s, v8.4s
 # CHECK-NEXT:  1      4     0.50                        rshrn v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        rshrn v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        rshrn v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        rshrn2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        rshrn2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        rshrn2  v0.8h, v0.4s, #3
-# CHECK-NEXT:  1      4     0.50                        rsubhn  v0.2s, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        rsubhn  v0.4h, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        rsubhn  v0.8b, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        rsubhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        rsubhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        rsubhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        saba  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        sabal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sabal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sabal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        sabal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sabal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sabal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        rshrn2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        rshrn2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        rshrn2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        rsubhn  v0.2s, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        rsubhn  v0.4h, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        rsubhn  v0.8b, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        rsubhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        rsubhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        rsubhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        saba  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        sabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        sabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        sabal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sabal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sabal2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        sabd  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sabdl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sabdl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sabdl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        sabdl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sabdl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sabdl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        sabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        sabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        sabdl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sabdl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sabdl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        sadalp  v0.1d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sadalp  v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sadalp  v0.2d, v0.4s
 # CHECK-NEXT:  1      4     0.50                        sadalp  v0.2s, v0.4h
 # CHECK-NEXT:  1      4     0.50                        sadalp  v0.4h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        sadalp  v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sadalp  v0.8h, v0.16b
-# CHECK-NEXT:  1      4     0.50                        saddl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        saddl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        saddl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        saddl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        saddl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        saddl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sadalp  v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sadalp  v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        saddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        saddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        saddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        saddl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        saddl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        saddl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        saddlp  v0.1d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        saddlp  v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        saddlp  v0.2d, v0.4s
 # CHECK-NEXT:  1      4     0.50                        saddlp  v0.2s, v0.4h
 # CHECK-NEXT:  1      4     0.50                        saddlp  v0.4h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        saddlp  v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        saddlp  v0.8h, v0.16b
-# CHECK-NEXT:  1      4     0.50                        saddw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        saddw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  1      4     0.50                        saddw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        saddw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  1      4     0.50                        saddw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        saddw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        saddlp  v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        saddlp  v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        saddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  1      4     1.00                        saddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  1      4     1.00                        saddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  1      4     1.00                        saddw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        saddw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        saddw2  v0.8h, v0.8h, v0.16b
 # CHECK-NEXT:  1      4     0.50                        scvtf d21, d12
 # CHECK-NEXT:  1      4     0.50                        scvtf d21, d12, #64
 # CHECK-NEXT:  1      4     0.50                        scvtf s22, s13
 # CHECK-NEXT:  1      4     0.50                        scvtf s22, s13, #32
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        scvtf v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        shadd v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        shl d7, d10, #12
-# CHECK-NEXT:  1      4     0.50                        shl v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        shl v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        shl v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        shl v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        shl v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        shl v0.4s, v0.4s, #3
-# CHECK-NEXT:  1      4     0.50                        shll  v0.2d, v0.2s, #32
-# CHECK-NEXT:  1      4     0.50                        shll  v0.4s, v0.4h, #16
-# CHECK-NEXT:  1      4     0.50                        shll  v0.8h, v0.8b, #8
-# CHECK-NEXT:  1      4     0.50                        shll  v0.2d, v0.2s, #32
-# CHECK-NEXT:  1      4     0.50                        shll  v0.4s, v0.4h, #16
-# CHECK-NEXT:  1      4     0.50                        shll  v0.8h, v0.8b, #8
-# CHECK-NEXT:  1      4     0.50                        shll2 v0.2d, v0.4s, #32
-# CHECK-NEXT:  1      4     0.50                        shll2 v0.4s, v0.8h, #16
-# CHECK-NEXT:  1      4     0.50                        shll2 v0.8h, v0.16b, #8
-# CHECK-NEXT:  1      4     0.50                        shll2 v0.2d, v0.4s, #32
-# CHECK-NEXT:  1      4     0.50                        shll2 v0.4s, v0.8h, #16
-# CHECK-NEXT:  1      4     0.50                        shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT:  1      4     1.00                        shl v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        shll  v0.2d, v0.2s, #32
+# CHECK-NEXT:  1      4     1.00                        shll  v0.4s, v0.4h, #16
+# CHECK-NEXT:  1      4     1.00                        shll  v0.8h, v0.8b, #8
+# CHECK-NEXT:  1      4     1.00                        shll  v0.2d, v0.2s, #32
+# CHECK-NEXT:  1      4     1.00                        shll  v0.4s, v0.4h, #16
+# CHECK-NEXT:  1      4     1.00                        shll  v0.8h, v0.8b, #8
+# CHECK-NEXT:  1      4     1.00                        shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT:  1      4     1.00                        shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT:  1      4     1.00                        shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT:  1      4     1.00                        shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT:  1      4     1.00                        shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT:  1      4     1.00                        shll2 v0.8h, v0.16b, #8
 # CHECK-NEXT:  1      4     0.50                        shrn  v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        shrn  v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        shrn  v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        shrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        shrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        shrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        shrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        shrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        shrn2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        shsub v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        shsub v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        sli d10, d14, #12
-# CHECK-NEXT:  1      4     0.50                        sli v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        sli v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sli v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        sli v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sli v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        sli v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        sli v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sli v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sli v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        sli v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sli v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        smax  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        smax  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        smax  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        smaxp v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        smaxp v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        smaxp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        smin  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        smin  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        smin  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sminp v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        sminp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sminp v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        smlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        smlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        smlal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        smlal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        smlal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        smlal2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        smlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        smlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        smlsl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        smlsl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        smlsl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        smlsl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        smull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        smull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        smull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        smull2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        smull2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        smull2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        smin  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        smin  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        smin  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sminp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sminp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        smlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        smlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        smlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        smlal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        smlal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        smlal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        smlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        smlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        smlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        smlsl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        smlsl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        smlsl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        smull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        smull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        smull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        smull2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        smull2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        smull2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        sqabs b19, b14
 # CHECK-NEXT:  1      4     0.50                        sqabs d18, d12
 # CHECK-NEXT:  1      4     0.50                        sqabs h21, h15
 # CHECK-NEXT:  1      4     0.50                        sqabs s20, s12
-# CHECK-NEXT:  1      4     0.50                        sqabs v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        sqabs v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqabs v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sqabs v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        sqabs v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        sqabs v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqabs v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqabs v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        sqabs v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        sqabs v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqabs v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        sqadd b20, b11, b15
-# CHECK-NEXT:  1      4     0.50                        sqadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sqadd v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        sqadd v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        sqdmlal d19, s24, s12
 # CHECK-NEXT:  1      4     0.50                        sqdmlal d8, s9, v0.s[1]
 # CHECK-NEXT:  1      4     0.50                        sqdmlal s0, h0, v0.h[3]
 # CHECK-NEXT:  1      4     0.50                        sqdmlal s17, h27, h12
-# CHECK-NEXT:  1      4     0.50                        sqdmlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sqdmlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqdmlal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sqdmlal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqdmlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        sqdmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        sqdmlal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqdmlal2  v0.4s, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        sqdmlsl d12, s23, s13
 # CHECK-NEXT:  1      4     0.50                        sqdmlsl d8, s9, v0.s[1]
 # CHECK-NEXT:  1      4     0.50                        sqdmlsl s0, h0, v0.h[3]
 # CHECK-NEXT:  1      4     0.50                        sqdmlsl s14, h12, h25
-# CHECK-NEXT:  1      4     0.50                        sqdmlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sqdmlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqdmlsl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sqdmlsl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqdmlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        sqdmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        sqdmlsl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqdmlsl2  v0.4s, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        sqdmulh h10, h11, h12
 # CHECK-NEXT:  1      4     0.50                        sqdmulh h7, h15, v0.h[3]
 # CHECK-NEXT:  1      4     0.50                        sqdmulh s15, s14, v0.s[1]
 # CHECK-NEXT:  1      4     0.50                        sqdmulh s20, s21, s2
 # CHECK-NEXT:  1      4     0.50                        sqdmulh v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sqdmulh v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqdmulh v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        sqdmull d1, s1, v0.s[1]
 # CHECK-NEXT:  1      4     0.50                        sqdmull d15, s22, s12
 # CHECK-NEXT:  1      4     0.50                        sqdmull s1, h1, v0.h[3]
 # CHECK-NEXT:  1      4     0.50                        sqdmull s12, h22, h12
-# CHECK-NEXT:  1      4     0.50                        sqdmull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        sqdmull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqdmull2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sqdmull2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqdmull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        sqdmull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        sqdmull2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqdmull2  v0.4s, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        sqneg b19, b14
 # CHECK-NEXT:  1      4     0.50                        sqneg d18, d12
 # CHECK-NEXT:  1      4     0.50                        sqneg h21, h15
 # CHECK-NEXT:  1      4     0.50                        sqneg s20, s12
-# CHECK-NEXT:  1      4     0.50                        sqneg v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        sqneg v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqneg v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        sqneg v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        sqneg v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        sqneg v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqneg v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqneg v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        sqneg v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        sqneg v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqneg v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        sqrdmulh  h10, h11, h12
 # CHECK-NEXT:  1      4     0.50                        sqrdmulh  h7, h15, v0.h[3]
 # CHECK-NEXT:  1      4     0.50                        sqrdmulh  s15, s14, v0.s[1]
 # CHECK-NEXT:  1      4     0.50                        sqrdmulh  s20, s21, s2
 # CHECK-NEXT:  1      4     0.50                        sqrdmulh  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqrdmulh  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqrdmulh  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        sqrshl  d31, d31, d31
 # CHECK-NEXT:  1      4     0.50                        sqrshl  h3, h4, h15
 # CHECK-NEXT:  1      4     0.50                        sqrshl  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        sqrshl  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        sqrshl  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        sqrshrn b10, h13, #2
 # CHECK-NEXT:  1      4     0.50                        sqrshrn h15, s10, #6
 # CHECK-NEXT:  1      4     0.50                        sqrshrn s15, d12, #9
 # CHECK-NEXT:  1      4     0.50                        sqrshrn v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sqrshrn v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqrshrn v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqrshrn2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqrshrn2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        sqrshrn2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sqrshrn2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sqrshrn2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sqrshrn2  v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqrshrun  b17, h10, #6
 # CHECK-NEXT:  1      4     0.50                        sqrshrun  h10, s13, #15
 # CHECK-NEXT:  1      4     0.50                        sqrshrun  s22, d16, #31
 # CHECK-NEXT:  1      4     0.50                        sqrshrun  v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sqrshrun  v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqrshrun  v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqrshrun2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqrshrun2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        sqrshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sqrshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sqrshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sqrshrun2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshl b11, b19, #7
 # CHECK-NEXT:  1      4     0.50                        sqshl d15, d16, #51
 # CHECK-NEXT:  1      4     0.50                        sqshl d31, d31, d31
 # CHECK-NEXT:  1      4     0.50                        sqshl h13, h18, #11
 # CHECK-NEXT:  1      4     0.50                        sqshl h3, h4, h15
 # CHECK-NEXT:  1      4     0.50                        sqshl s14, s17, #22
-# CHECK-NEXT:  1      4     0.50                        sqshl v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        sqshl v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sqshl v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        sqshl v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sqshl v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshl v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        sqshl v0.4h, v0.4h, #3
 # CHECK-NEXT:  1      4     0.50                        sqshl v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        sqshl v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sqshl v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshl v0.8b, v0.8b, #3
 # CHECK-NEXT:  1      4     0.50                        sqshl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        sqshl v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sqshl v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        sqshlu  b15, b18, #6
 # CHECK-NEXT:  1      4     0.50                        sqshlu  d11, d13, #32
 # CHECK-NEXT:  1      4     0.50                        sqshlu  h19, h17, #6
 # CHECK-NEXT:  1      4     0.50                        sqshlu  s16, s14, #25
-# CHECK-NEXT:  1      4     0.50                        sqshlu  v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        sqshlu  v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sqshlu  v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        sqshlu  v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sqshlu  v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshlu  v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        sqshlu  v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sqshlu  v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshlu  v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        sqshlu  v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sqshlu  v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrn  b10, h15, #5
 # CHECK-NEXT:  1      4     0.50                        sqshrn  h17, s10, #4
 # CHECK-NEXT:  1      4     0.50                        sqshrn  s18, d10, #31
 # CHECK-NEXT:  1      4     0.50                        sqshrn  v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrn  v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrn  v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        sqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sqshrn2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrun b15, h10, #7
 # CHECK-NEXT:  1      4     0.50                        sqshrun h20, s14, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrun s10, d15, #15
 # CHECK-NEXT:  1      4     0.50                        sqshrun v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrun v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqshrun v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqshrun2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        sqshrun2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        sqshrun2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sqshrun2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sqshrun2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sqshrun2  v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sqsub s20, s10, s7
-# CHECK-NEXT:  1      4     0.50                        sqsub v0.2d, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        sqsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqsub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqsub v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        sqsub v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        sqxtn b18, h18
 # CHECK-NEXT:  1      4     0.50                        sqxtn h20, s17
 # CHECK-NEXT:  1      4     0.50                        sqxtn s19, d14
-# CHECK-NEXT:  1      4     0.50                        sqxtn v0.2s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        sqxtn v0.4h, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sqxtn v0.8b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sqxtn2  v0.16b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sqxtn2  v0.4s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        sqxtn2  v0.8h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqxtn v0.2s, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqxtn v0.4h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqxtn v0.8b, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqxtn2  v0.16b, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqxtn2  v0.4s, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqxtn2  v0.8h, v0.4s
 # CHECK-NEXT:  1      4     0.50                        sqxtun  b19, h14
 # CHECK-NEXT:  1      4     0.50                        sqxtun  h21, s15
 # CHECK-NEXT:  1      4     0.50                        sqxtun  s20, d12
-# CHECK-NEXT:  1      4     0.50                        sqxtun  v0.2s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        sqxtun  v0.4h, v0.4s
-# CHECK-NEXT:  1      4     0.50                        sqxtun  v0.8b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sqxtun2 v0.16b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        sqxtun2 v0.4s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        sqxtun2 v0.8h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqxtun  v0.2s, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqxtun  v0.4h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        sqxtun  v0.8b, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqxtun2 v0.16b, v0.8h
+# CHECK-NEXT:  1      4     1.00                        sqxtun2 v0.4s, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sqxtun2 v0.8h, v0.4s
 # CHECK-NEXT:  1      4     0.50                        srhadd  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        srhadd  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        srhadd  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        sri d10, d12, #14
-# CHECK-NEXT:  1      4     0.50                        sri v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        sri v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sri v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        sri v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sri v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        sri v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        sri v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sri v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sri v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        sri v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sri v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        srshl d16, d16, d16
 # CHECK-NEXT:  1      4     0.50                        srshl v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        srshl v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        srshl v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        srshr d19, d18, #7
-# CHECK-NEXT:  1      4     0.50                        srshr v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        srshr v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        srshr v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        srshr v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        srshr v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        srshr v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        srshr v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        srshr v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        srshr v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        srshr v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        srshr v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        srsra d15, d11, #19
-# CHECK-NEXT:  1      4     0.50                        srsra v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        srsra v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        srsra v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        srsra v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        srsra v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        srsra v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        srsra v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        srsra v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        srsra v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        srsra v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        srsra v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        sshl  d31, d31, d31
-# CHECK-NEXT:  1      4     0.50                        sshl  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sshl  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        sshl  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        sshl  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        sshl  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        sshll v0.2d, v0.2s, #3
-# CHECK-NEXT:  1      4     0.50                        sshll2  v0.4s, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sshll2  v0.4s, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        sshr  d15, d16, #12
-# CHECK-NEXT:  1      4     0.50                        sshr  v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        sshr  v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        sshr  v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        sshr  v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        sshr  v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        sshr  v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        sshr  v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        sshr  v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        sshr  v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        sshr  v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        sshr  v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        ssra  d18, d12, #21
-# CHECK-NEXT:  1      4     0.50                        ssra  v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        ssra  v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        ssra  v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        ssra  v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        ssra  v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        ssra  v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        ssra  v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        ssra  v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        ssra  v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        ssra  v0.8h, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        ssubl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        ssubl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        ssubl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        ssubl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        ssubl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        ssubl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        ssubw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        ssubw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  1      4     0.50                        ssubw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        ssubw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  1      4     0.50                        ssubw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        ssubw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        ssra  v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        ssubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        ssubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        ssubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        ssubl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        ssubl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        ssubl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        ssubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  1      4     1.00                        ssubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  1      4     1.00                        ssubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  1      4     1.00                        ssubw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        ssubw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        ssubw2  v0.8h, v0.8h, v0.16b
 # CHECK-NEXT:  1      4     1.00           *            st1 { v0.16b }, [x0]
 # CHECK-NEXT:  2      5     2.00           *            st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
 # CHECK-NEXT:  1      5     4.00           *            st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
 # CHECK-NEXT:  2      4     1.00           *            st1 { v0.4s, v1.4s }, [sp], #32
 # CHECK-NEXT:  1      5     2.00           *            st1 { v0.4s, v1.4s, v2.4s }, [sp]
 # CHECK-NEXT:  2      5     4.00           *            st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
 # CHECK-NEXT:  2      4     1.00           *            st1 { v0.8h }, [x15], x2
 # CHECK-NEXT:  1      4     1.00           *            st1 { v0.8h, v1.8h }, [x15]
 # CHECK-NEXT:  1      4     1.00           *            st1 { v0.d }[1], [x0]
 # CHECK-NEXT:  2      4     1.00           *            st1 { v0.d }[1], [x0], #8
 # CHECK-NEXT:  2      5     4.00           *            st2 { v0.16b, v1.16b }, [x0], x1
 # CHECK-NEXT:  1      5     2.00           *            st2 { v0.8b, v1.8b }, [x0]
 # CHECK-NEXT:  1      5     2.00           *            st2 { v0.s, v1.s }[3], [sp]
 # CHECK-NEXT:  2      5     2.00           *            st2 { v0.s, v1.s }[3], [sp], #8
 # CHECK-NEXT:  1      5     4.00           *            st3 { v0.4h, v1.4h, v2.4h }, [x15]
 # CHECK-NEXT:  2      5     4.00           *            st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
 # CHECK-NEXT:  1      5     2.00           *            st3 { v0.h, v1.h, v2.h }[7], [x15]
 # CHECK-NEXT:  2      5     2.00           *            st3 { v0.h, v1.h, v2.h }[7], [x15], #6
 # CHECK-NEXT:  1      5     4.00           *            st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
 # CHECK-NEXT:  2      5     4.00           *            st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
 # CHECK-NEXT:  1      5     2.00           *            st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
 # CHECK-NEXT:  2      5     2.00           *            st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
 # CHECK-NEXT:  1      4     0.50                        sub d15, d5, d16
-# CHECK-NEXT:  1      4     0.50                        sub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        sub v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        suqadd  b19, b14
 # CHECK-NEXT:  1      4     0.50                        suqadd  d18, d22
 # CHECK-NEXT:  1      4     0.50                        suqadd  h20, h15
 # CHECK-NEXT:  1      4     0.50                        suqadd  s21, s12
-# CHECK-NEXT:  1      4     0.50                        suqadd  v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        suqadd  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        suqadd  v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        suqadd  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        suqadd  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        suqadd  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        suqadd  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        suqadd  v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        suqadd  v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        suqadd  v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        tbl v0.16b, { v0.16b }, v0.16b
-# CHECK-NEXT:  1      4     0.50                        tbl v0.16b, { v0.16b, v1.16b }, v0.16b
-# CHECK-NEXT:  1      4     0.50                        tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
-# CHECK-NEXT:  1      4     0.50                        tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        suqadd  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        tbl v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
 # CHECK-NEXT:  1      4     0.50                        tbl v0.8b, { v0.16b }, v0.8b
 # CHECK-NEXT:  1      4     0.50                        tbl v0.8b, { v0.16b, v1.16b }, v0.8b
 # CHECK-NEXT:  1      4     0.50                        tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
 # CHECK-NEXT:  1      4     0.50                        tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
-# CHECK-NEXT:  1      4     0.50                        tbx v0.16b, { v0.16b }, v0.16b
-# CHECK-NEXT:  1      4     0.50                        tbx v0.16b, { v0.16b, v1.16b }, v0.16b
-# CHECK-NEXT:  1      4     0.50                        tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
-# CHECK-NEXT:  1      4     0.50                        tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbx v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT:  1      4     1.00                        tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
 # CHECK-NEXT:  1      4     0.50                        tbx v0.8b, { v0.16b }, v0.8b
 # CHECK-NEXT:  1      4     0.50                        tbx v0.8b, { v0.16b, v1.16b }, v0.8b
 # CHECK-NEXT:  1      4     0.50                        tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
 # CHECK-NEXT:  1      4     0.50                        tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
-# CHECK-NEXT:  1      4     0.50                        trn1  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        trn1  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        trn1  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        trn1  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        trn1  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        trn1  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        trn1  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        trn1  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        trn1  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        trn1  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        trn2  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        trn2  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        trn1  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        trn2  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        trn2  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        trn2  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        trn2  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        trn2  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        trn2  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        trn2  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        trn2  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        trn2  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        uaba  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uabal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        uabal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uabal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uabal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uabal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uabal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        uabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        uabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        uabal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uabal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uabal2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        uabd  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uabdl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        uabdl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uabdl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uabdl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uabdl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uabdl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        uabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        uabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        uabdl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uabdl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uabdl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        uadalp  v0.1d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        uadalp  v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uadalp  v0.2d, v0.4s
 # CHECK-NEXT:  1      4     0.50                        uadalp  v0.2s, v0.4h
 # CHECK-NEXT:  1      4     0.50                        uadalp  v0.4h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uadalp  v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uadalp  v0.8h, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uaddl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        uaddl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uaddl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uaddl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uaddl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uaddl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uadalp  v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uadalp  v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uaddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        uaddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        uaddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        uaddl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uaddl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uaddl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        uaddlp  v0.1d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        uaddlp  v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uaddlp  v0.2d, v0.4s
 # CHECK-NEXT:  1      4     0.50                        uaddlp  v0.2s, v0.4h
 # CHECK-NEXT:  1      4     0.50                        uaddlp  v0.4h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uaddlp  v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uaddlp  v0.8h, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uaddw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        uaddw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uaddw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uaddw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uaddw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uaddw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uaddlp  v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uaddlp  v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uaddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  1      4     1.00                        uaddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  1      4     1.00                        uaddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  1      4     1.00                        uaddw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uaddw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uaddw2  v0.8h, v0.8h, v0.16b
 # CHECK-NEXT:  1      4     0.50                        ucvtf d21, d14
 # CHECK-NEXT:  1      4     0.50                        ucvtf d21, d14, #64
 # CHECK-NEXT:  1      4     0.50                        ucvtf s22, s13
 # CHECK-NEXT:  1      4     0.50                        ucvtf s22, s13, #32
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        ucvtf v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uhadd v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uhadd v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uhsub v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        umax  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        umax  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        umax  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        umaxp v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        umaxp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        umaxp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uhsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        umax  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        umax  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        umax  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        umaxp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        umaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        umaxp v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        umin  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        umin  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        umin  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  1      4     0.50                        uminp v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        uminp v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        uminp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        umlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        umlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        umlal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        umlal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        umlal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        umlal2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        umlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        umlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        umlsl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        umlsl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        umlsl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        umlsl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        umull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        umull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        umull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        umull2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        umull2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        umull2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        umlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        umlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        umlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        umlal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        umlal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        umlal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        umlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        umlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        umlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        umlsl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        umlsl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        umlsl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        umull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        umull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        umull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        umull2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        umull2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        umull2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  1      4     0.50                        uqadd h0, h1, h5
-# CHECK-NEXT:  1      4     0.50                        uqadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uqadd v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        uqrshl  b11, b20, b30
 # CHECK-NEXT:  1      4     0.50                        uqrshl  s23, s20, s16
-# CHECK-NEXT:  1      4     0.50                        uqrshl  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uqrshl  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uqrshl  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uqrshl  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uqrshl  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uqrshl  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uqrshl  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uqrshl  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        uqrshrn b10, h12, #5
 # CHECK-NEXT:  1      4     0.50                        uqrshrn h12, s10, #14
 # CHECK-NEXT:  1      4     0.50                        uqrshrn s10, d10, #25
 # CHECK-NEXT:  1      4     0.50                        uqrshrn v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        uqrshrn v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        uqrshrn v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        uqrshrn2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        uqrshrn2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        uqrshrn2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        uqrshrn2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        uqrshrn2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        uqrshrn2  v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        uqshl b11, b20, b30
 # CHECK-NEXT:  1      4     0.50                        uqshl b18, b15, #6
 # CHECK-NEXT:  1      4     0.50                        uqshl d15, d12, #19
 # CHECK-NEXT:  1      4     0.50                        uqshl h11, h18, #7
 # CHECK-NEXT:  1      4     0.50                        uqshl s14, s19, #18
 # CHECK-NEXT:  1      4     0.50                        uqshl s23, s20, s16
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.2d, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        uqshl v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        uqshl v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.4s, v0.4s, #3
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        uqshl v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.8h, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        uqshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        uqshl v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        uqshrn  b12, h10, #7
 # CHECK-NEXT:  1      4     0.50                        uqshrn  h10, s14, #5
 # CHECK-NEXT:  1      4     0.50                        uqshrn  s10, d12, #13
 # CHECK-NEXT:  1      4     0.50                        uqshrn  v0.2s, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        uqshrn  v0.4h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        uqshrn  v0.8b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        uqshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        uqshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  1      4     0.50                        uqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        uqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        uqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        uqshrn2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        uqsub d16, d16, d16
 # CHECK-NEXT:  1      4     0.50                        uqsub v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  1      4     0.50                        uqxtn b18, h18
 # CHECK-NEXT:  1      4     0.50                        uqxtn h20, s17
 # CHECK-NEXT:  1      4     0.50                        uqxtn s19, d14
-# CHECK-NEXT:  1      4     0.50                        uqxtn v0.2s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        uqxtn v0.4h, v0.4s
-# CHECK-NEXT:  1      4     0.50                        uqxtn v0.8b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uqxtn2  v0.16b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uqxtn2  v0.4s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        uqxtn2  v0.8h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uqxtn v0.2s, v0.2d
+# CHECK-NEXT:  1      4     1.00                        uqxtn v0.4h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uqxtn v0.8b, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uqxtn2  v0.16b, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uqxtn2  v0.4s, v0.2d
+# CHECK-NEXT:  1      4     1.00                        uqxtn2  v0.8h, v0.4s
 # CHECK-NEXT:  1      4     0.50                        urecpe  v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        urecpe  v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        urhadd  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        urhadd  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        urhadd  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        urecpe  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        urhadd  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        urhadd  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        urhadd  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        urshl d8, d7, d4
-# CHECK-NEXT:  1      4     0.50                        urshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        urshl v0.2d, v0.2d, v0.2d
-# CHECK-NEXT:  1      4     0.50                        urshl v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        urshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        urshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        urshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        urshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        urshl v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        urshr d20, d23, #31
-# CHECK-NEXT:  1      4     0.50                        urshr v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        urshr v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        urshr v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        urshr v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        urshr v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        urshr v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        urshr v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        urshr v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        urshr v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        urshr v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        urshr v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      12    9.00                        ursqrte v0.2s, v0.2s
 # CHECK-NEXT:  1      12    9.00                        ursqrte v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        ursra d18, d10, #13
-# CHECK-NEXT:  1      4     0.50                        ursra v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        ursra v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        ursra v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        ursra v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        ursra v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        ursra v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        ursra v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        ursra v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        ursra v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        ursra v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        ursra v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        ushl  d0, d0, d0
-# CHECK-NEXT:  1      4     0.50                        ushl  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        ushl  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        ushl  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        ushl  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        ushl  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        ushl  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        ushll v0.4s, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        ushll2  v0.8h, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        ushll2  v0.8h, v0.16b, #3
 # CHECK-NEXT:  1      4     0.50                        ushr  d10, d17, #18
-# CHECK-NEXT:  1      4     0.50                        ushr  v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        ushr  v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        ushr  v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        ushr  v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        ushr  v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        ushr  v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        ushr  v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        ushr  v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        ushr  v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        ushr  v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        ushr  v0.8h, v0.8h, #3
 # CHECK-NEXT:  1      4     0.50                        usqadd  b19, b14
 # CHECK-NEXT:  1      4     0.50                        usqadd  d18, d22
 # CHECK-NEXT:  1      4     0.50                        usqadd  h20, h15
 # CHECK-NEXT:  1      4     0.50                        usqadd  s21, s12
-# CHECK-NEXT:  1      4     0.50                        usqadd  v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        usqadd  v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        usqadd  v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        usqadd  v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        usqadd  v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        usqadd  v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        usqadd  v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        usqadd  v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        usqadd  v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        usqadd  v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        usqadd  v0.8h, v0.8h
 # CHECK-NEXT:  1      4     0.50                        usra  d20, d13, #61
-# CHECK-NEXT:  1      4     0.50                        usra  v0.16b, v0.16b, #3
-# CHECK-NEXT:  1      4     0.50                        usra  v0.2d, v0.2d, #3
+# CHECK-NEXT:  1      4     1.00                        usra  v0.16b, v0.16b, #3
+# CHECK-NEXT:  1      4     1.00                        usra  v0.2d, v0.2d, #3
 # CHECK-NEXT:  1      4     0.50                        usra  v0.2s, v0.2s, #3
 # CHECK-NEXT:  1      4     0.50                        usra  v0.4h, v0.4h, #3
-# CHECK-NEXT:  1      4     0.50                        usra  v0.4s, v0.4s, #3
+# CHECK-NEXT:  1      4     1.00                        usra  v0.4s, v0.4s, #3
 # CHECK-NEXT:  1      4     0.50                        usra  v0.8b, v0.8b, #3
-# CHECK-NEXT:  1      4     0.50                        usra  v0.8h, v0.8h, #3
-# CHECK-NEXT:  1      4     0.50                        usubl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  1      4     0.50                        usubl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        usubl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        usubl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  1      4     0.50                        usubl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        usubl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        usubw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  1      4     0.50                        usubw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  1      4     0.50                        usubw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  1      4     0.50                        usubw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  1      4     0.50                        usubw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  1      4     0.50                        usubw2  v0.8h, v0.8h, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uzp1  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uzp1  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        usra  v0.8h, v0.8h, #3
+# CHECK-NEXT:  1      4     1.00                        usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  1      4     1.00                        usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  1      4     1.00                        usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  1      4     1.00                        usubl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        usubl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        usubl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  1      4     1.00                        usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  1      4     1.00                        usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  1      4     1.00                        usubw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  1      4     1.00                        usubw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  1      4     1.00                        usubw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uzp1  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uzp1  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        uzp1  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        uzp1  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uzp1  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uzp1  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        uzp1  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uzp1  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        uzp2  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        uzp2  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        uzp1  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        uzp2  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        uzp2  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        uzp2  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        uzp2  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        uzp2  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        uzp2  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        uzp2  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        uzp2  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        xtn v0.2s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        xtn v0.4h, v0.4s
-# CHECK-NEXT:  1      4     0.50                        xtn v0.8b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        xtn2  v0.16b, v0.8h
-# CHECK-NEXT:  1      4     0.50                        xtn2  v0.4s, v0.2d
-# CHECK-NEXT:  1      4     0.50                        xtn2  v0.8h, v0.4s
-# CHECK-NEXT:  1      4     0.50                        zip1  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        zip1  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        uzp2  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      2     0.50                        xtn v0.2s, v0.2d
+# CHECK-NEXT:  1      2     0.50                        xtn v0.4h, v0.4s
+# CHECK-NEXT:  1      2     0.50                        xtn v0.8b, v0.8h
+# CHECK-NEXT:  1      2     0.50                        xtn2  v0.16b, v0.8h
+# CHECK-NEXT:  1      2     0.50                        xtn2  v0.4s, v0.2d
+# CHECK-NEXT:  1      2     0.50                        xtn2  v0.8h, v0.4s
+# CHECK-NEXT:  1      4     1.00                        zip1  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        zip1  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        zip1  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        zip1  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        zip1  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        zip1  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        zip1  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        zip1  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  1      4     0.50                        zip2  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  1      4     0.50                        zip2  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  1      4     1.00                        zip1  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        zip2  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  1      4     1.00                        zip2  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  1      4     0.50                        zip2  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  1      4     0.50                        zip2  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  1      4     0.50                        zip2  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  1      4     1.00                        zip2  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  1      4     0.50                        zip2  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  1      4     0.50                        zip2  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  1      4     1.00                        zip2  v0.8h, v0.8h, v0.8h
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0.0] - CortexA55UnitALU
 # CHECK-NEXT: [0.1] - CortexA55UnitALU
 # CHECK-NEXT: [1]   - CortexA55UnitB
 # CHECK-NEXT: [2]   - CortexA55UnitDiv
 # CHECK-NEXT: [3.0] - CortexA55UnitFPALU
 # CHECK-NEXT: [3.1] - CortexA55UnitFPALU
 # CHECK-NEXT: [4]   - CortexA55UnitFPDIV
 # CHECK-NEXT: [5.0] - CortexA55UnitFPMAC
 # CHECK-NEXT: [5.1] - CortexA55UnitFPMAC
 # CHECK-NEXT: [6]   - CortexA55UnitLd
 # CHECK-NEXT: [7]   - CortexA55UnitMAC
 # CHECK-NEXT: [8]   - CortexA55UnitSt
 
 # CHECK:      Resource pressure per iteration:
 # CHECK-NEXT: [0.0]  [0.1]  [1]    [2]    [3.0]  [3.1]  [4]    [5.0]  [5.1]  [6]    [7]    [8]
-# CHECK-NEXT:  -      -      -      -     487.00 487.00 197.00 3.00   3.00   107.00  -     52.00
+# CHECK-NEXT:  -      -      -      -     716.50 716.50 197.00 3.00   3.00   107.00  -     52.00
 
 # CHECK:      Resource pressure by instruction:
 # CHECK-NEXT: [0.0]  [0.1]  [1]    [2]    [3.0]  [3.1]  [4]    [5.0]  [5.1]  [6]    [7]    [8]    Instructions:
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs d29, d24
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     abs v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     abs v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     abs v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     abs v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     abs v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     add d17, d31, d29
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     add v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addhn v0.2s, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addhn v0.4h, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addhn v0.8b, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addhn2  v0.16b, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addhn2  v0.4s, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addhn2  v0.8h, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addp  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addhn2  v0.16b, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addhn2  v0.4s, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addhn2  v0.8h, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     addp  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     addp  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     and v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     bic v0.4h, #15, lsl #8
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     bic v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     bif v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     bit v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     bsl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cls v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cls v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cls v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cls v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cls v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cls v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cls v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cls v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clz v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cls v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     clz v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clz v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clz v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clz v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     clz v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clz v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     clz v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     clz v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmeq  d20, d21, #0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmeq  d20, d21, d22
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmeq  v0.16b, v0.16b, #0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmeq  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cmeq  v0.16b, v0.16b, #0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cmeq  v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmge  d20, d21, #0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmge  d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmge  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmge  v0.8b, v0.8b, #0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmgt  d20, d21, #0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmgt  d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmgt  v0.2s, v0.2s, #0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmgt  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cmgt  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmhi  d20, d21, d22
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmhi  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cmhi  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmhs  d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmhs  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmle  d20, d21, #0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmle  v0.2d, v0.2d, #0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cmle  v0.2d, v0.2d, #0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmlt  d20, d21, #0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmlt  v0.8h, v0.8h, #0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cmlt  v0.8h, v0.8h, #0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmtst d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cmtst v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cnt v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     cnt v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     cnt v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.16b, w28
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.2d, x28
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.2s, w28
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.4h, w28
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.4s, w28
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.8b, w28
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     dup v0.8h, w28
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     eor v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ext v0.16b, v0.16b, v0.16b, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ext v0.8b, v0.8b, v0.8b, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabd  d29, d24, d20
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabd  s29, s24, s20
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabd  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabs  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fabd  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fabs  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabs  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabs  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabs  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fabs  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fabs  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fabs  v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     facge d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     facge s10, s11, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     facge v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     facgt d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     facgt s10, s11, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     facgt v0.2d, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fadd  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fadd  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     faddp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     faddp v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmeq d20, d21, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmeq d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmeq s10, s11, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmeq s10, s11, s12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmeq v0.2s, v0.2s, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmeq v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmge d20, d21, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmge d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmge s10, s11, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmge s10, s11, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmge v0.2d, v0.2d, #0.0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fcmge v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmgt d20, d21, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmgt d20, d21, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmgt s10, s11, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmgt s10, s11, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmgt v0.4s, v0.4s, #0.0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fcmgt v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmle d20, d21, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmle s10, s11, #0.0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fcmle v0.2d, v0.2d, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmlt d20, d21, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmlt s10, s11, #0.0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fcmlt v0.4s, v0.4s, #0.0
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  d21, d14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  s12, s13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtas  v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtau  d21, d14

 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fcvtzu  v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -      -      -     10.00   -      -      -      -      -     fdiv  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmax  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmax  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmax  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmax  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxnm  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmax  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmaxnm  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxnm  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxnm  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmaxnm  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmaxnmp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxnmp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxnmp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmaxnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmaxp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmaxp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmin  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmin  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmin  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmin  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminnm  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmin  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fminnm  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminnm  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminnm  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fminnm  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fminnmp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminnmp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminnmp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fminnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fminp v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminp v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fminp v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -      -      -      -     0.50   0.50    -      -      -     fmla  d0, d1, v0.d[1]
 # CHECK-NEXT:  -      -      -      -      -      -      -     0.50   0.50    -      -      -     fmla  s0, s1, v0.s[3]
 # CHECK-NEXT:  -      -      -      -      -      -      -     0.50   0.50    -      -      -     fmla  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -      -      -      -     0.50   0.50    -      -      -     fmls  d0, d4, v0.d[1]
 # CHECK-NEXT:  -      -      -      -      -      -      -     0.50   0.50    -      -      -     fmls  s3, s5, v0.s[3]
 # CHECK-NEXT:  -      -      -      -      -      -      -     0.50   0.50    -      -      -     fmls  v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmov  v0.2d, #-1.25000000
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmov  v0.2d, #-1.25000000
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmov  v0.2s, #13.00000000
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmov  v0.4s, #1.00000000
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmov  v0.4s, #1.00000000
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmul  d0, d1, v0.d[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmul  s0, s1, v0.s[3]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmul  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx d0, d4, v0.d[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx d23, d11, d1
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx s20, s22, s15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx s3, s5, v0.s[3]
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmulx v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fmulx v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fneg  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fmulx v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fneg  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fneg  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fneg  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fneg  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     fneg  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fneg  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     fneg  v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  d13, d13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  s19, s14
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frecpe  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpe  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecps  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frecpe  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frecpe  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frecps  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecps  d22, d30, d21
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecps  s21, s16, s13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpx  d16, d19
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frecpx  s18, s10
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinta  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frinta  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinta  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinta  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinta  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinta  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinti  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frinta  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frinta  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frinti  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinti  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinti  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinti  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frinti  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintm  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frinti  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frinti  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintm  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintm  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintm  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintm  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintm  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintn  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintm  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintm  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintn  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintn  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintn  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintn  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintn  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintp  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintn  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintn  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintp  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintp  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintp  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintp  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintp  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintx  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintp  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintp  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintx  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintx  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintx  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintx  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintx  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintz  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintx  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintx  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintz  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintz  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintz  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintz  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     frintz  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintz  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     frintz  v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -      -      -     19.00   -      -      -      -      -     frsqrte d21, d12
 # CHECK-NEXT:  -      -      -      -      -      -     9.00    -      -      -      -      -     frsqrte s22, s13
 # CHECK-NEXT:  -      -      -      -      -      -     19.00   -      -      -      -      -     frsqrte v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -      -      -     9.00    -      -      -      -      -     frsqrte v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -      -      -     5.00    -      -      -      -      -     frsqrte v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -      -      -     9.00    -      -      -      -      -     frsqrte v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -      -      -     5.00    -      -      -      -      -     frsqrte v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -      -      -     19.00   -      -      -      -      -     frsqrts d8, d22, d18

 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -     2.00    -      -     ld4r  { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -     2.00    -      -     ld4r  { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mla v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mls v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov b0, v0.b[15]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov d6, v0.d[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov h2, v0.h[5]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov s17, v0.s[2]
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     mov v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     movi  d15, #0xff00ff00ff00ff
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     movi  v0.16b, #31
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     movi  v0.2d, #0xff0000ff0000ffff
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     movi  v0.16b, #31
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     movi  v0.2d, #0xff0000ff0000ffff
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     movi  v0.2s, #8, msl #8
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     movi  v0.4s, #255, lsl #24
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     movi  v0.4s, #255, lsl #24
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     movi  v0.8b, #255
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mul v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mvni  v0.2s, #0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mvni  v0.4s, #16, msl #16
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     mvni  v0.4s, #16, msl #16
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg d29, d24
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     neg v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     neg v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     neg v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     neg v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mvn v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     neg v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     mvn v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mvn v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     orn v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     mov v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     orr v0.8h, #31
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     pmul  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     orn v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     mov v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     orr v0.8h, #31
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     pmul  v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     pmul  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     pmull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     pmull2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     raddhn  v0.2s, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     raddhn  v0.4h, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     raddhn  v0.8b, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     raddhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     raddhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     raddhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rbit  v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     pmull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     pmull2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     raddhn  v0.2s, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     raddhn  v0.4h, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     raddhn  v0.8b, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     raddhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     raddhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     raddhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rbit  v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rbit  v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev16 v21.8b, v1.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev16 v30.16b, v31.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rev16 v30.16b, v31.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev32 v0.4h, v9.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev32 v21.8b, v1.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev32 v30.16b, v31.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev32 v4.8h, v7.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev64 v0.16b, v31.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rev32 v30.16b, v31.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rev32 v4.8h, v7.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rev64 v0.16b, v31.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev64 v1.8b, v9.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev64 v13.4h, v21.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev64 v2.8h, v4.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rev64 v2.8h, v4.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev64 v4.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rev64 v6.4s, v8.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rev64 v6.4s, v8.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rshrn v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rshrn v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rshrn v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rshrn2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rshrn2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rshrn2  v0.8h, v0.4s, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rsubhn  v0.2s, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rsubhn  v0.4h, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rsubhn  v0.8b, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rsubhn2 v0.16b, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rsubhn2 v0.4s, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     rsubhn2 v0.8h, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saba  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rshrn2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rshrn2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rshrn2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rsubhn  v0.2s, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rsubhn  v0.4h, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rsubhn  v0.8b, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rsubhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rsubhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     rsubhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saba  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabal2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabd  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabdl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabdl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabdl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabdl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabdl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sabdl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabdl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabdl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sabdl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sadalp  v0.1d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sadalp  v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sadalp  v0.2d, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sadalp  v0.2s, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sadalp  v0.4h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sadalp  v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sadalp  v0.8h, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sadalp  v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sadalp  v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddlp  v0.1d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddlp  v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddlp  v0.2d, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddlp  v0.2s, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddlp  v0.4h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddlp  v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddlp  v0.8h, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     saddw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddlp  v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddlp  v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     saddw2  v0.8h, v0.8h, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf d21, d12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf d21, d12, #64
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf s22, s13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf s22, s13, #32
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     scvtf v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shadd v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shl d7, d10, #12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shl v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shl v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shl v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shl v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shl v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shl v0.4s, v0.4s, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll  v0.2d, v0.2s, #32
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll  v0.4s, v0.4h, #16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll  v0.8h, v0.8b, #8
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll  v0.2d, v0.2s, #32
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll  v0.4s, v0.4h, #16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll  v0.8h, v0.8b, #8
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll2 v0.2d, v0.4s, #32
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll2 v0.4s, v0.8h, #16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll2 v0.8h, v0.16b, #8
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll2 v0.2d, v0.4s, #32
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll2 v0.4s, v0.8h, #16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shl v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll  v0.2d, v0.2s, #32
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll  v0.4s, v0.4h, #16
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll  v0.8h, v0.8b, #8
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll  v0.2d, v0.2s, #32
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll  v0.4s, v0.4h, #16
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll  v0.8h, v0.8b, #8
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shll2 v0.8h, v0.16b, #8
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shrn  v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shrn  v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shrn  v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     shrn2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shsub v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     shsub v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli d10, d14, #12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sli v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sli v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sli v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sli v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sli v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smax  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smax  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smax  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smaxp v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smaxp v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smaxp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smin  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smin  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smin  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sminp v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sminp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sminp v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlal2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlsl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlsl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlsl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smlsl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smull2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smull2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     smull2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smin  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smin  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smin  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sminp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sminp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlsl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlsl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smlsl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smull2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smull2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     smull2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs b19, b14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs d18, d12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs h21, h15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs s20, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqabs v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqabs v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqabs v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqabs v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqabs v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqadd b20, b11, b15
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqadd v0.16b, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqadd v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal d19, s24, s12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal d8, s9, v0.s[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal s0, h0, v0.h[3]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal s17, h27, h12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlal2  v0.4s, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl d12, s23, s13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl d8, s9, v0.s[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl s0, h0, v0.h[3]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl s14, h12, h25
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmlsl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlsl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmlsl2  v0.4s, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmulh h10, h11, h12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmulh h7, h15, v0.h[3]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmulh s15, s14, v0.s[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmulh s20, s21, s2
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmulh v0.2s, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmulh v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmulh v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull d1, s1, v0.s[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull d15, s22, s12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull s1, h1, v0.h[3]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull s12, h22, h12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqdmull2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmull2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqdmull2  v0.4s, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg b19, b14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg d18, d12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg h21, h15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg s20, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqneg v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqneg v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqneg v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqneg v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqneg v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrdmulh  h10, h11, h12
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrdmulh  h7, h15, v0.h[3]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrdmulh  s15, s14, v0.s[1]
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrdmulh  s20, s21, s2
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrdmulh  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrdmulh  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrdmulh  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshl  d31, d31, d31
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshl  h3, h4, h15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshl  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshl  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshl  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn b10, h13, #2
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn h15, s10, #6
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn s15, d12, #9
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrn2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrshrn2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrshrn2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrshrn2  v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun  b17, h10, #6
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun  h10, s13, #15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun  s22, d16, #31
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun  v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun  v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun  v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqrshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqrshrun2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl b11, b19, #7
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl d15, d16, #51
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl d31, d31, d31
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl h13, h18, #11
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl h3, h4, h15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl s14, s17, #22
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshl v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshl v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.4h, v0.4h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshl v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.8b, v0.8b, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshl v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshl v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  b15, b18, #6
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  d11, d13, #32
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  h19, h17, #6
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  s16, s14, #25
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshlu  v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshlu  v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshlu  v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshlu  v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshlu  v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn  b10, h15, #5
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn  h17, s10, #4
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn  s18, d10, #31
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn  v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn  v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn  v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshrn2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun b15, h10, #7
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun h20, s14, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun s10, d15, #15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqshrun2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshrun2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshrun2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqshrun2  v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqsub s20, s10, s7
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqsub v0.2d, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqsub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqsub v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqsub v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn b18, h18
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn h20, s17
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn s19, d14
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn v0.2s, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn v0.4h, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn v0.8b, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn2  v0.16b, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn2  v0.4s, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtn2  v0.8h, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtn v0.2s, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtn v0.4h, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtn v0.8b, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtn2  v0.16b, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtn2  v0.4s, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtn2  v0.8h, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun  b19, h14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun  h21, s15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun  s20, d12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun  v0.2s, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun  v0.4h, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun  v0.8b, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun2 v0.16b, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun2 v0.4s, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sqxtun2 v0.8h, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtun  v0.2s, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtun  v0.4h, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtun  v0.8b, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtun2 v0.16b, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtun2 v0.4s, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sqxtun2 v0.8h, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srhadd  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srhadd  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srhadd  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri d10, d12, #14
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sri v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sri v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sri v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sri v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sri v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshl d16, d16, d16
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshl v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshl v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshl v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr d19, d18, #7
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srshr v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srshr v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srshr v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srshr v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srshr v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra d15, d11, #19
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srsra v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srsra v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srsra v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     srsra v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     srsra v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshl  d31, d31, d31
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshl  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sshl  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshl  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshl  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshl  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshll v0.2d, v0.2s, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshll2  v0.4s, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sshll2  v0.4s, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  d15, d16, #12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sshr  v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sshr  v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sshr  v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sshr  v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sshr  v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  d18, d12, #21
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssra  v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssra  v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssra  v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssra  v0.8h, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ssubw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssra  v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ssubw2  v0.8h, v0.8h, v0.16b
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     1.00   st1 { v0.16b }, [x0]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     1.00   st1 { v0.4s, v1.4s }, [sp], #32
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st1 { v0.4s, v1.4s, v2.4s }, [sp]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     1.00   st1 { v0.8h }, [x15], x2
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     1.00   st1 { v0.8h, v1.8h }, [x15]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     1.00   st1 { v0.d }[1], [x0]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     1.00   st1 { v0.d }[1], [x0], #8
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st2 { v0.16b, v1.16b }, [x0], x1
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st2 { v0.8b, v1.8b }, [x0]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st2 { v0.s, v1.s }[3], [sp]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st2 { v0.s, v1.s }[3], [sp], #8
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st3 { v0.4h, v1.4h, v2.4h }, [x15]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st3 { v0.h, v1.h, v2.h }[7], [x15]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st3 { v0.h, v1.h, v2.h }[7], [x15], #6
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     4.00   st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
 # CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -     2.00   st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sub d15, d5, d16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     sub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     sub v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  b19, b14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  d18, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  h20, h15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  s21, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     suqadd  v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     suqadd  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     suqadd  v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     suqadd  v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.16b, { v0.16b }, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.16b, { v0.16b, v1.16b }, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     suqadd  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbl v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.8b, { v0.16b }, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.8b, { v0.16b, v1.16b }, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.16b, { v0.16b }, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.16b, { v0.16b, v1.16b }, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbx v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.8b, { v0.16b }, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.8b, { v0.16b, v1.16b }, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn1  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn1  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn1  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn1  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn1  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn2  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn2  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn2  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     trn2  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     trn2  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaba  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabal2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabd  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabdl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabdl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabdl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabdl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabdl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uabdl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabdl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabdl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uabdl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uadalp  v0.1d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uadalp  v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uadalp  v0.2d, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uadalp  v0.2s, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uadalp  v0.4h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uadalp  v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uadalp  v0.8h, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uadalp  v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uadalp  v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddl2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddlp  v0.1d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddlp  v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddlp  v0.2d, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddlp  v0.2s, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddlp  v0.4h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddlp  v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddlp  v0.8h, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uaddw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddlp  v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddlp  v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uaddw2  v0.8h, v0.8h, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf d21, d14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf d21, d14, #64
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf s22, s13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf s22, s13, #32
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ucvtf v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uhadd v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uhadd v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uhsub v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umax  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umax  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umax  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umaxp v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umaxp v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umaxp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uhsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umax  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umax  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umax  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umaxp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umaxp v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umin  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umin  v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umin  v0.8b, v0.8b, v0.8b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uminp v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uminp v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uminp v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlal v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlal v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlal v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlal2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlal2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlal2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlsl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlsl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlsl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlsl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlsl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umlsl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umull v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umull v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umull v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umull2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umull2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     umull2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlal2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlal2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlal2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlsl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlsl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umlsl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umull2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umull2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     umull2  v0.8h, v0.16b, v0.16b
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqadd h0, h1, h5
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqadd v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshl  b11, b20, b30
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshl  s23, s20, s16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshl  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshl  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshl  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshl  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshl  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshl  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshl  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshl  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn b10, h12, #5
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn h12, s10, #14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn s10, d10, #25
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn2  v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn2  v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqrshrn2  v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshrn2  v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshrn2  v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqrshrn2  v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl b11, b20, b30
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl b18, b15, #6
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl d15, d12, #19
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl h11, h18, #7
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl s14, s19, #18
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl s23, s20, s16
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.2d, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.4s, v0.4s, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.8h, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshl v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn  b12, h10, #7
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn  h10, s14, #5
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn  s10, d12, #13
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn  v0.2s, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn  v0.4h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn  v0.8b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn2 v0.16b, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn2 v0.4s, v0.2d, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqshrn2 v0.8h, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqsub d16, d16, d16
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqsub v0.4h, v0.4h, v0.4h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn b18, h18
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn h20, s17
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn s19, d14
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn v0.2s, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn v0.4h, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn v0.8b, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn2  v0.16b, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn2  v0.4s, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uqxtn2  v0.8h, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqxtn v0.2s, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqxtn v0.4h, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqxtn v0.8b, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqxtn2  v0.16b, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqxtn2  v0.4s, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uqxtn2  v0.8h, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urecpe  v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urecpe  v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urhadd  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urhadd  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urhadd  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urecpe  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urhadd  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urhadd  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urhadd  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshl d8, d7, d4
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshl v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshl v0.2d, v0.2d, v0.2d
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshl v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshl v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr d20, d23, #31
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshr v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshr v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshr v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     urshr v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     urshr v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -      -      -     9.00    -      -      -      -      -     ursqrte v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -      -      -     9.00    -      -      -      -      -     ursqrte v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra d18, d10, #13
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ursra v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ursra v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ursra v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ursra v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ursra v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushl  d0, d0, d0
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushl  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushl  v0.4s, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushl  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushl  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushl  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushl  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushll v0.4s, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushll2  v0.8h, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushll2  v0.8h, v0.16b, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  d10, d17, #18
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushr  v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushr  v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushr  v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     ushr  v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     ushr  v0.8h, v0.8h, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  b19, b14
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  d18, d22
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  h20, h15
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  s21, s12
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usqadd  v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usqadd  v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usqadd  v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usqadd  v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usqadd  v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  d20, d13, #61
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.16b, v0.16b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.2d, v0.2d, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usra  v0.16b, v0.16b, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usra  v0.2d, v0.2d, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.2s, v0.2s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.4h, v0.4h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.4s, v0.4s, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usra  v0.4s, v0.4s, #3
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.8b, v0.8b, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usra  v0.8h, v0.8h, #3
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubl v0.2d, v0.2s, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubl v0.4s, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubl v0.8h, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubl2  v0.2d, v0.4s, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubl2  v0.4s, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubl2  v0.8h, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubw v0.2d, v0.2d, v0.2s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubw v0.4s, v0.4s, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubw v0.8h, v0.8h, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubw2  v0.2d, v0.2d, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubw2  v0.4s, v0.4s, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     usubw2  v0.8h, v0.8h, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usra  v0.8h, v0.8h, #3
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubl2  v0.2d, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubl2  v0.4s, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubl2  v0.8h, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubw2  v0.2d, v0.2d, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubw2  v0.4s, v0.4s, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     usubw2  v0.8h, v0.8h, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp1  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp1  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp1  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp1  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp1  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp2  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp2  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp2  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     uzp2  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     uzp2  v0.8h, v0.8h, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     xtn v0.2s, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     xtn v0.4h, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     xtn v0.8b, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     xtn2  v0.16b, v0.8h
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     xtn2  v0.4s, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     xtn2  v0.8h, v0.4s
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip1  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip1  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip1  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip1  v0.8h, v0.8h, v0.8h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.16b, v0.16b, v0.16b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.2d, v0.2d, v0.2d
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip1  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip2  v0.16b, v0.16b, v0.16b
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip2  v0.2d, v0.2d, v0.2d
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.2s, v0.2s, v0.2s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.4h, v0.4h, v0.4h
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.4s, v0.4s, v0.4s
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip2  v0.4s, v0.4s, v0.4s
 # CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.8b, v0.8b, v0.8b
-# CHECK-NEXT:  -      -      -      -     0.50   0.50    -      -      -      -      -      -     zip2  v0.8h, v0.8h, v0.8h
+# CHECK-NEXT:  -      -      -      -     1.00   1.00    -      -      -      -      -      -     zip2  v0.8h, v0.8h, v0.8h