[lld][AMDGPU] Handle R_AMDGPU_REL16 relocation.

[abidh]

Summary

This patch is a followup patch to https://reviews.llvm.org/D105760 which adds this relocation. This handles the relocation in lld.

The s_branch family of instruction does the following:
PC = PC + signext(simm * 4) + 4

so we we do the opposite on the target address before writing it in the instruction stream.

[MaskRay]

lld/ELF/Arch/AMDGPU.cpp

144

define the local variable as ((sval - 4) / 4) instead (with a variable rename)

lld/test/ELF/amdgpu-relocs2.s

4

See split-file in newer tests and avoid echo for long files.

26

unused .text.unlikely?

[abidh]

Handle review comments.

[abidh]

lld/test/ELF/amdgpu-relocs2.s

26

This section is used. There is a jump to cold2. The test checks that jumps both forward and backward with this relocation generates correct immediate.

[MaskRay]

lld/ELF/Arch/AMDGPU.cpp

163

reorder R_AMDGPU_REL16 before REL32

lld/test/ELF/amdgpu-relocs2.s

21

.section .text.likely,"ax"

30

ditto

[t-tye]

lld/ELF/Arch/AMDGPU.cpp

142

Is there documentation for this relocation in AMDGPUUsage.rst?

lld/ELF/Arch/AMDGPU.cpp

void AMDGPU::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
   case R_AMDGPU_ABS64:
   case R_AMDGPU_REL64:
     write64le(loc, val);
     break;
   case R_AMDGPU_GOTPCREL32_HI:
   case R_AMDGPU_REL32_HI:
     write32le(loc, val >> 32);
     break;
+  case R_AMDGPU_REL16: {
+    int64_t simm = (static_cast<int64_t>(val) - 4) / 4;
+    checkInt(loc, simm, 16, rel);
+    write16le(loc, simm);
+    break;
+  }
   default:
     llvm_unreachable("unknown relocation");
   }
 }
 
 RelExpr AMDGPU::getRelExpr(RelType type, const Symbol &s,
                            const uint8_t *loc) const {
   switch (type) {
   case R_AMDGPU_ABS32:
   case R_AMDGPU_ABS64:
     return R_ABS;
   case R_AMDGPU_REL32:
   case R_AMDGPU_REL32_LO:
   case R_AMDGPU_REL32_HI:
   case R_AMDGPU_REL64:
+  case R_AMDGPU_REL16:
     return R_PC;
   case R_AMDGPU_GOTPCREL:
   case R_AMDGPU_GOTPCREL32_LO:
   case R_AMDGPU_GOTPCREL32_HI:
     return R_GOT_PC;
   default:
     error(getErrorLocation(loc) + "unknown relocation (" + Twine(type) +
           ") against symbol " + toString(s));

lld/test/ELF/amdgpu-relocs2.s

+# REQUIRES: amdgpu
+# RUN: split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=amdgcn--amdhsa -mcpu=fiji %t/asm -o %t.o
+# RUN: ld.lld %t.o -o %t/out --script %t/script
+# RUN: llvm-objdump -d %t/out | FileCheck %s
+
+
+#--- script
+SECTIONS {
+  . = 0x1000;
+  .text.likely : { *(.text.likely) }
+  . = 0x2000;
+  .text : { *(.text) }
+  . = 0x3000;
+  .text.unlikely : { *(.text.unlikely) }
+}
+
+
+#--- asm
+.section .text.likely
+hot1:
+  s_add_i32 s15, s15, 1
+hot2:
+  s_add_i32 s13, s13, 1
+.text
+foo:
+  s_branch cold2
+  s_branch hot2
+.section .text.unlikely
+cold1:
+  s_add_i32 s15, s15, 1
+  s_add_i32 s14, s14, 1
+cold2:
+  s_add_i32 s13, s13, 1
+
+# CHECK:  <foo>
+# CHECK-NEXT: s_branch 1025
+# CHECK-NEXT: s_branch 64511