[X86] add dwarf information for loop stack probe

[YangKeao]

Summary

This patch only contains the implementation for 64-bit
architecture. Because r11d cannot be used in 32-bit
architecture and I don't know why (and in which step)
the r11d register is rewritten to work on 32-bit 😢, but it
doesn't cover dwarf annotation.

As discussed in D98789, we cannot find a register unconditionally
safe in 32-bit, so I left this problem for further discussion.
nagisa's D98999 is an attemption to solve this problem.

Signed-off-by: YangKeao <[e-mail]>

[YangKeao]

@nagisa This is another part of D98789, and is only implemented for 64-bit platform.

[pengfei]

Better to rebase it since many changes had committed with D99579.

[YangKeao]

rebase origin/main

[YangKeao]

In D99585#2700778, @pengfei wrote:

Better to rebase it since many changes had committed with D99579.

Done. A fast rebase without changing anything 🍻

[YangKeao]

Please correct me if I'm wrong. I realize that generating a DWARF message based on r11d doesn't help the unwinder to get a correct backtrace.

In most case, the unwinder got an RIP register, parse the .eh_frames table and use it to find the address of "return address". The pointer to the "return address" (called ax1) is usually "CFA - 8" and by dereferencing it, we can get a parent IP address (usually is 5 bytes more than the call instruction location). Then it uses the parent IP as the new RIP address and find the representation of the new pointer to the return address, which could also be "CFA - 8". The problem is that if "CFA" is calculated through r11, the unwinder will have no chance to know what r11 is at that RIP. But the unwinder could know the rsp at that RIP, because the RSP is ax1 - 8.

[YangKeao]

Oops. Sorry, it doesn't matter. The stack probing part will never be a parent frame of anything, so it would still be nice as it's the first frame to unwind. This patch is still good 🍻 .

[YangKeao]

Does anyone know why the unit test failed?

[YangKeao]

As https://reviews.llvm.org/rGa8ac117d98f6548635b18b58159c9cfb31ba4762 is committed, I will close this revision.

llvm/lib/Target/X86/X86FrameLowering.h

public:
 
   Register getInitialCFARegister(const MachineFunction &MF) const override;
 
   /// Return true if the function has a redzone (accessible bytes past the
   /// frame of the top of stack function) as part of it's ABI.
   bool has128ByteRedZone(const MachineFunction& MF) const;
 
 private:
+  bool isWin64Prologue(const MachineFunction &MF) const;
+
+  bool needsDwarfCFI(const MachineFunction &MF) const;
+
   uint64_t calculateMaxStackAlign(const MachineFunction &MF) const;
 
   /// Emit target stack probe as a call to a helper function
   void emitStackProbeCall(MachineFunction &MF, MachineBasicBlock &MBB,
                           MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
                           bool InProlog) const;
 
   /// Emit target stack probe as an inline sequence.

llvm/lib/Target/X86/X86FrameLowering.cpp

 }
 
 void X86FrameLowering::emitStackProbeInlineGenericLoop(
     MachineFunction &MF, MachineBasicBlock &MBB,
     MachineBasicBlock::iterator MBBI, const DebugLoc &DL, uint64_t Offset,
     uint64_t AlignOffset) const {
   assert(Offset && "null offset");
 
+  const bool NeedsDwarfCFI = needsDwarfCFI(MF);
+  const bool HasFP = hasFP(MF);
   const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
   const X86TargetLowering &TLI = *STI.getTargetLowering();
   const unsigned MovMIOpc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
   const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
 
   if (AlignOffset) {
     if (AlignOffset < StackProbeSize) {
       // Perform a first smaller allocation followed by a probe.
void X86FrameLowering::emitStackProbeInlineGenericLoop(
 
   Register FinalStackProbed = Uses64BitFramePtr ? X86::R11 : X86::R11D;
   BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::COPY), FinalStackProbed)
       .addReg(StackPtr)
       .setMIFlag(MachineInstr::FrameSetup);
 
   // save loop bound
   {
+    const unsigned BoundOffset = Offset / StackProbeSize * StackProbeSize;
     const unsigned SUBOpc = getSUBriOpcode(Uses64BitFramePtr, Offset);
     BuildMI(MBB, MBBI, DL, TII.get(SUBOpc), FinalStackProbed)
         .addReg(FinalStackProbed)
-        .addImm(Offset / StackProbeSize * StackProbeSize)
+        .addImm(BoundOffset)
         .setMIFlag(MachineInstr::FrameSetup);
+
+    // TODO: generate DWARF information for 32bit architecture
+    // didn't generate dwarf information on 32bit, because R11D is not usable
+    // and decide a safe register could be complicate or with extra cost
+    if (!HasFP && NeedsDwarfCFI && Uses64BitFramePtr) {
+      BuildCFI(MBB, MBBI, DL,
+               MCCFIInstruction::createDefCfaRegister(
+                   nullptr, TRI->getDwarfRegNum(FinalStackProbed, true)));
+      BuildCFI(MBB, MBBI, DL,
+               MCCFIInstruction::createAdjustCfaOffset(nullptr, BoundOffset));
+    }
   }
 
   // allocate a page
   {
     const unsigned SUBOpc = getSUBriOpcode(Uses64BitFramePtr, StackProbeSize);
     BuildMI(testMBB, DL, TII.get(SUBOpc), StackPtr)
         .addReg(StackPtr)
         .addImm(StackProbeSize)
void X86FrameLowering::emitStackProbeInlineGenericLoop(
 
   // BB management
   tailMBB->splice(tailMBB->end(), &MBB, MBBI, MBB.end());
   tailMBB->transferSuccessorsAndUpdatePHIs(&MBB);
   MBB.addSuccessor(testMBB);
 
   // handle tail
   unsigned TailOffset = Offset % StackProbeSize;
+  MachineBasicBlock::iterator TailMBBIter = tailMBB->begin();
   if (TailOffset) {
     const unsigned Opc = getSUBriOpcode(Uses64BitFramePtr, TailOffset);
-    BuildMI(*tailMBB, tailMBB->begin(), DL, TII.get(Opc), StackPtr)
+    BuildMI(*tailMBB, TailMBBIter, DL, TII.get(Opc), StackPtr)
         .addReg(StackPtr)
         .addImm(TailOffset)
         .setMIFlag(MachineInstr::FrameSetup);
   }
 
+  // TODO: generate DWARF information for 32bit architecture
+  // didn't generate dwarf information on 32bit, because R11D is not usable
+  // and decide a safe register could be complicate or with extra cost
+  if (!HasFP && NeedsDwarfCFI && Uses64BitFramePtr) {
+    BuildCFI(*tailMBB, TailMBBIter, DL,
+             MCCFIInstruction::createDefCfaRegister(
+                 nullptr, TRI->getDwarfRegNum(StackPtr, true)));
+  }
   // Update Live In information
   recomputeLiveIns(*testMBB);
   recomputeLiveIns(*tailMBB);
 }
 
 void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
     MachineFunction &MF, MachineBasicBlock &MBB,
     MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
   // clobbered by any interrupt handler.
   assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
          "MF used frame lowering for wrong subtarget");
   const Function &Fn = MF.getFunction();
   const bool IsWin64CC = STI.isCallingConvWin64(Fn.getCallingConv());
   return Is64Bit && !IsWin64CC && !Fn.hasFnAttribute(Attribute::NoRedZone);
 }
 
+bool X86FrameLowering::isWin64Prologue(const MachineFunction &MF) const {
+  return MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
+}
+
+bool X86FrameLowering::needsDwarfCFI(const MachineFunction &MF) const {
+  return !isWin64Prologue(MF) && MF.needsFrameMoves();
+}
 
 /// emitPrologue - Push callee-saved registers onto the stack, which
 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
 /// space for local variables. Also emit labels used by the exception handler to
 /// generate the exception handling frames.
 
 /*
   Here's a gist of what gets emitted:
void X86FrameLowering::emitPrologue(MachineFunction &MF,
   bool IsFunclet = MBB.isEHFuncletEntry();
   EHPersonality Personality = EHPersonality::Unknown;
   if (Fn.hasPersonalityFn())
     Personality = classifyEHPersonality(Fn.getPersonalityFn());
   bool FnHasClrFunclet =
       MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
   bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
   bool HasFP = hasFP(MF);
-  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
+  bool IsWin64Prologue = isWin64Prologue(MF);
   bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry();
   // FIXME: Emit FPO data for EH funclets.
   bool NeedsWinFPO =
       !IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
   bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
-  bool NeedsDwarfCFI = !IsWin64Prologue && MF.needsFrameMoves();
+  bool NeedsDwarfCFI = needsDwarfCFI(MF);
   Register FramePtr = TRI->getFrameRegister(MF);
   const Register MachineFramePtr =
       STI.isTarget64BitILP32()
           ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr;
   Register BasePtr = TRI->getBaseRegister();
   bool HasWinCFI = false;
 
   // Debug location must be unknown since the first debug location is used

llvm/test/CodeGen/X86/stack-clash-large.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
 ; RUN: llc -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X86-64 %s
 ; RUN: llc -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86-32 %s
 
 define i32 @foo() local_unnamed_addr #0 {
 ; CHECK-X86-64-LABEL: foo:
 ; CHECK-X86-64:       # %bb.0:
 ; CHECK-X86-64-NEXT:    movq %rsp, %r11
 ; CHECK-X86-64-NEXT:    subq $69632, %r11 # imm = 0x11000
+; CHECK-X86-64-NEXT:    .cfi_def_cfa_register %r11
+; CHECK-X86-64-NEXT:    .cfi_adjust_cfa_offset 69632
 ; CHECK-X86-64-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
 ; CHECK-X86-64-NEXT:    subq $4096, %rsp # imm = 0x1000
 ; CHECK-X86-64-NEXT:    movq $0, (%rsp)
 ; CHECK-X86-64-NEXT:    cmpq %r11, %rsp
 ; CHECK-X86-64-NEXT:    jne .LBB0_1
 ; CHECK-X86-64-NEXT:  # %bb.2:
 ; CHECK-X86-64-NEXT:    subq $2248, %rsp # imm = 0x8C8
+; CHECK-X86-64-NEXT:    .cfi_def_cfa_register %rsp
 ; CHECK-X86-64-NEXT:    .cfi_def_cfa_offset 71888
 ; CHECK-X86-64-NEXT:    movl $1, 264(%rsp)
 ; CHECK-X86-64-NEXT:    movl $1, 28664(%rsp)
 ; CHECK-X86-64-NEXT:    movl -128(%rsp), %eax
 ; CHECK-X86-64-NEXT:    addq $71880, %rsp # imm = 0x118C8
 ; CHECK-X86-64-NEXT:    .cfi_def_cfa_offset 8
 ; CHECK-X86-64-NEXT:    retq
 ;