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[ARM] Add FP handling for MVE lane interleaving

Authored by dmgreen on Feb 23 2021, 7:15 AM.



FP16 to FP32 converts can be handled in MVE lane interleaving, much like the sext/zext lowering we do. This expands the pass with fpext and fptrunc handling, and basic fp operations allowing more efficient lowering of fp vectors.

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dmgreen created this revision.Feb 23 2021, 7:15 AM
dmgreen requested review of this revision.Feb 23 2021, 7:15 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 23 2021, 7:15 AM
SjoerdMeijer added inline comments.Mon, Apr 12, 12:42 AM

Can you clarify this a bit? I am no following the "extra VCVT's" => "cheap" reasoning. I am guessing you meant expensive?

dmgreen updated this revision to Diff 336792.Mon, Apr 12, 3:35 AM

Yep. "cheap" -> "beneficial to convert"

SjoerdMeijer accepted this revision.Mon, Apr 12, 3:39 AM

Thanks, LGTM

This revision is now accepted and ready to land.Mon, Apr 12, 3:39 AM
This revision was automatically updated to reflect the committed changes.