[AArch64] Fix Copy Elemination for negative values

[tmatheson]

Summary

Redundant Copy Elimination was eliminating a MOVi32imm -1 when it
determined that the value of the destination register is already -1.
However, it didn't take into account that the MOVi32imm zeroes the upper
32 bits (which are FFFFFFFF) and therefore cannot be eliminated.

[tmatheson]

Remove whitespace

[tmatheson]

Rebased

[tmatheson]

I don't have commit access yet, so if somebody would be willing to commit this for me that would be greatly appreciated. The author should be "Tomas Matheson <[e-mail]>".

[paulwalker-arm]

I'll wait to give other reviewers a chance to comment, but otherwise I'll commit it for you tomorrow.

llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp

 //=- AArch64RedundantCopyElimination.cpp - Remove useless copy for AArch64 -=//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 // This pass removes unnecessary copies/moves in BBs based on a dominating
 // condition.
if (IsCopy || IsMoveImm) {
             // Don't remove a move immediate that implicitly defines the upper
             // bits when only the lower 32 bits are known.
             MCPhysReg CmpReg = KnownReg.Reg;
             if (any_of(MI->implicit_operands(), [CmpReg](MachineOperand &O) {
                   return !O.isDead() && O.isReg() && O.isDef() &&
                          O.getReg() != CmpReg;
                 }))
               continue;
+
+            // Don't remove a move immediate that implicitly defines the upper
+            // bits as different.
+            if (TRI->isSuperRegister(DefReg, KnownReg.Reg) && KnownReg.Imm < 0)
+              continue;
           }
 
           if (IsCopy)
             LLVM_DEBUG(dbgs() << "Remove redundant Copy : " << *MI);
           else
             LLVM_DEBUG(dbgs() << "Remove redundant Move : " << *MI);
 
           MI->eraseFromParent();

llvm/test/CodeGen/AArch64/machine-copy-remove.mir

bb.1:
     liveins: $x1
 
     $x0 = MOVi64imm -1
     STRXui killed $x0, killed $x1, 0
 
   bb.2:
     RET_ReallyLR
 ...
-# Eliminate redundant MOVi32imm -1 in bb.1
+# Don't eliminate redundant MOVi32imm -1 in bb.1: the upper bits are nonzero.
 # Note: 64-bit compare/32-bit move imm
 # Kill marker should be removed from compare.
 # CHECK-LABEL: name: test21
-# CHECK: ADDSXri $x0, 1, 0, implicit-def $nzcv
+# CHECK: ADDSXri killed $x0, 1, 0, implicit-def $nzcv
 # CHECK: bb.1:
-# CHECK-NOT: MOVi32imm
+# CHECK: MOVi32imm
 name:            test21
 tracksRegLiveness: true
 body:             |
   bb.0.entry:
     liveins: $x0, $x1
 
     dead $xzr = ADDSXri killed $x0, 1, 0, implicit-def $nzcv
     Bcc 1, %bb.2, implicit killed $nzcv