Adds patterns to catch masks preceeding a long multiply,
and generating a single umull/smull instruction instead.
Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
| Time | Test | |
|---|---|---|
| 390 ms | linux > HWAddressSanitizer-x86_64.TestCases::sizes.cpp Script:
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: 'RUN: at line 3'; /mnt/disks/ssd0/agent/llvm-project/build/./bin/clang --driver-mode=g++ -m64 -gline-tables-only -fsanitize=hwaddress -fuse-ld=lld -mcmodel=large -mllvm -hwasan-globals -mllvm -hwasan-use-short-granules -mllvm -hwasan-instrument-landing-pads=0 -mllvm -hwasan-instrument-personality-functions /mnt/disks/ssd0/agent/llvm-project/compiler-rt/test/hwasan/TestCases/sizes.cpp -nostdlib++ -lstdc++ -o /mnt/disks/ssd0/agent/llvm-project/build/projects/compiler-rt/test/hwasan/X86_64/TestCases/Output/sizes.cpp.tmp
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| 400 ms | windows > LLVM.CodeGen/AMDGPU::ds_read2.ll Script:
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: 'RUN: at line 2'; c:\ws\w16n2-1\llvm-project\premerge-checks\build\bin\llc.exe -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt < C:\ws\w16n2-1\llvm-project\premerge-checks\llvm\test\CodeGen\AMDGPU\ds_read2.ll | c:\ws\w16n2-1\llvm-project\premerge-checks\build\bin\filecheck.exe -enable-var-scope -check-prefixes=GCN,CI C:\ws\w16n2-1\llvm-project\premerge-checks\llvm\test\CodeGen\AMDGPU\ds_read2.ll
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Event Timeline
Comment Actions
Looks nice to me. Is it worth adding mul (sext_inreg, sext i32) patterns too in case one operand is sext and the other is being masked? mul is commutative so I think it would only be two extra patterns, one for sext and one for zext.
| llvm/lib/Target/AArch64/AArch64InstrInfo.td | ||
|---|---|---|
| 1479 | Nit: Can you line up the ('s for the input and the output | |
Comment Actions
Looks nice to me. Is it worth adding mul (sext_inreg, sext i32) patterns too in case one operand is sext and the other is being masked? mul is commutative so I think it would only be two extra patterns, one for sext and one for zext.
Added, though I did have some difficulties hand-crafting something that would use these patterns (hence no specific tests)
| llvm/lib/Target/AArch64/AArch64InstrInfo.td | ||
|---|---|---|
| 1479 | Parentheses aligned and output put types added, thanks :) | |
Comment Actions
Something like https://godbolt.org/z/q376ob maybe?
| llvm/lib/Target/AArch64/AArch64InstrInfo.td | ||
|---|---|---|
| 1480 | GPR32 I think, for the sext input. And then the output can use the GPR32 directly. Like the SMADDLrrr pattern below. | |
| llvm/lib/Target/AArch64/AArch64InstrInfo.td | ||
|---|---|---|
| 1483 | This pattern isn't needed I don't think. The other four you have here look good to me, but I would remove the whitespace and maybe reorder them. | |
| llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll | ||
| 24 | Can you add a commuted test too, where the and and the conv are used the other way around. Same for smull. They should match automatically I think, with the patterns that are already here. | |
Comment Actions
This pattern isn't needed I don't think
Removed
but I would remove the whitespace and maybe reorder them.
Done
Can you add a commuted test too
Added, the patterns do indeed match