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Differential D89163

[X86][test] Add a regression test for lock cmpxchg16b on a global variable with offset
ClosedPublic

Authored by MaskRay on Oct 9 2020, 2:06 PM.

Details

Reviewers
craig.topper
Commits
rG488f1c48937c: [X86][test] Add a regression test for lock cmpxchg16b on a global variable with…
Summary

Add a test for a bug (uncovered by D88808) fixed by f34bb06935aa3bab353d70d515b767fdd2f5625c.
Also delete cmpxchg16b.ll which is covered by atomic128.ll

Diff Detail

Unit TestsFailed

TimeTest
4,260 mswindows > Clang-Unit.DirectoryWatcher/_/DirectoryWatcherTests_exe::DirectoryWatcherTest.AddFiles
3,970 mswindows > Clang-Unit.DirectoryWatcher/_/DirectoryWatcherTests_exe::DirectoryWatcherTest.DeleteFile
4,040 mswindows > Clang-Unit.DirectoryWatcher/_/DirectoryWatcherTests_exe::DirectoryWatcherTest.ModifyFile

Event Timeline

MaskRay created this revision.Oct 9 2020, 2:06 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 9 2020, 2:06 PM
Herald added subscribers: llvm-commits, pengfei, jfb. · View Herald Transcript
MaskRay requested review of this revision.Oct 9 2020, 2:06 PM
craig.topper added a comment.Oct 9 2020, 2:18 PM

Thanks for the test.

llvm/test/CodeGen/X86/atomic128.ll
86

Drop dso_local and the #0?

90

Can we add nounwind to drop the cfi directives?

Harbormaster completed remote builds in B74658: Diff 297334.Oct 9 2020, 2:41 PM
MaskRay updated this revision to Diff 297340.Oct 9 2020, 2:52 PM

Drop dso_local
Add nounwind

craig.topper accepted this revision.Oct 9 2020, 3:14 PM

LGTM

This revision is now accepted and ready to land.Oct 9 2020, 3:14 PM
Harbormaster completed remote builds in B74661: Diff 297340.Oct 9 2020, 3:29 PM
This revision was landed with ongoing or failed builds.Oct 9 2020, 3:46 PM
Closed by commit rG488f1c48937c: [X86][test] Add a regression test for lock cmpxchg16b on a global variable with… (authored by MaskRay). · Explain Why
This revision was automatically updated to reflect the committed changes.
MaskRay added a commit: rG488f1c48937c: [X86][test] Add a regression test for lock cmpxchg16b on a global variable with….

Revision Contents

PathSize
llvm/
test/
CodeGen/
X86/
81 lines

Diff 297340

llvm/test/CodeGen/X86/atomic128.ll

Show First 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; CHECK32-NEXT: popl %edi ; CHECK32-NEXT: popl %edi
; CHECK32-NEXT: .cfi_def_cfa_offset 4 ; CHECK32-NEXT: .cfi_def_cfa_offset 4
; CHECK32-NEXT: retl $4 ; CHECK32-NEXT: retl $4
%pair = cmpxchg i128* %p, i128 %oldval, i128 %newval acquire acquire %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval acquire acquire
%val = extractvalue { i128, i1 } %pair, 0 %val = extractvalue { i128, i1 } %pair, 0
ret i128 %val ret i128 %val
} }
@cmpxchg16b_global = external dso_local global { i128, i128 }, align 16
;; Make sure we retain the offset of the global variable.
define void @cmpxchg16b_global_with_offset() nounwind {
craig.topperUnsubmitted
Not Done
ReplyInline Actions

Drop dso_local and the #0?

craig.topper: Drop dso_local and the #0?
; CHECK-LABEL: cmpxchg16b_global_with_offset:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: xorl %eax, %eax
craig.topperUnsubmitted
Not Done
ReplyInline Actions

Can we add nounwind to drop the cfi directives?

craig.topper: Can we add nounwind to drop the cfi directives?
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: lock cmpxchg16b _cmpxchg16b_global+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq
;
; CHECK32-LABEL: cmpxchg16b_global_with_offset:
; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: subl $36, %esp
; CHECK32-NEXT: leal {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $0
; CHECK32-NEXT: pushl $cmpxchg16b_global+16
; CHECK32-NEXT: pushl %eax
; CHECK32-NEXT: calll __sync_val_compare_and_swap_16
; CHECK32-NEXT: addl $72, %esp
; CHECK32-NEXT: retl
entry:
%0 = load atomic i128, i128* getelementptr inbounds ({i128, i128}, {i128, i128}* @cmpxchg16b_global, i64 0, i32 1) acquire, align 16
ret void
}
define void @fetch_and_nand(i128* %p, i128 %bits) { define void @fetch_and_nand(i128* %p, i128 %bits) {
; CHECK-LABEL: fetch_and_nand: ; CHECK-LABEL: fetch_and_nand:
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB1_1: ## %atomicrmw.start ; CHECK-NEXT: LBB2_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: andq %r8, %rcx ; CHECK-NEXT: andq %r8, %rcx
; CHECK-NEXT: movq %rax, %rbx ; CHECK-NEXT: movq %rax, %rbx
; CHECK-NEXT: andq %rsi, %rbx ; CHECK-NEXT: andq %rsi, %rbx
; CHECK-NEXT: notq %rbx ; CHECK-NEXT: notq %rbx
; CHECK-NEXT: notq %rcx ; CHECK-NEXT: notq %rcx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB1_1 ; CHECK-NEXT: jne LBB2_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_nand: ; CHECK32-LABEL: fetch_and_nand:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
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; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB2_1: ## %atomicrmw.start ; CHECK-NEXT: LBB3_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rbx ; CHECK-NEXT: movq %rax, %rbx
; CHECK-NEXT: orq %rsi, %rbx ; CHECK-NEXT: orq %rsi, %rbx
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: orq %r8, %rcx ; CHECK-NEXT: orq %r8, %rcx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB2_1 ; CHECK-NEXT: jne LBB3_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_or: ; CHECK32-LABEL: fetch_and_or:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
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; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB3_1: ## %atomicrmw.start ; CHECK-NEXT: LBB4_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rbx ; CHECK-NEXT: movq %rax, %rbx
; CHECK-NEXT: addq %rsi, %rbx ; CHECK-NEXT: addq %rsi, %rbx
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: adcq %r8, %rcx ; CHECK-NEXT: adcq %r8, %rcx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB3_1 ; CHECK-NEXT: jne LBB4_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_add: ; CHECK32-LABEL: fetch_and_add:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
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; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB4_1: ## %atomicrmw.start ; CHECK-NEXT: LBB5_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rbx ; CHECK-NEXT: movq %rax, %rbx
; CHECK-NEXT: subq %rsi, %rbx ; CHECK-NEXT: subq %rsi, %rbx
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: sbbq %r8, %rcx ; CHECK-NEXT: sbbq %r8, %rcx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB4_1 ; CHECK-NEXT: jne LBB5_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_sub: ; CHECK32-LABEL: fetch_and_sub:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
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; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB5_1: ## %atomicrmw.start ; CHECK-NEXT: LBB6_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi ; CHECK-NEXT: cmpq %rax, %rsi
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: sbbq %rdx, %rcx ; CHECK-NEXT: sbbq %rdx, %rcx
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: cmovgeq %rdx, %rcx ; CHECK-NEXT: cmovgeq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: cmovgeq %rax, %rbx ; CHECK-NEXT: cmovgeq %rax, %rbx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB5_1 ; CHECK-NEXT: jne LBB6_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_min: ; CHECK32-LABEL: fetch_and_min:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB6_1: ## %atomicrmw.start ; CHECK-NEXT: LBB7_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi ; CHECK-NEXT: cmpq %rax, %rsi
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: sbbq %rdx, %rcx ; CHECK-NEXT: sbbq %rdx, %rcx
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: cmovlq %rdx, %rcx ; CHECK-NEXT: cmovlq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: cmovlq %rax, %rbx ; CHECK-NEXT: cmovlq %rax, %rbx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB6_1 ; CHECK-NEXT: jne LBB7_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_max: ; CHECK32-LABEL: fetch_and_max:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB7_1: ## %atomicrmw.start ; CHECK-NEXT: LBB8_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi ; CHECK-NEXT: cmpq %rax, %rsi
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: sbbq %rdx, %rcx ; CHECK-NEXT: sbbq %rdx, %rcx
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: cmovaeq %rdx, %rcx ; CHECK-NEXT: cmovaeq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: cmovaeq %rax, %rbx ; CHECK-NEXT: cmovaeq %rax, %rbx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB7_1 ; CHECK-NEXT: jne LBB8_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_umin: ; CHECK32-LABEL: fetch_and_umin:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; CHECK: ## %bb.0: ; CHECK: ## %bb.0:
; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %r8 ; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB8_1: ## %atomicrmw.start ; CHECK-NEXT: LBB9_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi ; CHECK-NEXT: cmpq %rax, %rsi
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: sbbq %rdx, %rcx ; CHECK-NEXT: sbbq %rdx, %rcx
; CHECK-NEXT: movq %r8, %rcx ; CHECK-NEXT: movq %r8, %rcx
; CHECK-NEXT: cmovbq %rdx, %rcx ; CHECK-NEXT: cmovbq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: cmovbq %rax, %rbx ; CHECK-NEXT: cmovbq %rax, %rbx
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB8_1 ; CHECK-NEXT: jne LBB9_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: movq %rax, {{.*}}(%rip) ; CHECK-NEXT: movq %rax, {{.*}}(%rip)
; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip) ; CHECK-NEXT: movq %rdx, _var+{{.*}}(%rip)
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: fetch_and_umax: ; CHECK32-LABEL: fetch_and_umax:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
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; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB11_1: ## %atomicrmw.start ; CHECK-NEXT: LBB12_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB11_1 ; CHECK-NEXT: jne LBB12_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: atomic_store_seq_cst: ; CHECK32-LABEL: atomic_store_seq_cst:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
; CHECK32-NEXT: subl $36, %esp ; CHECK32-NEXT: subl $36, %esp
; CHECK32-NEXT: .cfi_adjust_cfa_offset 36 ; CHECK32-NEXT: .cfi_adjust_cfa_offset 36
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; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB12_1: ## %atomicrmw.start ; CHECK-NEXT: LBB13_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB12_1 ; CHECK-NEXT: jne LBB13_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: atomic_store_release: ; CHECK32-LABEL: atomic_store_release:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
; CHECK32-NEXT: subl $36, %esp ; CHECK32-NEXT: subl $36, %esp
; CHECK32-NEXT: .cfi_adjust_cfa_offset 36 ; CHECK32-NEXT: .cfi_adjust_cfa_offset 36
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; CHECK-NEXT: pushq %rbx ; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbx, -16 ; CHECK-NEXT: .cfi_offset %rbx, -16
; CHECK-NEXT: movq %rdx, %rcx ; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movq %rsi, %rbx ; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: movq (%rdi), %rax ; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx ; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90 ; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: LBB13_1: ## %atomicrmw.start ; CHECK-NEXT: LBB14_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: lock cmpxchg16b (%rdi) ; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: jne LBB13_1 ; CHECK-NEXT: jne LBB14_1
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end ; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
; CHECK-NEXT: popq %rbx ; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; CHECK32-LABEL: atomic_store_relaxed: ; CHECK32-LABEL: atomic_store_relaxed:
; CHECK32: # %bb.0: ; CHECK32: # %bb.0:
; CHECK32-NEXT: subl $36, %esp ; CHECK32-NEXT: subl $36, %esp
; CHECK32-NEXT: .cfi_adjust_cfa_offset 36 ; CHECK32-NEXT: .cfi_adjust_cfa_offset 36
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llvm/test/CodeGen/X86/cmpxchg16b.ll

  • This file was deleted.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefixes=CHECK
; Basic 128-bit cmpxchg
define void @t1(i128* nocapture %p) nounwind ssp {
; CHECK-LABEL: t1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl $1, %ebx
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: lock cmpxchg16b (%rdi)
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: retq
entry:
%r = cmpxchg i128* %p, i128 0, i128 1 seq_cst seq_cst
ret void
}
; FIXME: Handle 128-bit atomicrmw/load atomic/store atomic
llvm/test/CodeGen/X86/atomic128.ll