[AArch64][SVE] Fix frame offset calculation when d8 is saved.

[efriedma]

Summary

If d8 is saved, the fp is not actually adjacent to the SVE spills/allocations. Fix the offset calculation to account for this offset.

[resistor]

Nice catch, LGTM.

[sdesmalen]

LGTM, thanks for fixing!

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

if (AFI->hasStackFrame() && !isSVE) {
     }
   }
 
   assert(((isFixed || isCSR) || !RegInfo->needsStackRealignment(MF) || !UseFP) &&
          "In the presence of dynamic stack pointer realignment, "
          "non-argument/CSR objects cannot be accessed through the frame pointer");
 
   if (isSVE) {
-    int64_t OffsetToSVEArea =
+    int64_t OffsetFromSPToSVEArea =
         MFI.getStackSize() - AFI->getCalleeSavedStackSize();
-    StackOffset FPOffset = {ObjectOffset, MVT::nxv1i8};
+    int64_t OffsetFromFPToSVEArea =
+        -AFI->getCalleeSaveBaseToFrameRecordOffset();
+    StackOffset FPOffset = StackOffset(OffsetFromFPToSVEArea, MVT::i8) +
+                           StackOffset(ObjectOffset, MVT::nxv1i8);
     StackOffset SPOffset = SVEStackSize +
                            StackOffset(ObjectOffset, MVT::nxv1i8) +
-                           StackOffset(OffsetToSVEArea, MVT::i8);
+                           StackOffset(OffsetFromSPToSVEArea, MVT::i8);
     // Always use the FP for SVE spills if available and beneficial.
     if (hasFP(MF) &&
         (SPOffset.getBytes() ||
          FPOffset.getScalableBytes() < SPOffset.getScalableBytes() ||
          RegInfo->needsStackRealignment(MF))) {
       FrameReg = RegInfo->getFrameRegister(MF);
       return FPOffset;
     }

llvm/test/CodeGen/AArch64/framelayout-sve.mir

--- |
   define void @test_stack_arg_sve() { entry: unreachable }
   define void @test_address_sve_out_of_range() { entry: unreachable }
   define void @test_address_gpr_vla() { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_pregs_sve() { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_zregs_sve() { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_sve() { entry: unreachable }
   define aarch64_sve_vector_pcs void @save_restore_sve_realign() { entry: unreachable }
   define aarch64_sve_vector_pcs void @frame_layout() { entry: unreachable }
+  define void @fp_relative_index_with_float_save() { entry: unreachable }
 
 ...
 # +----------+
 # |scratchreg|  // x29 is used as scratch reg.
 # +----------+
 # | %stack.0 |  // scalable SVE object of n * 18 bytes, aligned to 16 bytes,
 # |          |  // to be materialized with 2*ADDVL (<=> 2 * n * 16bytes)
 # +----------+
bb.0.entry:
     $z8  = IMPLICIT_DEF
     $z23 = IMPLICIT_DEF
     $p4  = IMPLICIT_DEF
     $p15 = IMPLICIT_DEF
 
     RET_ReallyLR
 
 ---
+# Make sure we account for the offset between the fp and the sve area, if it exists.
+# FIXME: Should there be an offset?
+# CHECK-LABEL: name: fp_relative_index_with_float_save
+# CHECK:        - { id: 0, name: '', type: default, offset: -16, size: 16, alignment: 16,
+# CHECK-NEXT:       stack-id: sve-vec
+# CHECK:        - { id: 1, name: '', type: default, offset: -64, size: 16, alignment: 32,
+# CHECK-NEXT:      stack-id: default
+# CHECK:        - { id: 2, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
+# CHECK-NEXT:      stack-id: default, callee-saved-register: '$lr'
+# CHECK:        - { id: 3, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
+# CHECK-NEXT:      stack-id: default, callee-saved-register: '$fp'
+# CHECK:        - { id: 4, name: '', type: spill-slot, offset: -32, size: 8, alignment: 16,
+# CHECK-NEXT:      stack-id: default, callee-saved-register: '$d8'
+
+# CHECK: $x8 = SUBXri $fp, 16, 0
+# CHECK: STR_ZXI $z0, killed $x8, -1
+
+name: fp_relative_index_with_float_save
+stack:
+  - { id: 0, stack-id: sve-vec, size: 16, alignment: 16 }
+  - { id: 1, stack-id: default, size: 16, alignment: 32 }
+frameInfo:
+  maxAlignment:  16
+  isFrameAddressTaken: true
+body:             |
+  bb.0.entry:
+    liveins: $z0
+
+    $d8 = IMPLICIT_DEF
+
+    STR_ZXI $z0, %stack.0, 0
+
+    RET_ReallyLR
+---