[AMDGPU] Spill register and offset register cannot be same

[hsmhsm]

Summary

Mark spill register as used so we will not choose it as offset register,
Otherwise, spill register may possibly get killed even before spill

[arsenm]

Needs test

[hsmhsm]

Added LLVM lit test

[arsenm]

llvm/test/CodeGen/AMDGPU/frame-pointer-spill.mir

5

Could use better name and comment what this is testing

7–46

You don't need most of these fields, probably just the stack related ones in machineFunctionInfo and tracksRegLiveness

47

Why do you need so many stack objects? Can you just add one artificial object that's big enough to force the huge frame?

[hsmhsm]

Fixed further review comments by Matt

[hsmhsm]

Add a comment

[hsmhsm]

Looks like this patch and the patch https://reviews.llvm.org/D85772 fix the same issue. Me and Austin discussed about it, and decided to go ahead with https://reviews.llvm.org/D85772 instead of this patch. So, I will close this patch once https://reviews.llvm.org/D85772 is merged.

[arsenm]

Can this be abandoned now?

[hsmhsm]

The fix is already taken care in the patch https://reviews.llvm.org/D85772, hence, I am closing this patch.

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::BUFFER_STORE_DWORD_OFFSET))
       .addImm(0) // slc
       .addImm(0) // tfe
       .addImm(0) // dlc
       .addImm(0) // swz
       .addMemOperand(MMO);
     return;
   }
 
+  // Mark spill register as used so we will not choose it as `OffsetReg`,
+  // Otherwise, spill register may possibly get killed even before spill
+  LiveRegs.addReg(SpillReg);
+
   MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister(
     MF->getRegInfo(), LiveRegs, AMDGPU::VGPR_32RegClass);
 
   BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::V_MOV_B32_e32), OffsetReg)
     .addImm(Offset);
 
   BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::BUFFER_STORE_DWORD_OFFEN))
     .addReg(SpillReg, RegState::Kill)

llvm/test/CodeGen/AMDGPU/frame-pointer-spill.mir

+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=prologepilog -verify-machineinstrs %s -o - | FileCheck -check-prefixes=CHECK,GFX9 %s
+
+# copying of frame pointer followed by copying of stack offset should happen to two different registers (say, $vgpr4 and $vgpr5)
+
+---
+name:            frame_pointer_register_different_from_offset_register
+tracksRegLiveness: true
+frameInfo:
+  hasCalls:        true
+machineFunctionInfo:
+  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
+  frameOffsetReg:  '$sgpr33'
+  stackPtrOffsetReg: '$sgpr32'
+stack:
+  - { id: 0, name: '', type: default, offset: 0, size: 30000,
+      alignment: 16, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      local-offset: 0, debug-info-variable: '', debug-info-expression: '',
+      debug-info-location: '' }
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr63, $sgpr30_sgpr31
+
+    ; CHECK-LABEL: name: frame_pointer_register_different_from_offset_register
+    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
+
+    ; GFX9: $vgpr4 = V_MOV_B32_e32 $sgpr33, implicit $exec
+    ; GFX9: $vgpr5 = V_MOV_B32_e32 30452, implicit $exec
+    ; GFX9: BUFFER_STORE_DWORD_OFFEN killed $vgpr4, killed $vgpr5, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32
+
+    $sgpr0 = S_GETREG_B32 30735, implicit-def $vgpr0_vgpr1, implicit-def $vcc
+    $sgpr1 = S_GETREG_B32 30735, implicit-def $vgpr2_vgpr3
+    $sgpr2 = S_GETREG_B32 30735, implicit-def $vgpr4_vgpr5
+    $sgpr3 = S_GETREG_B32 30735, implicit-def $vgpr6_vgpr7
+    $sgpr4 = S_GETREG_B32 30735, implicit-def $vgpr8_vgpr9
+    $sgpr5 = S_GETREG_B32 30735, implicit-def $vgpr10_vgpr11
+    $sgpr6 = S_GETREG_B32 30735, implicit-def $vgpr12_vgpr13
+    $sgpr7 = S_GETREG_B32 30735, implicit-def $vgpr14_vgpr15
+    $sgpr8 = S_GETREG_B32 30735, implicit-def $vgpr16_vgpr17
+    $sgpr9 = S_GETREG_B32 30735, implicit-def $vgpr18_vgpr19
+    $sgpr10 = S_GETREG_B32 30735, implicit-def $vgpr20_vgpr21
+    $sgpr11 = S_GETREG_B32 30735, implicit-def $vgpr22_vgpr23
+    $sgpr12 = S_GETREG_B32 30735, implicit-def $vgpr24_vgpr25
+    $sgpr13 = S_GETREG_B32 30735, implicit-def $vgpr26_vgpr27
+    $sgpr14 = S_GETREG_B32 30735, implicit-def $vgpr28_vgpr29
+    $sgpr15 = S_GETREG_B32 30735, implicit-def $vgpr30_vgpr31
+    $sgpr16 = S_GETREG_B32 30735, implicit-def $vgpr32_vgpr33
+    $sgpr17 = S_GETREG_B32 30735, implicit-def $vgpr34_vgpr35
+    $sgpr18 = S_GETREG_B32 30735, implicit-def $vgpr36_vgpr37
+    $sgpr19 = S_GETREG_B32 30735, implicit-def $vgpr38_vgpr39
+    $sgpr20 = S_GETREG_B32 30735, implicit-def $vgpr40_vgpr41
+    $sgpr21 = S_GETREG_B32 30735, implicit-def $vgpr42_vgpr43
+    $sgpr22 = S_GETREG_B32 30735, implicit-def $vgpr44_vgpr45
+    $sgpr23 = S_GETREG_B32 30735, implicit-def $vgpr46_vgpr47
+    $sgpr24 = S_GETREG_B32 30735, implicit-def $vgpr48_vgpr49
+    $sgpr25 = S_GETREG_B32 30735, implicit-def $vgpr50_vgpr51
+    $sgpr26 = S_GETREG_B32 30735, implicit-def $vgpr52_vgpr53
+    $sgpr27 = S_GETREG_B32 30735, implicit-def $vgpr54_vgpr55
+    $sgpr28 = S_GETREG_B32 30735, implicit-def $vgpr56_vgpr57
+    $sgpr29 = S_GETREG_B32 30735, implicit-def $vgpr58_vgpr59
+    $sgpr30 = S_GETREG_B32 30735, implicit-def $vgpr60_vgpr61
+    $sgpr31 = S_GETREG_B32 30735, implicit-def $vgpr62_vgpr63
+    $sgpr32 = S_GETREG_B32 30735, implicit-def $vgpr64_vgpr65
+    $sgpr33 = S_GETREG_B32 30735, implicit-def $vgpr66_vgpr67
+    $sgpr34 = S_GETREG_B32 30735, implicit-def $vgpr68_vgpr69
+    $sgpr35 = S_GETREG_B32 30735, implicit-def $vgpr70_vgpr71
+    $sgpr36 = S_GETREG_B32 30735, implicit-def $vgpr72_vgpr73
+    $sgpr37 = S_GETREG_B32 30735, implicit-def $vgpr74_vgpr75
+    $sgpr38 = S_GETREG_B32 30735, implicit-def $vgpr76_vgpr77
+    $sgpr39 = S_GETREG_B32 30735, implicit-def $vgpr78_vgpr79
+    $sgpr40 = S_GETREG_B32 30735, implicit-def $vgpr80_vgpr81
+    $sgpr41 = S_GETREG_B32 30735, implicit-def $vgpr82_vgpr83
+    $sgpr42 = S_GETREG_B32 30735, implicit-def $vgpr84_vgpr85
+    $sgpr43 = S_GETREG_B32 30735, implicit-def $vgpr86_vgpr87
+    $sgpr44 = S_GETREG_B32 30735, implicit-def $vgpr88_vgpr89
+    $sgpr45 = S_GETREG_B32 30735, implicit-def $vgpr90_vgpr91
+    $sgpr46 = S_GETREG_B32 30735, implicit-def $vgpr92_vgpr93
+    $sgpr47 = S_GETREG_B32 30735, implicit-def $vgpr94_vgpr95
+    $sgpr48 = S_GETREG_B32 30735, implicit-def $vgpr96_vgpr97
+    $sgpr49 = S_GETREG_B32 30735, implicit-def $vgpr98_vgpr99
+    $sgpr50 = S_GETREG_B32 30735, implicit-def $vgpr100_vgpr101
+    $sgpr51 = S_GETREG_B32 30735, implicit-def $vgpr102_vgpr103
+    $sgpr52 = S_GETREG_B32 30735, implicit-def $vgpr104_vgpr105
+    $sgpr53 = S_GETREG_B32 30735, implicit-def $vgpr106_vgpr107
+    $sgpr54 = S_GETREG_B32 30735, implicit-def $vgpr108_vgpr109
+    $sgpr55 = S_GETREG_B32 30735, implicit-def $vgpr110_vgpr111
+    $sgpr56 = S_GETREG_B32 30735, implicit-def $vgpr112_vgpr113
+    $sgpr57 = S_GETREG_B32 30735, implicit-def $vgpr114_vgpr115
+    $sgpr58 = S_GETREG_B32 30735, implicit-def $vgpr116_vgpr117
+    $sgpr59 = S_GETREG_B32 30735, implicit-def $vgpr118_vgpr119
+    $sgpr60 = S_GETREG_B32 30735, implicit-def $vgpr120_vgpr121
+    $sgpr61 = S_GETREG_B32 30735, implicit-def $vgpr122_vgpr123
+    $sgpr62 = S_GETREG_B32 30735, implicit-def $vgpr124_vgpr125
+    $sgpr63 = S_GETREG_B32 30735, implicit-def $vgpr126_vgpr127
+    $sgpr64 = S_GETREG_B32 30735, implicit-def $vgpr128_vgpr129
+    $sgpr65 = S_GETREG_B32 30735, implicit-def $vgpr130_vgpr131
+    $sgpr66 = S_GETREG_B32 30735, implicit-def $vgpr132_vgpr133
+    $sgpr67 = S_GETREG_B32 30735, implicit-def $vgpr134_vgpr135
+    $sgpr68 = S_GETREG_B32 30735, implicit-def $vgpr136_vgpr137
+    $sgpr69 = S_GETREG_B32 30735, implicit-def $vgpr138_vgpr139
+    $sgpr70 = S_GETREG_B32 30735, implicit-def $vgpr140_vgpr141
+    $sgpr71 = S_GETREG_B32 30735, implicit-def $vgpr142_vgpr143
+    $sgpr72 = S_GETREG_B32 30735, implicit-def $vgpr144_vgpr145
+    $sgpr73 = S_GETREG_B32 30735, implicit-def $vgpr146_vgpr147
+    $sgpr74 = S_GETREG_B32 30735, implicit-def $vgpr148_vgpr149
+    $sgpr75 = S_GETREG_B32 30735, implicit-def $vgpr150_vgpr151
+    $sgpr76 = S_GETREG_B32 30735, implicit-def $vgpr152_vgpr153
+    $sgpr77 = S_GETREG_B32 30735, implicit-def $vgpr154_vgpr155
+    $sgpr78 = S_GETREG_B32 30735, implicit-def $vgpr156_vgpr157
+    $sgpr79 = S_GETREG_B32 30735, implicit-def $vgpr158_vgpr159
+    $sgpr80 = S_GETREG_B32 30735, implicit-def $vgpr160_vgpr161
+    $sgpr81 = S_GETREG_B32 30735, implicit-def $vgpr162_vgpr163
+    $sgpr82 = S_GETREG_B32 30735, implicit-def $vgpr164_vgpr165
+    $sgpr83 = S_GETREG_B32 30735, implicit-def $vgpr166_vgpr167
+    $sgpr84 = S_GETREG_B32 30735, implicit-def $vgpr168_vgpr169
+    $sgpr85 = S_GETREG_B32 30735, implicit-def $vgpr170_vgpr171
+    $sgpr86 = S_GETREG_B32 30735, implicit-def $vgpr172_vgpr173
+    $sgpr87 = S_GETREG_B32 30735, implicit-def $vgpr174_vgpr175
+    $sgpr88 = S_GETREG_B32 30735, implicit-def $vgpr176_vgpr177
+    $sgpr89 = S_GETREG_B32 30735, implicit-def $vgpr178_vgpr179
+    $sgpr90 = S_GETREG_B32 30735, implicit-def $vgpr180_vgpr181
+    $sgpr91 = S_GETREG_B32 30735, implicit-def $vgpr182_vgpr183
+    $sgpr92 = S_GETREG_B32 30735, implicit-def $vgpr184_vgpr185
+    $sgpr93 = S_GETREG_B32 30735, implicit-def $vgpr186_vgpr187
+    $sgpr94 = S_GETREG_B32 30735, implicit-def $vgpr188_vgpr189
+    $sgpr95 = S_GETREG_B32 30735, implicit-def $vgpr190_vgpr191
+    $sgpr96 = S_GETREG_B32 30735, implicit-def $vgpr192_vgpr193
+    $sgpr97 = S_GETREG_B32 30735, implicit-def $vgpr194_vgpr195
+    $sgpr98 = S_GETREG_B32 30735, implicit-def $vgpr196_vgpr197
+    $sgpr99 = S_GETREG_B32 30735, implicit-def $vgpr198_vgpr199
+    $sgpr100 = S_GETREG_B32 30735, implicit-def $vgpr200_vgpr201
+    $sgpr101 = S_GETREG_B32 30735, implicit-def $vgpr202_vgpr203
+    $sgpr102 = S_GETREG_B32 30735, implicit-def $vgpr204_vgpr205
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr206_vgpr207
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr208_vgpr209
+
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr210_vgpr211
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr212_vgpr213
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr214_vgpr215
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr216_vgpr217
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr218_vgpr219
+
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr220_vgpr221
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr222_vgpr223
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr224_vgpr225
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr226_vgpr227
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr228_vgpr229
+
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr230_vgpr231
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr232_vgpr233
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr234_vgpr235
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr236_vgpr237
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr238_vgpr239
+
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr240_vgpr241
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr242_vgpr243
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr244_vgpr245
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr246_vgpr247
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr248_vgpr249
+
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr250_vgpr251
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr252_vgpr253
+    $sgpr103 = S_GETREG_B32 30735, implicit-def $vgpr254_vgpr255
+
+...