In D60682#1470258, @nhaehnle wrote:

Mesa uses +DumpCode as well. Do we have a good solution for generation both ELF and textual output?

Add a test to confirm split-dwarf is supported for the amdhsa OS in the driver.

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LGTM, thanks! One small change to a comment.

LGTM, thanks! I think you can also drop "provides a method for use by LLPC to write metadata into LLVM IR" from the commit message.

In D58400#1412667, @arsenm wrote:

I'm not sure how the question is whether signed integers are supported. The instruction does treat the offset as signed

After digging a bit more into how we parse/print operands for sopp_br I think there are some more fundamental decisions to make beyond just "do we support signed integers", so I want to avoid changing anything in this patch. I will revisit how we treat them in the future and make any breaking changes all at once, rather than spreading them out.

LGTM then, but like I said I'm not very familiar with GlobalISel so more eyes might be good

In D58400#1407115, @arsenm wrote:

In D58400#1405973, @scott.linder wrote:

Does anyone have an opinion on returning negative branch targets (e.g. <keep_symbol+0xfffffffffffe0018>)? I don't know how this would ever come up in hardware anyway, or what the hardware would do, but it doesn't seem very helpful in the disassembly.

The hardware doesn't know about the symbol? Do you mean for overflow?

Does anyone have an opinion on returning negative branch targets (e.g. <keep_symbol+0xfffffffffffe0018>)? I don't know how this would ever come up in hardware anyway, or what the hardware would do, but it doesn't seem very helpful in the disassembly.

Improved error message.

Address feedback. Sign-extend all s_branch immediates and change the assembler syntax to represent these as true negative numbers.

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I think MIR is the best place to look; this now tests that the right pseudo is produced and that spills don't interleave the terminators.

I agree the test does not test much at all, it was just the minimum I could think of considering none of our existing tests notice the change. I'm not sure what pass you mean by 'isel', but 'stop-after=amdgpu-isel' is too early to see the SI_INDIRECT_SRC_* psuedo expanded.

In D57027#1383432, @tpr wrote:

In D57027#1381468, @scott.linder wrote:

The code looks good to me, but I'm wondering why the move from doing this in AsmPrinter::EmitEndOfAsmFile to TargetStreamer::finish? It seems like it is fine to emit directives in either, but I don't understand why the change here.

The idea was so that a disassembler disassembling into a TargetStreamer would go through the same code to emit the directives.

LGTM

See https://reviews.llvm.org/D56871

The code looks good to me, but I'm wondering why the move from doing this in AsmPrinter::EmitEndOfAsmFile to TargetStreamer::finish? It seems like it is fine to emit directives in either, but I don't understand why the change here.

Add test for tail call through GOT

LGTM, pending parents of course.

Thank you for updating this! I only have one small suggestion, but otherwise it LGTM.

LGTM, sorry for the delay in reviewing this.

Address feedback

I've tried to implement carrying a copy of the function global through the DAG from the beginning, rather than recovering it after legalizing the GlobalAddress. I don't know if this is a reasonable approach, but I figured I would post something and see what you think.

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Update option name

No worries, I agree that we don't gain much with a shorter flag here; explicit seems preferable.

Update option name

Update the -cc1 option name and docs; also update the LangOpt and docs.

Add missing flag to tests

Remove driver options

That sounds reasonable to me. I had already posted a patch with the Driver options, but I will update it to only include the -cc1 version.

Will be superseded by either https://reviews.llvm.org/D53153 or https://reviews.llvm.org/D56871

Rebase and ping