Fix invalid alignment in DAGCombiner::isLegalNarrowLdSt

[gchatelet]

Summary

ShAmt / 8 can be a non power of two, this can lead to an invalid alignment.
context: https://reviews.llvm.org/D41350#inline-749165

[gchatelet]

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

4879

assert here is just to refresh what is established L.4861
It helps understand why ShAmt / 8 is valid.

[samparker]

Thanks.

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

bool DAGCombiner::isLegalNarrowLdSt(LSBaseSDNode *LDST,
   if (!LDST->isSimple())
     return false;
 
   // Verify that we are actually reducing a load width here.
   if (LDST->getMemoryVT().getSizeInBits() < MemVT.getSizeInBits())
     return false;
 
   // Ensure that this isn't going to produce an unsupported memory access.
-  if (ShAmt &&
-      !TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), MemVT,
-                              LDST->getAddressSpace(), ShAmt / 8,
+  if (ShAmt) {
+    assert(ShAmt % 8 == 0 && "ShAmt is byte offset");
+    const unsigned ByteShAmt = ShAmt / 8;
+    const Align LDSTAlign = LDST->getAlign();
+    const Align NarrowAlign = commonAlignment(LDSTAlign, ByteShAmt);
+    if (!TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), MemVT,
+                                LDST->getAddressSpace(), NarrowAlign.value(),
                                 LDST->getMemOperand()->getFlags()))
       return false;
+  }
 
   // It's not possible to generate a constant of extended or untyped type.
   EVT PtrType = LDST->getBasePtr().getValueType();
   if (PtrType == MVT::Untyped || PtrType.isExtended())
     return false;
 
   if (isa<LoadSDNode>(LDST)) {
     LoadSDNode *Load = cast<LoadSDNode>(LDST);

llvm/test/CodeGen/ARM/and-load-combine.ll

 ; ARMEB:       @ %bb.0:
 ; ARMEB-NEXT:    ldrh r1, [r0, #3]
 ; ARMEB-NEXT:    lsr r0, r1, #8
 ; ARMEB-NEXT:    lsl r1, r1, #24
 ; ARMEB-NEXT:    bx lr
 ;
 ; THUMB1-LABEL: test23:
 ; THUMB1:       @ %bb.0:
-; THUMB1-NEXT:    ldrb r1, [r0, #3]
-; THUMB1-NEXT:    ldrb r0, [r0, #4]
-; THUMB1-NEXT:    lsls r0, r0, #8
-; THUMB1-NEXT:    adds r1, r0, r1
-; THUMB1-NEXT:    lsls r0, r1, #24
-; THUMB1-NEXT:    lsrs r1, r1, #8
+; THUMB1-NEXT:    ldrb r1, [r0, #4]
+; THUMB1-NEXT:    ldrb r0, [r0, #3]
+; THUMB1-NEXT:    lsls r0, r0, #24
 ; THUMB1-NEXT:    bx lr
 ;
 ; THUMB2-LABEL: test23:
 ; THUMB2:       @ %bb.0:
 ; THUMB2-NEXT:    ldrh.w r1, [r0, #3]
 ; THUMB2-NEXT:    lsls r0, r1, #24
 ; THUMB2-NEXT:    lsrs r1, r1, #8
 ; THUMB2-NEXT:    bx lr

 ; ARMEB:       @ %bb.0:
 ; ARMEB-NEXT:    ldrh r0, [r0, #1]
 ; ARMEB-NEXT:    mov r1, #0
 ; ARMEB-NEXT:    lsl r0, r0, #8
 ; ARMEB-NEXT:    bx lr
 ;
 ; THUMB1-LABEL: test25:
 ; THUMB1:       @ %bb.0:
-; THUMB1-NEXT:    ldrb r1, [r0, #5]
-; THUMB1-NEXT:    ldrb r0, [r0, #6]
-; THUMB1-NEXT:    lsls r0, r0, #8
-; THUMB1-NEXT:    adds r0, r0, r1
-; THUMB1-NEXT:    lsls r1, r0, #8
+; THUMB1-NEXT:    ldr r0, [r0, #4]
+; THUMB1-NEXT:    ldr r1, .LCPI37_0
+; THUMB1-NEXT:    ands r1, r0
 ; THUMB1-NEXT:    movs r0, #0
 ; THUMB1-NEXT:    bx lr
+; THUMB1-NEXT:    .p2align 2
+; THUMB1-NEXT:  @ %bb.1:
+; THUMB1-NEXT:  .LCPI37_0:
+; THUMB1-NEXT:    .long 16776960 @ 0xffff00
 ;
 ; THUMB2-LABEL: test25:
 ; THUMB2:       @ %bb.0:
 ; THUMB2-NEXT:    ldrh.w r0, [r0, #5]
 ; THUMB2-NEXT:    lsls r1, r0, #8
 ; THUMB2-NEXT:    movs r0, #0
 ; THUMB2-NEXT:    bx lr
   %1 = load i64, i64* %p, align 8