[AArch64][SVE] Add bfloat16 support to svlen intrinsic

[fpetrogalli]

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c

2

We said ARM_FEATURE_BF16_SCALAR_ARITHMETIC is implied by __ARM_FEATURE_SVE_BF16, so I think you should remove this macro definition.

[c-rhodes]

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c

2

that's correct but it's not handled yet, __ARM_FEATURE_SVE_BF16 isn't enabled as the implementation is incomplete, it'll eventually be enabled in the driver, but for now we need to explicitly define both macros in all tests.

[c-rhodes]

Changes:

• Rebased.
• Moved bfloat test to separate file.
• Added checks to test intrinsics are guarded by feature flag, this is by omitting the feature macro __ARM_FEATURE_SVE_BF16 for now but will eventually be updated to omit +bf16 once the feature flag implies the macro.

clang/include/clang/Basic/arm_sve.td

 def SVCNTB : SInst<"svcntb", "n", "", MergeNone, "aarch64_sve_cntb", [IsAppendSVALL, IsOverloadNone]>;
 def SVCNTH : SInst<"svcnth", "n", "", MergeNone, "aarch64_sve_cnth", [IsAppendSVALL, IsOverloadNone]>;
 def SVCNTW : SInst<"svcntw", "n", "", MergeNone, "aarch64_sve_cntw", [IsAppendSVALL, IsOverloadNone]>;
 def SVCNTD : SInst<"svcntd", "n", "", MergeNone, "aarch64_sve_cntd", [IsAppendSVALL, IsOverloadNone]>;
 
 def SVCNTP : SInst<"svcntp_{d}",  "nPP", "PcPsPiPl",        MergeNone, "aarch64_sve_cntp">;
 def SVLEN  : SInst<"svlen[_{d}]", "nd",  "csilUcUsUiUlhfd", MergeNone>;
 
+let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in {
+def SVLEN_BF16 : SInst<"svlen[_{d}]", "nd", "b", MergeNone>;
+}
+
 ////////////////////////////////////////////////////////////////////////////////
 // Saturating scalar arithmetic
 
 class sat_type<string u, string t> { string U = u; string T = t; }
 def SignedByte         : sat_type<"",  "c">;
 def SignedHalf         : sat_type<"",  "s">;
 def SignedWord         : sat_type<"",  "i">;
 def SignedDoubleWord   : sat_type<"",  "l">;

clang/lib/CodeGen/CGBuiltin.cpp

case SVE::BI__builtin_sve_svdupq_n_s32: {
     Value *Call =
         Builder.CreateCall(F, {Pred, LD1RQ, EmitSVEDupX(Builder.getInt64(0))});
     return EmitSVEPredicateCast(Call, cast<llvm::ScalableVectorType>(Ty));
   }
 
   case SVE::BI__builtin_sve_svpfalse_b:
     return ConstantInt::getFalse(Ty);
 
+  case SVE::BI__builtin_sve_svlen_bf16:
   case SVE::BI__builtin_sve_svlen_f16:
   case SVE::BI__builtin_sve_svlen_f32:
   case SVE::BI__builtin_sve_svlen_f64:
   case SVE::BI__builtin_sve_svlen_s8:
   case SVE::BI__builtin_sve_svlen_s16:
   case SVE::BI__builtin_sve_svlen_s32:
   case SVE::BI__builtin_sve_svlen_s64:
   case SVE::BI__builtin_sve_svlen_u8:

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c

 // REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t
 // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t
 
 // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it.
 // ASM-NOT: warning
 #include <arm_sve.h>
 
 #ifdef SVE_OVERLOADED_FORMS
 // A simple used,unused... macro, long enough to represent any SVE builtin.

 uint64_t test_svlen_f64(svfloat64_t op)
 {
   // CHECK-LABEL: test_svlen_f64
   // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
   // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 1
   // CHECK: ret i64 %[[SHL]]
   return SVE_ACLE_FUNC(svlen,_f64,,)(op);
 }
+
+uint64_t test_svlen_bf16(svbfloat16_t op)
+{
+  // CHECK-LABEL: test_svlen_bf16
+  // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64()
+  // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 3
+  // CHECK: ret i64 %[[SHL]]
+  return SVE_ACLE_FUNC(svlen,_bf16,,)(op);
+}

clang/utils/TableGen/SveEmitter.cpp

case 'm':
     Float = false;
     ElementBitwidth = Bitwidth = 32;
     NumVectors = 0;
     break;
   case 'n':
     Predicate = false;
     Signed = false;
     Float = false;
+    BFloat = false;
     ElementBitwidth = Bitwidth = 64;
     NumVectors = 0;
     break;
   case 'w':
     ElementBitwidth = 64;
     break;
   case 'j':
     ElementBitwidth = Bitwidth = 64;