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[ARM][BFloat] Lowering of create/get/set/dup intrinsics

Authored by miyuki on Jun 8 2020, 10:07 AM.



This patch adds codegen for the following BFloat
operations to the ARM backend:

  • concatenation of bf16 vectors
  • bf16 vector element extraction
  • bf16 vector element insertion
  • duplication of a bf16 value into each lane of a vector
  • duplication of a bf16 vector lane into each lane

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miyuki created this revision.Jun 8 2020, 10:07 AM

Returns look wrong, but they should be fixed in the calling convention patch

Yeah it's hard to tell what parts of the tests are from bad calling conventions and which are not. If you need this quicker than the other part is available (and loads/stores work), you could loads/store the bfloat, as opposed directly returning the value.


Does VMOVRH require fullfp16? Am I right in saying that bfloat doesn't require the set of instructions we put into HasFPRegs16? That sounds like a pain.


Can you switch the operands here to show it doing something.

miyuki marked an inline comment as done.Jun 9 2020, 4:53 AM
miyuki added inline comments.

VMOVRH requires HasFPRegs16 and VMOVH requires HasFullFP16. But you are right, both instructions require the same extension in ARMARM (HaveFP16Ext), and the HaveAArch32BF16Ext extension is a separate thing. We need separate patterns for cases when BF16 is enabled but FP16 is not.

miyuki updated this revision to Diff 269551.Jun 9 2020, 8:22 AM
  • Addressed reviewer's comments
  • Rebased on top of a patch which implements the correct calling convention for returning bfloat values
miyuki marked 2 inline comments as done.Jun 9 2020, 8:23 AM
dmgreen accepted this revision.Jun 9 2020, 11:38 AM

Sounds good to me. Thanks

This revision is now accepted and ready to land.Jun 9 2020, 11:38 AM
miyuki updated this revision to Diff 272032.Jun 19 2020, 5:47 AM

Rebased. Added a workaround for bf16 arguments and returns (lowering currently works only with +fullfp16).

This revision was automatically updated to reflect the committed changes.