[SelectionDAG] Fix assertion failure with big shift amounts

[LemonBoy]

Summary

Calling getShiftAmountTy with LegalTypes set may return a type that's too narrow to hold the shift amount for integer type it's applied to.

Fixes the regression introduced by D79096

[craig.topper]

Does the same issue exist in scalarizeVectorStore path?

[LemonBoy]

In D79405#2020871, @craig.topper wrote:

Does the same issue exist in scalarizeVectorStore path?

No, that code path uses IntVT for the shift constant.

[craig.topper]

LGTM

[LemonBoy]

In D79405#2021897, @craig.topper wrote:

LGTM

Since I have no commit access I'll have to disturb you once again to get this committed :)

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

SDValue Load =
                        LD->getPointerInfo(), SrcIntVT, LD->getAlignment(),
                        LD->getMemOperand()->getFlags(), LD->getAAInfo());
 
     SmallVector<SDValue, 8> Vals;
     for (unsigned Idx = 0; Idx < NumElem; ++Idx) {
       unsigned ShiftIntoIdx =
           (DAG.getDataLayout().isBigEndian() ? (NumElem - 1) - Idx : Idx);
       SDValue ShiftAmount =
-          DAG.getConstant(ShiftIntoIdx * SrcEltVT.getSizeInBits(), SL,
-                          getShiftAmountTy(LoadVT, DAG.getDataLayout()));
+          DAG.getShiftAmountConstant(ShiftIntoIdx * SrcEltVT.getSizeInBits(),
+                                     LoadVT, SL, /*LegalTypes=*/false);
       SDValue ShiftedElt = DAG.getNode(ISD::SRL, SL, LoadVT, Load, ShiftAmount);
       SDValue Elt =
           DAG.getNode(ISD::AND, SL, LoadVT, ShiftedElt, SrcEltBitMask);
       SDValue Scalar = DAG.getNode(ISD::TRUNCATE, SL, SrcEltVT, Elt);
 
       if (ExtType != ISD::NON_EXTLOAD) {
         unsigned ExtendOp = ISD::getExtForLoadExtType(false, ExtType);
         Scalar = DAG.getNode(ExtendOp, SL, DstEltVT, Scalar);

llvm/test/CodeGen/X86/load-local-v3i129.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+
+define void @_start() {
+; CHECK-LABEL: _start:
+; CHECK:       # %bb.0: # %Entry
+; CHECK-NEXT:    pushq %rbp
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    .cfi_offset %rbp, -16
+; CHECK-NEXT:    movq %rsp, %rbp
+; CHECK-NEXT:    .cfi_def_cfa_register %rbp
+; CHECK-NEXT:    andq $-128, %rsp
+; CHECK-NEXT:    subq $256, %rsp # imm = 0x100
+; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT:    movq {{[0-9]+}}(%rsp), %rcx
+; CHECK-NEXT:    shrdq $2, %rcx, %rax
+; CHECK-NEXT:    shrq $2, %rcx
+; CHECK-NEXT:    leaq 1(,%rax,4), %rdx
+; CHECK-NEXT:    movq %rdx, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    shrdq $62, %rcx, %rax
+; CHECK-NEXT:    movq %rax, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    orq $-2, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    movq $-1, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:    movq %rbp, %rsp
+; CHECK-NEXT:    popq %rbp
+; CHECK-NEXT:    .cfi_def_cfa %rsp, 8
+; CHECK-NEXT:    retq
+Entry:
+  %y = alloca <3 x i129>, align 4
+  %L = load <3 x i129>, <3 x i129>* %y
+  %I1 = insertelement <3 x i129> %L, i129 340282366920938463463374607431768211455, i32 1
+  store <3 x i129> %I1, <3 x i129>* %y
+  ret void
+}