[SveEmitter] Implement builtins for gathers/scatters

[andwar]

Summary

This patch adds builtins for:

• regular, first-faulting and non-temporal gather loads
• regular and non-temporal scatter stores

Depends on D76680

[SjoerdMeijer]

This is a big patch, but looks reasonable to me.

clang/lib/CodeGen/CGBuiltin.cpp

7482

nit: to be consistent, do this in the default clause?

7489

nit: no need for the newlines here and also below?

7586

nit: can you rephrase this comment a bit I.e. the "From ACLE we always get ..." is a bit confusing I think. You want to say that this is how the ACLE defines this, but the IR looks different. You can also specify which bit is different, because that was not immediately obvious to me.

[sdesmalen]

clang/lib/CodeGen/CGBuiltin.cpp

7632

nit: This can use auto, which would make OverloadedTy a llvm::VectorType

7633

Just be aware that getVectorElementCount has been removed from Type in D77278, so you'll need to cast to VectorType and use getElementCount instead.
(fyi - in D77596 I've made getSVEType actually return a VectorType so that cast wouldn't be needed)

7666

You can remove the cast<llvm::VectorType> if you make the variable use auto.
(these comments apply equally to EmitSVEGatherLoad)

[sdesmalen]

clang/lib/CodeGen/CGBuiltin.cpp

7482

Doing that would lead to

warning: default label in switch which covers all enumeration values [-Wcovered-switch-default]

[andwar]

Thank you both for reviewing!

• Rebased on top of master
• Address the comments
• Made getSVEType return VectorType (this simplifies a lot of things)

[andwar]

clang/lib/CodeGen/CGBuiltin.cpp

7489

IMHO this improves readability, but I agree that that's a matter of personal preference :)

I'll keep it as is for the sake of consistency with getSVEType below.

7586

Good point, updated!

7632

Thanks, good point! I also updated getSVEType to return VectorType (so I can use auto for both).

7633

I have done the same ;)

[sdesmalen]

LGTM! Cheers @andwar

[andwar]

The buildbot failures are unrelated to this patch, and locally make check-all worked fine. I'll submit this patch as is.

clang/include/clang/Basic/TargetBuiltins.h

#undef LLVM_GET_SVE_IMMCHECKTYPES
 
     bool isLoad() const { return Flags & IsLoad; }
     bool isStore() const { return Flags & IsStore; }
     bool isGatherLoad() const { return Flags & IsGatherLoad; }
     bool isScatterStore() const { return Flags & IsScatterStore; }
     bool isStructLoad() const { return Flags & IsStructLoad; }
     bool isStructStore() const { return Flags & IsStructStore; }
     bool isZExtReturn() const { return Flags & IsZExtReturn; }
+    bool isByteIndexed() const { return Flags & IsByteIndexed; }
 
     uint64_t getBits() const { return Flags; }
     bool isFlagSet(uint64_t Flag) const { return Flags & Flag; }
   };
 
   /// Hexagon builtins
   namespace Hexagon {
     enum {

clang/include/clang/Basic/arm_sve.td

 // ------------------
 // P: boolean
 // U: unsigned
 
 // Prototype modifiers
 // -------------------
 // prototype: return (arg, arg, ...)
 //
+// x: vector of signed integers
 // u: vector of unsigned integers
 // d: default
 // c: const pointer type
 // P: predicate type
 // e: 1/2 width unsigned elements, 2x element count
 // h: 1/2 width elements, 2x element count
 // q: 1/4 width elements, 4x element count
 // o: 4x width elements, 1/4 element count

 def MergeTypeMask             : FlagType<0x00000380>;
 def IsLoad                    : FlagType<0x00002000>;
 def IsStore                   : FlagType<0x00004000>;
 def IsGatherLoad              : FlagType<0x00008000>;
 def IsScatterStore            : FlagType<0x00010000>;
 def IsStructLoad              : FlagType<0x00020000>;
 def IsStructStore             : FlagType<0x00040000>;
 def IsZExtReturn              : FlagType<0x00080000>; // Return value is sign-extend by default
+//      :                                     :
+//      :                                     :
+def IsByteIndexed             : FlagType<0x02000000>;
 
 // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h
 class ImmCheckType<int val> {
   int Value = val;
 }
 def ImmCheck0_31                : ImmCheckType<0>;  // 0..31 (used for e.g. predicate patterns)
 def ImmCheck1_16                : ImmCheckType<1>;  // 1..16
 def ImmCheckExtract             : ImmCheckType<2>;  // 0..(2048/sizeinbits(elt) - 1)

 def SVLD1_VNUM   : MInst<"svld1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad]>;
 def SVLD1SB_VNUM : MInst<"svld1sb_vnum_{d}", "dPSl", "silUsUiUl",       [IsLoad],               MemEltTyInt8>;
 def SVLD1UB_VNUM : MInst<"svld1ub_vnum_{d}", "dPWl", "silUsUiUl",       [IsLoad, IsZExtReturn], MemEltTyInt8>;
 def SVLD1SH_VNUM : MInst<"svld1sh_vnum_{d}", "dPTl", "ilUiUl",          [IsLoad],               MemEltTyInt16>;
 def SVLD1UH_VNUM : MInst<"svld1uh_vnum_{d}", "dPXl", "ilUiUl",          [IsLoad, IsZExtReturn], MemEltTyInt16>;
 def SVLD1SW_VNUM : MInst<"svld1sw_vnum_{d}", "dPUl", "lUl",             [IsLoad],               MemEltTyInt32>;
 def SVLD1UW_VNUM : MInst<"svld1uw_vnum_{d}", "dPYl", "lUl",             [IsLoad, IsZExtReturn], MemEltTyInt32>;
 
+// Load one vector (vector base)
+def SVLD1_GATHER_BASES_U   : MInst<"svld1_gather[_{2}base]_{d}",   "dPu", "ilUiUlfd", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SB_GATHER_BASES_U : MInst<"svld1sb_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad],               MemEltTyInt8,    "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UB_GATHER_BASES_U : MInst<"svld1ub_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SH_GATHER_BASES_U : MInst<"svld1sh_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UH_GATHER_BASES_U : MInst<"svld1uh_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SW_GATHER_BASES_U : MInst<"svld1sw_gather[_{2}base]_{d}", "dPu", "lUl",      [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UW_GATHER_BASES_U : MInst<"svld1uw_gather[_{2}base]_{d}", "dPu", "lUl",      [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather_scalar_offset">;
+
+// Load one vector (scalar base, signed vector offset in bytes)
+def SVLD1_GATHER_64B_OFFSETS_S   : MInst<"svld1_gather_[{3}]offset[_{d}]", "dPcx", "lUld", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ld1_gather">;
+def SVLD1SB_GATHER_64B_OFFSETS_S : MInst<"svld1sb_gather_[{3}]offset_{d}", "dPSx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ld1_gather">;
+def SVLD1UB_GATHER_64B_OFFSETS_S : MInst<"svld1ub_gather_[{3}]offset_{d}", "dPWx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ld1_gather">;
+def SVLD1SH_GATHER_64B_OFFSETS_S : MInst<"svld1sh_gather_[{3}]offset_{d}", "dPTx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ld1_gather">;
+def SVLD1UH_GATHER_64B_OFFSETS_S : MInst<"svld1uh_gather_[{3}]offset_{d}", "dPXx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather">;
+def SVLD1SW_GATHER_64B_OFFSETS_S : MInst<"svld1sw_gather_[{3}]offset_{d}", "dPUx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ld1_gather">;
+def SVLD1UW_GATHER_64B_OFFSETS_S : MInst<"svld1uw_gather_[{3}]offset_{d}", "dPYx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather">;
+
+def SVLD1_GATHER_32B_OFFSETS_S   : MInst<"svld1_gather_[{3}]offset[_{d}]", "dPcx", "iUif", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ld1_gather_sxtw">;
+def SVLD1SB_GATHER_32B_OFFSETS_S : MInst<"svld1sb_gather_[{3}]offset_{d}", "dPSx", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ld1_gather_sxtw">;
+def SVLD1UB_GATHER_32B_OFFSETS_S : MInst<"svld1ub_gather_[{3}]offset_{d}", "dPWx", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ld1_gather_sxtw">;
+def SVLD1SH_GATHER_32B_OFFSETS_S : MInst<"svld1sh_gather_[{3}]offset_{d}", "dPTx", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ld1_gather_sxtw">;
+def SVLD1UH_GATHER_32B_OFFSETS_S : MInst<"svld1uh_gather_[{3}]offset_{d}", "dPXx", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_sxtw">;
+
+// Load one vector (scalar base, unsigned vector offset in bytes)
+def SVLD1_GATHER_64B_OFFSETS_U   : MInst<"svld1_gather_[{3}]offset[_{d}]", "dPcu", "lUld", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ld1_gather">;
+def SVLD1SB_GATHER_64B_OFFSETS_U : MInst<"svld1sb_gather_[{3}]offset_{d}", "dPSu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ld1_gather">;
+def SVLD1UB_GATHER_64B_OFFSETS_U : MInst<"svld1ub_gather_[{3}]offset_{d}", "dPWu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ld1_gather">;
+def SVLD1SH_GATHER_64B_OFFSETS_U : MInst<"svld1sh_gather_[{3}]offset_{d}", "dPTu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ld1_gather">;
+def SVLD1UH_GATHER_64B_OFFSETS_U : MInst<"svld1uh_gather_[{3}]offset_{d}", "dPXu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather">;
+def SVLD1SW_GATHER_64B_OFFSETS_U : MInst<"svld1sw_gather_[{3}]offset_{d}", "dPUu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ld1_gather">;
+def SVLD1UW_GATHER_64B_OFFSETS_U : MInst<"svld1uw_gather_[{3}]offset_{d}", "dPYu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather">;
+
+def SVLD1_GATHER_32B_OFFSETS_U   : MInst<"svld1_gather_[{3}]offset[_{d}]", "dPcu", "iUif", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ld1_gather_uxtw">;
+def SVLD1SB_GATHER_32B_OFFSETS_U : MInst<"svld1sb_gather_[{3}]offset_{d}", "dPSu", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ld1_gather_uxtw">;
+def SVLD1UB_GATHER_32B_OFFSETS_U : MInst<"svld1ub_gather_[{3}]offset_{d}", "dPWu", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ld1_gather_uxtw">;
+def SVLD1SH_GATHER_32B_OFFSETS_U : MInst<"svld1sh_gather_[{3}]offset_{d}", "dPTu", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ld1_gather_uxtw">;
+def SVLD1UH_GATHER_32B_OFFSETS_U : MInst<"svld1uh_gather_[{3}]offset_{d}", "dPXu", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_uxtw">;
+
+// Load one vector (vector base, signed scalar offset in bytes)
+def SVLD1_GATHER_OFFSET_S   : MInst<"svld1_gather[_{2}base]_offset_{d}",   "dPul", "ilUiUlfd", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SB_GATHER_OFFSET_S : MInst<"svld1sb_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UB_GATHER_OFFSET_S : MInst<"svld1ub_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SH_GATHER_OFFSET_S : MInst<"svld1sh_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UH_GATHER_OFFSET_S : MInst<"svld1uh_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SW_GATHER_OFFSET_S : MInst<"svld1sw_gather[_{2}base]_offset_{d}", "dPul", "lUl",      [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UW_GATHER_OFFSET_S : MInst<"svld1uw_gather[_{2}base]_offset_{d}", "dPul", "lUl",      [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather_scalar_offset">;
+
+// Load one vector (scalar base, signed vector index)
+def SVLD1_GATHER_64B_INDICES_S   : MInst<"svld1_gather_[{3}]index[_{d}]", "dPcx", "lUld", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ld1_gather_index">;
+def SVLD1SH_GATHER_64B_INDICES_S : MInst<"svld1sh_gather_[{3}]index_{d}", "dPTx", "lUl",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ld1_gather_index">;
+def SVLD1UH_GATHER_64B_INDICES_S : MInst<"svld1uh_gather_[{3}]index_{d}", "dPXx", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_index">;
+def SVLD1SW_GATHER_64B_INDICES_S : MInst<"svld1sw_gather_[{3}]index_{d}", "dPUx", "lUl",  [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ld1_gather_index">;
+def SVLD1UW_GATHER_64B_INDICES_S : MInst<"svld1uw_gather_[{3}]index_{d}", "dPYx", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather_index">;
+
+def SVLD1_GATHER_32B_INDICES_S   : MInst<"svld1_gather_[{3}]index[_{d}]", "dPcx", "iUif", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ld1_gather_sxtw_index">;
+def SVLD1SH_GATHER_32B_INDICES_S : MInst<"svld1sh_gather_[{3}]index_{d}", "dPTx", "iUi",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ld1_gather_sxtw_index">;
+def SVLD1UH_GATHER_32B_INDICES_S : MInst<"svld1uh_gather_[{3}]index_{d}", "dPXx", "iUi",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_sxtw_index">;
+
+// Load one vector (scalar base, unsigned vector index)
+def SVLD1_GATHER_64B_INDICES_U   : MInst<"svld1_gather_[{3}]index[_{d}]", "dPcu", "lUld", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ld1_gather_index">;
+def SVLD1SH_GATHER_64B_INDICES_U : MInst<"svld1sh_gather_[{3}]index_{d}", "dPTu", "lUl",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ld1_gather_index">;
+def SVLD1UH_GATHER_64B_INDICES_U : MInst<"svld1uh_gather_[{3}]index_{d}", "dPXu", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_index">;
+def SVLD1SW_GATHER_64B_INDICES_U : MInst<"svld1sw_gather_[{3}]index_{d}", "dPUu", "lUl",  [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ld1_gather_index">;
+def SVLD1UW_GATHER_64B_INDICES_U : MInst<"svld1uw_gather_[{3}]index_{d}", "dPYu", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather_index">;
+
+def SVLD1_GATHER_32B_INDICES_U   : MInst<"svld1_gather_[{3}]index[_{d}]", "dPcu", "iUif", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ld1_gather_uxtw_index">;
+def SVLD1SH_GATHER_32B_INDICES_U : MInst<"svld1sh_gather_[{3}]index_{d}", "dPTu", "iUi",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ld1_gather_uxtw_index">;
+def SVLD1UH_GATHER_32B_INDICES_U : MInst<"svld1uh_gather_[{3}]index_{d}", "dPXu", "iUi",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_uxtw_index">;
+
+// Load one vector (vector base, signed scalar index)
+def SVLD1_GATHER_INDEX_S     : MInst<"svld1_gather[_{2}base]_index_{d}",   "dPul", "ilUiUlfd", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SH_GATHER_INDEX_S   : MInst<"svld1sh_gather[_{2}base]_index_{d}", "dPul", "ilUiUl",   [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UH_GATHER_INDEX_S   : MInst<"svld1uh_gather[_{2}base]_index_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1SW_GATHER_INDEX_S   : MInst<"svld1sw_gather[_{2}base]_index_{d}", "dPul", "lUl",      [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ld1_gather_scalar_offset">;
+def SVLD1UW_GATHER_INDEX_S   : MInst<"svld1uw_gather[_{2}base]_index_{d}", "dPul", "lUl",      [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ld1_gather_scalar_offset">;
+
+
 // First-faulting load one vector (scalar base)
 def SVLDFF1   : MInst<"svldff1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad],               MemEltTyDefault, "aarch64_sve_ldff1">;
 def SVLDFF1SB : MInst<"svldff1sb_{d}", "dPS", "silUsUiUl",       [IsLoad],               MemEltTyInt8,    "aarch64_sve_ldff1">;
 def SVLDFF1UB : MInst<"svldff1ub_{d}", "dPW", "silUsUiUl",       [IsLoad, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1">;
 def SVLDFF1SH : MInst<"svldff1sh_{d}", "dPT", "ilUiUl",          [IsLoad],               MemEltTyInt16,   "aarch64_sve_ldff1">;
 def SVLDFF1UH : MInst<"svldff1uh_{d}", "dPX", "ilUiUl",          [IsLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1">;
 def SVLDFF1SW : MInst<"svldff1sw_{d}", "dPU", "lUl",             [IsLoad],               MemEltTyInt32,   "aarch64_sve_ldff1">;
 def SVLDFF1UW : MInst<"svldff1uw_{d}", "dPY", "lUl",             [IsLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1">;
 
 // First-faulting load one vector (scalar base, VL displacement)
 def SVLDFF1_VNUM   : MInst<"svldff1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfd", [IsLoad],               MemEltTyDefault, "aarch64_sve_ldff1">;
 def SVLDFF1SB_VNUM : MInst<"svldff1sb_vnum_{d}", "dPSl", "silUsUiUl",       [IsLoad],               MemEltTyInt8,    "aarch64_sve_ldff1">;
 def SVLDFF1UB_VNUM : MInst<"svldff1ub_vnum_{d}", "dPWl", "silUsUiUl",       [IsLoad, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1">;
 def SVLDFF1SH_VNUM : MInst<"svldff1sh_vnum_{d}", "dPTl", "ilUiUl",          [IsLoad],               MemEltTyInt16,   "aarch64_sve_ldff1">;
 def SVLDFF1UH_VNUM : MInst<"svldff1uh_vnum_{d}", "dPXl", "ilUiUl",          [IsLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1">;
 def SVLDFF1SW_VNUM : MInst<"svldff1sw_vnum_{d}", "dPUl", "lUl",             [IsLoad],               MemEltTyInt32,   "aarch64_sve_ldff1">;
 def SVLDFF1UW_VNUM : MInst<"svldff1uw_vnum_{d}", "dPYl", "lUl",             [IsLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1">;
 
+// First-faulting load one vector (vector base)
+def SVLDFF1_GATHER_BASES_U   : MInst<"svldff1_gather[_{2}base]_{d}",   "dPu", "ilUiUlfd", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SB_GATHER_BASES_U : MInst<"svldff1sb_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad],               MemEltTyInt8,    "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UB_GATHER_BASES_U : MInst<"svldff1ub_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SH_GATHER_BASES_U : MInst<"svldff1sh_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UH_GATHER_BASES_U : MInst<"svldff1uh_gather[_{2}base]_{d}", "dPu", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SW_GATHER_BASES_U : MInst<"svldff1sw_gather[_{2}base]_{d}", "dPu", "lUl",      [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UW_GATHER_BASES_U : MInst<"svldff1uw_gather[_{2}base]_{d}", "dPu", "lUl",      [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather_scalar_offset">;
+
+// First-faulting load one vector (scalar base, signed vector offset in bytes)
+def SVLDFF1_GATHER_64B_OFFSETS_S   : MInst<"svldff1_gather_[{3}]offset[_{d}]", "dPcx", "lUld", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldff1_gather">;
+def SVLDFF1SB_GATHER_64B_OFFSETS_S : MInst<"svldff1sb_gather_[{3}]offset_{d}", "dPSx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldff1_gather">;
+def SVLDFF1UB_GATHER_64B_OFFSETS_S : MInst<"svldff1ub_gather_[{3}]offset_{d}", "dPWx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1_gather">;
+def SVLDFF1SH_GATHER_64B_OFFSETS_S : MInst<"svldff1sh_gather_[{3}]offset_{d}", "dPTx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldff1_gather">;
+def SVLDFF1UH_GATHER_64B_OFFSETS_S : MInst<"svldff1uh_gather_[{3}]offset_{d}", "dPXx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather">;
+def SVLDFF1SW_GATHER_64B_OFFSETS_S : MInst<"svldff1sw_gather_[{3}]offset_{d}", "dPUx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ldff1_gather">;
+def SVLDFF1UW_GATHER_64B_OFFSETS_S : MInst<"svldff1uw_gather_[{3}]offset_{d}", "dPYx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather">;
+
+def SVLDFF1_GATHER_32B_OFFSETS_S   : MInst<"svldff1_gather_[{3}]offset[_{d}]", "dPcx", "iUif", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldff1_gather_sxtw">;
+def SVLDFF1SB_GATHER_32B_OFFSETS_S : MInst<"svldff1sb_gather_[{3}]offset_{d}", "dPSx", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldff1_gather_sxtw">;
+def SVLDFF1UB_GATHER_32B_OFFSETS_S : MInst<"svldff1ub_gather_[{3}]offset_{d}", "dPWx", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1_gather_sxtw">;
+def SVLDFF1SH_GATHER_32B_OFFSETS_S : MInst<"svldff1sh_gather_[{3}]offset_{d}", "dPTx", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_sxtw">;
+def SVLDFF1UH_GATHER_32B_OFFSETS_S : MInst<"svldff1uh_gather_[{3}]offset_{d}", "dPXx", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_sxtw">;
+
+// First-faulting load one vector (scalar base, unsigned vector offset in bytes)
+def SVLDFF1_GATHER_64B_OFFSETS_U   : MInst<"svldff1_gather_[{3}]offset[_{d}]", "dPcu", "lUld", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldff1_gather">;
+def SVLDFF1SB_GATHER_64B_OFFSETS_U : MInst<"svldff1sb_gather_[{3}]offset_{d}", "dPSu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldff1_gather">;
+def SVLDFF1UB_GATHER_64B_OFFSETS_U : MInst<"svldff1ub_gather_[{3}]offset_{d}", "dPWu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1_gather">;
+def SVLDFF1SH_GATHER_64B_OFFSETS_U : MInst<"svldff1sh_gather_[{3}]offset_{d}", "dPTu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldff1_gather">;
+def SVLDFF1UH_GATHER_64B_OFFSETS_U : MInst<"svldff1uh_gather_[{3}]offset_{d}", "dPXu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather">;
+def SVLDFF1SW_GATHER_64B_OFFSETS_U : MInst<"svldff1sw_gather_[{3}]offset_{d}", "dPUu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ldff1_gather">;
+def SVLDFF1UW_GATHER_64B_OFFSETS_U : MInst<"svldff1uw_gather_[{3}]offset_{d}", "dPYu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather">;
+
+def SVLDFF1_GATHER_32B_OFFSETS_U   : MInst<"svldff1_gather_[{3}]offset[_{d}]", "dPcu", "iUif", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldff1_gather_uxtw">;
+def SVLDFF1SB_GATHER_32B_OFFSETS_U : MInst<"svldff1sb_gather_[{3}]offset_{d}", "dPSu", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldff1_gather_uxtw">;
+def SVLDFF1UB_GATHER_32B_OFFSETS_U : MInst<"svldff1ub_gather_[{3}]offset_{d}", "dPWu", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1_gather_uxtw">;
+def SVLDFF1SH_GATHER_32B_OFFSETS_U : MInst<"svldff1sh_gather_[{3}]offset_{d}", "dPTu", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_uxtw">;
+def SVLDFF1UH_GATHER_32B_OFFSETS_U : MInst<"svldff1uh_gather_[{3}]offset_{d}", "dPXu", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_uxtw">;
+
+// First-faulting load one vector (vector base, signed scalar offset in bytes)
+def SVLDFF1_GATHER_OFFSET_S   : MInst<"svldff1_gather[_{2}base]_offset_{d}",   "dPul", "ilUiUlfd", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SB_GATHER_OFFSET_S : MInst<"svldff1sb_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UB_GATHER_OFFSET_S : MInst<"svldff1ub_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SH_GATHER_OFFSET_S : MInst<"svldff1sh_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UH_GATHER_OFFSET_S : MInst<"svldff1uh_gather[_{2}base]_offset_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SW_GATHER_OFFSET_S : MInst<"svldff1sw_gather[_{2}base]_offset_{d}", "dPul", "lUl",      [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UW_GATHER_OFFSET_S : MInst<"svldff1uw_gather[_{2}base]_offset_{d}", "dPul", "lUl",      [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather_scalar_offset">;
+
+// First-faulting load one vector (scalar base, signed vector index)
+def SVLDFF1_GATHER_64B_INDICES_S   : MInst<"svldff1_gather_[{3}]index[_{d}]", "dPcx", "lUld", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1SH_GATHER_64B_INDICES_S : MInst<"svldff1sh_gather_[{3}]index_{d}", "dPTx", "lUl",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1UH_GATHER_64B_INDICES_S : MInst<"svldff1uh_gather_[{3}]index_{d}", "dPXx", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1SW_GATHER_64B_INDICES_S : MInst<"svldff1sw_gather_[{3}]index_{d}", "dPUx", "lUl",  [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1UW_GATHER_64B_INDICES_S : MInst<"svldff1uw_gather_[{3}]index_{d}", "dPYx", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather_index">;
+
+def SVLDFF1_GATHER_32B_INDICES_S   : MInst<"svldff1_gather_[{3}]index[_{d}]", "dPcx", "iUif", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldff1_gather_sxtw_index">;
+def SVLDFF1SH_GATHER_32B_INDICES_S : MInst<"svldff1sh_gather_[{3}]index_{d}", "dPTx", "iUi",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_sxtw_index">;
+def SVLDFF1UH_GATHER_32B_INDICES_S : MInst<"svldff1uh_gather_[{3}]index_{d}", "dPXx", "iUi",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_sxtw_index">;
+
+// First-faulting load one vector (scalar base, unsigned vector index)
+def SVLDFF1_GATHER_64B_INDICES_U   : MInst<"svldff1_gather_[{3}]index[_{d}]", "dPcu", "lUld", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1SH_GATHER_64B_INDICES_U : MInst<"svldff1sh_gather_[{3}]index_{d}", "dPTu", "lUl",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1UH_GATHER_64B_INDICES_U : MInst<"svldff1uh_gather_[{3}]index_{d}", "dPXu", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1SW_GATHER_64B_INDICES_U : MInst<"svldff1sw_gather_[{3}]index_{d}", "dPUu", "lUl",  [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldff1_gather_index">;
+def SVLDFF1UW_GATHER_64B_INDICES_U : MInst<"svldff1uw_gather_[{3}]index_{d}", "dPYu", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather_index">;
+
+def SVLDFF1_GATHER_32B_INDICES_U   : MInst<"svldff1_gather_[{3}]index[_{d}]", "dPcu", "iUif", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldff1_gather_uxtw_index">;
+def SVLDFF1SH_GATHER_32B_INDICES_U : MInst<"svldff1sh_gather_[{3}]index_{d}", "dPTu", "iUi",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_uxtw_index">;
+def SVLDFF1UH_GATHER_32B_INDICES_U : MInst<"svldff1uh_gather_[{3}]index_{d}", "dPXu", "iUi",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_uxtw_index">;
+
+// First-faulting load one vector (vector base, signed scalar index)
+def SVLDFF1_GATHER_INDEX_S   : MInst<"svldff1_gather[_{2}base]_index_{d}",   "dPul", "ilUiUlfd", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SH_GATHER_INDEX_S : MInst<"svldff1sh_gather[_{2}base]_index_{d}", "dPul", "ilUiUl",   [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UH_GATHER_INDEX_S : MInst<"svldff1uh_gather[_{2}base]_index_{d}", "dPul", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1SW_GATHER_INDEX_S : MInst<"svldff1sw_gather[_{2}base]_index_{d}", "dPul", "lUl",      [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldff1_gather_scalar_offset">;
+def SVLDFF1UW_GATHER_INDEX_S : MInst<"svldff1uw_gather[_{2}base]_index_{d}", "dPul", "lUl",      [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldff1_gather_scalar_offset">;
+
 // Non-faulting load one vector (scalar base)
 def SVLDNF1   : MInst<"svldnf1[_{2}]", "dPc", "csilUcUsUiUlhfd", [IsLoad],               MemEltTyDefault, "aarch64_sve_ldnf1">;
 def SVLDNF1SB : MInst<"svldnf1sb_{d}", "dPS", "silUsUiUl",       [IsLoad],               MemEltTyInt8,    "aarch64_sve_ldnf1">;
 def SVLDNF1UB : MInst<"svldnf1ub_{d}", "dPW", "silUsUiUl",       [IsLoad, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldnf1">;
 def SVLDNF1SH : MInst<"svldnf1sh_{d}", "dPT", "ilUiUl",          [IsLoad],               MemEltTyInt16,   "aarch64_sve_ldnf1">;
 def SVLDNF1UH : MInst<"svldnf1uh_{d}", "dPX", "ilUiUl",          [IsLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnf1">;
 def SVLDNF1SW : MInst<"svldnf1sw_{d}", "dPU", "lUl",             [IsLoad],               MemEltTyInt32,   "aarch64_sve_ldnf1">;
 def SVLDNF1UW : MInst<"svldnf1uw_{d}", "dPY", "lUl",             [IsLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnf1">;

 // Saturating scalar arithmetic
 def SVQDECH_S : SInst<"svqdech_pat[_{d}]",   "ddIi", "s", MergeNone, "aarch64_sve_sqdech", [], [ImmCheck<2, ImmCheck1_16>]>;
 def SVQDECH_U : SInst<"svqdech_pat[_{d}]",   "ddIi", "Us", MergeNone, "aarch64_sve_uqdech", [], [ImmCheck<2, ImmCheck1_16>]>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // Integer arithmetic
 def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]",  "ddqqi",  "il",   MergeNone, "aarch64_sve_sdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
 def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]",  "ddqqi",  "UiUl", MergeNone, "aarch64_sve_udot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
+
+////////////////////////////////////////////////////////////////////////////////
+// SVE2 - Non-temporal gather/scatter
+let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in {
+// Non-temporal gather load one vector (vector base)
+def SVLDNT1_GATHER_BASES_U   : MInst<"svldnt1_gather[_{2}base]_{0}",   "dPu", "ilUiUlfd", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SB_GATHER_BASES_U : MInst<"svldnt1sb_gather[_{2}base]_{0}", "dPu", "ilUiUl",   [IsGatherLoad],               MemEltTyInt8,    "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UB_GATHER_BASES_U : MInst<"svldnt1ub_gather[_{2}base]_{0}", "dPu", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SH_GATHER_BASES_U : MInst<"svldnt1sh_gather[_{2}base]_{0}", "dPu", "ilUiUl",   [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UH_GATHER_BASES_U : MInst<"svldnt1uh_gather[_{2}base]_{0}", "dPu", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SW_GATHER_BASES_U : MInst<"svldnt1sw_gather[_{2}base]_{0}", "dPu", "lUl",      [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UW_GATHER_BASES_U : MInst<"svldnt1uw_gather[_{2}base]_{0}", "dPu", "lUl",      [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+
+// Non-temporal gather load one vector (scalar base, signed vector offset in bytes)
+def SVLDNT1_GATHER_64B_OFFSETS_S   : MInst<"svldnt1_gather_[{3}]offset[_{0}]", "dPcx", "lUld", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldnt1_gather">;
+def SVLDNT1SB_GATHER_64B_OFFSETS_S : MInst<"svldnt1sb_gather_[{3}]offset_{0}", "dPSx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldnt1_gather">;
+def SVLDNT1UB_GATHER_64B_OFFSETS_S : MInst<"svldnt1ub_gather_[{3}]offset_{0}", "dPWx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldnt1_gather">;
+def SVLDNT1SH_GATHER_64B_OFFSETS_S : MInst<"svldnt1sh_gather_[{3}]offset_{0}", "dPTx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather">;
+def SVLDNT1UH_GATHER_64B_OFFSETS_S : MInst<"svldnt1uh_gather_[{3}]offset_{0}", "dPXx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather">;
+def SVLDNT1SW_GATHER_64B_OFFSETS_S : MInst<"svldnt1sw_gather_[{3}]offset_{0}", "dPUx", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather">;
+def SVLDNT1UW_GATHER_64B_OFFSETS_S : MInst<"svldnt1uw_gather_[{3}]offset_{0}", "dPYx", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather">;
+
+// Non-temporal gather load one vector (scalar base, unsigned vector offset in bytes)
+def SVLDNT1_GATHER_64B_OFFSETS_U   : MInst<"svldnt1_gather_[{3}]offset[_{0}]", "dPcu", "lUld", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldnt1_gather">;
+def SVLDNT1SB_GATHER_64B_OFFSETS_U : MInst<"svldnt1sb_gather_[{3}]offset_{0}", "dPSu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldnt1_gather">;
+def SVLDNT1UB_GATHER_64B_OFFSETS_U : MInst<"svldnt1ub_gather_[{3}]offset_{0}", "dPWu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldnt1_gather">;
+def SVLDNT1SH_GATHER_64B_OFFSETS_U : MInst<"svldnt1sh_gather_[{3}]offset_{0}", "dPTu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather">;
+def SVLDNT1UH_GATHER_64B_OFFSETS_U : MInst<"svldnt1uh_gather_[{3}]offset_{0}", "dPXu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather">;
+def SVLDNT1SW_GATHER_64B_OFFSETS_U : MInst<"svldnt1sw_gather_[{3}]offset_{0}", "dPUu", "lUl",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather">;
+def SVLDNT1UW_GATHER_64B_OFFSETS_U : MInst<"svldnt1uw_gather_[{3}]offset_{0}", "dPYu", "lUl",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather">;
+
+def SVLDNT1_GATHER_32B_OFFSETS_U   : MInst<"svldnt1_gather_[{3}]offset[_{0}]", "dPcu", "iUif", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldnt1_gather_uxtw">;
+def SVLDNT1SB_GATHER_32B_OFFSETS_U : MInst<"svldnt1sb_gather_[{3}]offset_{0}", "dPSu", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldnt1_gather_uxtw">;
+def SVLDNT1UB_GATHER_32B_OFFSETS_U : MInst<"svldnt1ub_gather_[{3}]offset_{0}", "dPWu", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldnt1_gather_uxtw">;
+def SVLDNT1SH_GATHER_32B_OFFSETS_U : MInst<"svldnt1sh_gather_[{3}]offset_{0}", "dPTu", "iUi",  [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather_uxtw">;
+def SVLDNT1UH_GATHER_32B_OFFSETS_U : MInst<"svldnt1uh_gather_[{3}]offset_{0}", "dPXu", "iUi",  [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather_uxtw">;
+
+// Non-temporal gather load one vector (vector base, scalar offset in bytes)
+def SVLDNT1_GATHER_OFFSET_S   : MInst<"svldnt1_gather[_{2}base]_offset_{0}",   "dPul", "ilUiUlfd", [IsGatherLoad, IsByteIndexed],               MemEltTyDefault, "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SB_GATHER_OFFSET_S : MInst<"svldnt1sb_gather[_{2}base]_offset_{0}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed],               MemEltTyInt8,    "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UB_GATHER_OFFSET_S : MInst<"svldnt1ub_gather[_{2}base]_offset_{0}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt8,    "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SH_GATHER_OFFSET_S : MInst<"svldnt1sh_gather[_{2}base]_offset_{0}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UH_GATHER_OFFSET_S : MInst<"svldnt1uh_gather[_{2}base]_offset_{0}", "dPul", "ilUiUl",   [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SW_GATHER_OFFSET_S : MInst<"svldnt1sw_gather[_{2}base]_offset_{0}", "dPul", "lUl",      [IsGatherLoad, IsByteIndexed],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UW_GATHER_OFFSET_S : MInst<"svldnt1uw_gather[_{2}base]_offset_{0}", "dPul", "lUl",      [IsGatherLoad, IsByteIndexed, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+
+// Non-temporal gather load one vector (scalar base, signed vector index)
+def SVLDNT1_GATHER_64B_INDICES_S   : MInst<"svldnt1_gather_[{3}]index[_{0}]", "dPcx", "lUld", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1SH_GATHER_64B_INDICES_S : MInst<"svldnt1sh_gather_[{3}]index_{0}", "dPTx", "lUl",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1UH_GATHER_64B_INDICES_S : MInst<"svldnt1uh_gather_[{3}]index_{0}", "dPXx", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1SW_GATHER_64B_INDICES_S : MInst<"svldnt1sw_gather_[{3}]index_{0}", "dPUx", "lUl",  [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1UW_GATHER_64B_INDICES_S : MInst<"svldnt1uw_gather_[{3}]index_{0}", "dPYx", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather_index">;
+
+// Non temporal gather load one vector (scalar base, unsigned vector index)
+def SVLDNT1_GATHER_64B_INDICES_U   : MInst<"svldnt1_gather_[{3}]index[_{0}]", "dPcu", "lUld", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1SH_GATHER_64B_INDICES_U : MInst<"svldnt1sh_gather_[{3}]index_{0}", "dPTu", "lUl",  [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1UH_GATHER_64B_INDICES_U : MInst<"svldnt1uh_gather_[{3}]index_{0}", "dPXu", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1SW_GATHER_64B_INDICES_U : MInst<"svldnt1sw_gather_[{3}]index_{0}", "dPUu", "lUl",  [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather_index">;
+def SVLDNT1UW_GATHER_64B_INDICES_U : MInst<"svldnt1uw_gather_[{3}]index_{0}", "dPYu", "lUl",  [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather_index">;
+
+// Non-temporal gather load one vector (vector base, signed scalar index)
+def SVLDNT1_GATHER_INDEX_S   : MInst<"svldnt1_gather[_{2}base]_index_{0}",   "dPul", "ilUiUlfd", [IsGatherLoad],               MemEltTyDefault, "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SH_GATHER_INDEX_S : MInst<"svldnt1sh_gather[_{2}base]_index_{0}", "dPul", "ilUiUl",   [IsGatherLoad],               MemEltTyInt16,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UH_GATHER_INDEX_S : MInst<"svldnt1uh_gather[_{2}base]_index_{0}", "dPul", "ilUiUl",   [IsGatherLoad, IsZExtReturn], MemEltTyInt16,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1SW_GATHER_INDEX_S : MInst<"svldnt1sw_gather[_{2}base]_index_{0}", "dPul", "lUl",      [IsGatherLoad],               MemEltTyInt32,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+def SVLDNT1UW_GATHER_INDEX_S : MInst<"svldnt1uw_gather[_{2}base]_index_{0}", "dPul", "lUl",      [IsGatherLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnt1_gather_scalar_offset">;
+
+// Non-temporal scatter store one vector (vector base)
+def SVSTNT1_SCATTER_BASES_U  : MInst<"svstnt1_scatter[_{2}base_{d}]",  "vPud", "ilUiUlfd", [IsScatterStore], MemEltTyDefault, "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1B_SCATTER_BASES_U : MInst<"svstnt1b_scatter[_{2}base_{d}]", "vPud", "ilUiUl",   [IsScatterStore], MemEltTyInt8,    "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1H_SCATTER_BASES_U : MInst<"svstnt1h_scatter[_{2}base_{d}]", "vPud", "ilUiUl",   [IsScatterStore], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1W_SCATTER_BASES_U : MInst<"svstnt1w_scatter[_{2}base_{d}]", "vPud", "lUl",      [IsScatterStore], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_scalar_offset">;
+
+// Non-temporal scatter store one vector (scalar base, signed vector offset in bytes)
+def SVSTNT1_SCATTER_64B_OFFSETS_S   : MInst<"svstnt1_scatter_[{3}]offset[_{d}]",  "vPpxd", "lUld", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_stnt1_scatter">;
+def SVSTNT1B_SCATTER_64B_OFFSETS_SS : MInst<"svstnt1b_scatter_[{3}]offset[_{d}]", "vPAxd", "l",    [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter">;
+def SVSTNT1B_SCATTER_64B_OFFSETS_SU : MInst<"svstnt1b_scatter_[{3}]offset[_{d}]", "vPExd", "Ul",   [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter">;
+def SVSTNT1H_SCATTER_64B_OFFSETS_SS : MInst<"svstnt1h_scatter_[{3}]offset[_{d}]", "vPBxd", "l",    [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter">;
+def SVSTNT1H_SCATTER_64B_OFFSETS_SU : MInst<"svstnt1h_scatter_[{3}]offset[_{d}]", "vPFxd", "Ul",   [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter">;
+def SVSTNT1W_SCATTER_64B_OFFSETS_SS : MInst<"svstnt1w_scatter_[{3}]offset[_{d}]", "vPCxd", "l",    [IsScatterStore, IsByteIndexed], MemEltTyInt32,   "aarch64_sve_stnt1_scatter">;
+def SVSTNT1W_SCATTER_64B_OFFSETS_SU : MInst<"svstnt1w_scatter_[{3}]offset[_{d}]", "vPGxd", "Ul",   [IsScatterStore, IsByteIndexed], MemEltTyInt32,   "aarch64_sve_stnt1_scatter">;
+
+// Non-temporal scatter store one vector (scalar base, unsigned vector offset in bytes)
+def SVSTNT1_SCATTER_64B_OFFSETS_U   : MInst<"svstnt1_scatter_[{3}]offset[_{d}]",  "vPpud", "lUld", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_stnt1_scatter">;
+def SVSTNT1B_SCATTER_64B_OFFSETS_US : MInst<"svstnt1b_scatter_[{3}]offset[_{d}]", "vPAud", "l",    [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter">;
+def SVSTNT1B_SCATTER_64B_OFFSETS_UU : MInst<"svstnt1b_scatter_[{3}]offset[_{d}]", "vPEud", "Ul",   [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter">;
+def SVSTNT1H_SCATTER_64B_OFFSETS_US : MInst<"svstnt1h_scatter_[{3}]offset[_{d}]", "vPBud", "l",    [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter">;
+def SVSTNT1H_SCATTER_64B_OFFSETS_UU : MInst<"svstnt1h_scatter_[{3}]offset[_{d}]", "vPFud", "Ul",   [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter">;
+def SVSTNT1W_SCATTER_64B_OFFSETS_US : MInst<"svstnt1w_scatter_[{3}]offset[_{d}]", "vPCud", "l",    [IsScatterStore, IsByteIndexed], MemEltTyInt32,   "aarch64_sve_stnt1_scatter">;
+def SVSTNT1W_SCATTER_64B_OFFSETS_UU : MInst<"svstnt1w_scatter_[{3}]offset[_{d}]", "vPGud", "Ul",   [IsScatterStore, IsByteIndexed], MemEltTyInt32,   "aarch64_sve_stnt1_scatter">;
+
+def SVSTNT1_SCATTER_32B_OFFSETS_U   : MInst<"svstnt1_scatter_[{3}]offset[_{d}]",  "vPpud", "iUif", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_stnt1_scatter_uxtw">;
+def SVSTNT1B_SCATTER_32B_OFFSETS_US : MInst<"svstnt1b_scatter_[{3}]offset[_{d}]", "vPAud", "i",    [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter_uxtw">;
+def SVSTNT1B_SCATTER_32B_OFFSETS_UU : MInst<"svstnt1b_scatter_[{3}]offset[_{d}]", "vPEud", "Ui",   [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter_uxtw">;
+def SVSTNT1H_SCATTER_32B_OFFSETS_US : MInst<"svstnt1h_scatter_[{3}]offset[_{d}]", "vPBud", "i",    [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_uxtw">;
+def SVSTNT1H_SCATTER_32B_OFFSETS_UU : MInst<"svstnt1h_scatter_[{3}]offset[_{d}]", "vPFud", "Ui",   [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_uxtw">;
+
+// Non-temporal scatter store one vector (vector base, scalar offset in bytes)
+def SVSTNT1_SCATTER_OFFSET_S  : MInst<"svstnt1_scatter[_{2}base]_offset[_{d}]",  "vPuld", "ilUiUlfd", [IsScatterStore, IsByteIndexed], MemEltTyDefault, "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1B_SCATTER_OFFSET_S : MInst<"svstnt1b_scatter[_{2}base]_offset[_{d}]", "vPuld", "ilUiUl",   [IsScatterStore, IsByteIndexed], MemEltTyInt8,    "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1H_SCATTER_OFFSET_S : MInst<"svstnt1h_scatter[_{2}base]_offset[_{d}]", "vPuld", "ilUiUl",   [IsScatterStore, IsByteIndexed], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1W_SCATTER_OFFSET_S : MInst<"svstnt1w_scatter[_{2}base]_offset[_{d}]", "vPuld", "lUl",      [IsScatterStore, IsByteIndexed], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_scalar_offset">;
+
+// Non-temporal scatter store one vector (scalar base, signed vector index)
+def SVSTNT1_SCATTER_INDICES_S   : MInst<"svstnt1_scatter_[{3}]index[_{d}]",  "vPpxd", "lUld", [IsScatterStore], MemEltTyDefault, "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1H_SCATTER_INDICES_SS : MInst<"svstnt1h_scatter_[{3}]index[_{d}]", "vPBxd", "l",    [IsScatterStore], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1H_SCATTER_INDICES_SU : MInst<"svstnt1h_scatter_[{3}]index[_{d}]", "vPFxd", "Ul",   [IsScatterStore], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1W_SCATTER_INDICES_SS : MInst<"svstnt1w_scatter_[{3}]index[_{d}]", "vPCxd", "l",    [IsScatterStore], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1W_SCATTER_INDICES_SU : MInst<"svstnt1w_scatter_[{3}]index[_{d}]", "vPGxd", "Ul",   [IsScatterStore], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_index">;
+
+// Non-temporal scatter store one vector (scalar base, unsigned vector index)
+def SVSTNT1_SCATTER_INDICES_U   : MInst<"svstnt1_scatter_[{3}]index[_{d}]",  "vPpud", "lUld", [IsScatterStore], MemEltTyDefault, "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1H_SCATTER_INDICES_US : MInst<"svstnt1h_scatter_[{3}]index[_{d}]", "vPBud", "l",    [IsScatterStore], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1H_SCATTER_INDICES_UU : MInst<"svstnt1h_scatter_[{3}]index[_{d}]", "vPFud", "Ul",   [IsScatterStore], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1W_SCATTER_INDICES_US : MInst<"svstnt1w_scatter_[{3}]index[_{d}]", "vPCud", "l",    [IsScatterStore], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_index">;
+def SVSTNT1W_SCATTER_INDICES_UU : MInst<"svstnt1w_scatter_[{3}]index[_{d}]", "vPGud", "Ul",   [IsScatterStore], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_index">;
+
+// Non-temporal scatter store one vector (vector base, signed scalar index)
+def SVSTNT1_SCATTER_INDEX_S  : MInst<"svstnt1_scatter[_{2}base]_index[_{d}]",  "vPuld", "ilUiUlfd", [IsScatterStore], MemEltTyDefault, "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1H_SCATTER_INDEX_S : MInst<"svstnt1h_scatter[_{2}base]_index[_{d}]", "vPuld", "ilUiUl",   [IsScatterStore], MemEltTyInt16,   "aarch64_sve_stnt1_scatter_scalar_offset">;
+def SVSTNT1W_SCATTER_INDEX_S : MInst<"svstnt1w_scatter[_{2}base]_index[_{d}]", "vPuld", "lUl",      [IsScatterStore], MemEltTyInt32,   "aarch64_sve_stnt1_scatter_scalar_offset">;
+}

clang/lib/CodeGen/CGBuiltin.cpp

Value *CodeGenFunction::vectorWrapScalar16(Value *Op) {
   llvm::Type *VTy = llvm::VectorType::get(Int16Ty, 4);
   Op = Builder.CreateBitCast(Op, Int16Ty);
   Value *V = UndefValue::get(VTy);
   llvm::Constant *CI = ConstantInt::get(SizeTy, 0);
   Op = Builder.CreateInsertElement(V, Op, CI);
   return Op;
 }
 
+/// SVEBuiltinMemEltTy - Returns the memory element type for this memory
+/// access builtin.  Only required if it can't be inferred from the base pointer
+/// operand.
+llvm::Type *CodeGenFunction::SVEBuiltinMemEltTy(SVETypeFlags TypeFlags) {
+  switch (TypeFlags.getMemEltType()) {
+  case SVETypeFlags::MemEltTyDefault:
+    return getEltType(TypeFlags);
+  case SVETypeFlags::MemEltTyInt8:
+    return Builder.getInt8Ty();
+  case SVETypeFlags::MemEltTyInt16:
+    return Builder.getInt16Ty();
+  case SVETypeFlags::MemEltTyInt32:
+    return Builder.getInt32Ty();
+  case SVETypeFlags::MemEltTyInt64:
+    return Builder.getInt64Ty();
+  }
+  llvm_unreachable("Unknown MemEltType");
+}
+
+llvm::Type *CodeGenFunction::getEltType(SVETypeFlags TypeFlags) {
+  switch (TypeFlags.getEltType()) {
+  default:
+    llvm_unreachable("Invalid SVETypeFlag!");
+
+  case SVETypeFlags::EltTyInt8:
+    return Builder.getInt8Ty();
+  case SVETypeFlags::EltTyInt16:
+    return Builder.getInt16Ty();
+  case SVETypeFlags::EltTyInt32:
+    return Builder.getInt32Ty();
+  case SVETypeFlags::EltTyInt64:
+    return Builder.getInt64Ty();
+
+  case SVETypeFlags::EltTyFloat16:
+    return Builder.getHalfTy();
+  case SVETypeFlags::EltTyFloat32:
+    return Builder.getFloatTy();
+  case SVETypeFlags::EltTyFloat64:
+    return Builder.getDoubleTy();
+
+  case SVETypeFlags::EltTyBool8:
+  case SVETypeFlags::EltTyBool16:
+  case SVETypeFlags::EltTyBool32:
+  case SVETypeFlags::EltTyBool64:
+    return Builder.getInt1Ty();
+  }
+}
+
 // Return the llvm vector type corresponding to the specified element TypeFlags.
-llvm::Type *CodeGenFunction::getSVEType(const SVETypeFlags &TypeFlags) {
+llvm::VectorType *CodeGenFunction::getSVEType(const SVETypeFlags &TypeFlags) {
   switch (TypeFlags.getEltType()) {
   default:
     llvm_unreachable("Invalid SVETypeFlag!");
 
   case SVETypeFlags::EltTyInt8:
     return llvm::VectorType::get(Builder.getInt8Ty(), {16, true});
   case SVETypeFlags::EltTyInt16:
     return llvm::VectorType::get(Builder.getInt16Ty(), {8, true});
Value *CodeGenFunction::EmitSVEPredicateCast(Value *Pred,
   }
 
   Function *F = CGM.getIntrinsic(IntID, IntrinsicTy);
   Value *C = Builder.CreateCall(F, Pred);
   assert(C->getType() == RTy && "Unexpected return type!");
   return C;
 }
 
+Value *CodeGenFunction::EmitSVEGatherLoad(SVETypeFlags TypeFlags,
+                                          SmallVectorImpl<Value *> &Ops,
+                                          unsigned IntID) {
+  auto *ResultTy = getSVEType(TypeFlags);
+  auto *OverloadedTy = llvm::VectorType::get(SVEBuiltinMemEltTy(TypeFlags),
+                                             ResultTy->getElementCount());
+
+  // At the ACLE level there's only one predicate type, svbool_t, which is
+  // mapped to <n x 16 x i1>. However, this might be incompatible with the
+  // actual type being loaded. For example, when loading doubles (i64) the
+  // predicated should be <n x 2 x i1> instead. At the IR level the type of
+  // the predicate and the data being loaded must match. Cast accordingly.
+  Ops[0] = EmitSVEPredicateCast(Ops[0], OverloadedTy);
+
+  Function *F = nullptr;
+  if (Ops[1]->getType()->isVectorTy())
+    // This is the "vector base, scalar offset" case. In order to uniquely
+    // map this built-in to an LLVM IR intrinsic, we need both the return type
+    // and the type of the vector base.
+    F = CGM.getIntrinsic(IntID, {OverloadedTy, Ops[1]->getType()});
+  else
+    // This is the "scalar base, vector offset case". The type of the offset
+    // is encoded in the name of the intrinsic. We only need to specify the
+    // return type in order to uniquely map this built-in to an LLVM IR
+    // intrinsic.
+    F = CGM.getIntrinsic(IntID, OverloadedTy);
+
+  // Pass 0 when the offset is missing. This can only be applied when using
+  // the "vector base" addressing mode for which ACLE allows no offset. The
+  // corresponding LLVM IR always requires an offset.
+  if (Ops.size() == 2) {
+    assert(Ops[1]->getType()->isVectorTy() && "Scalar base requires an offset");
+    Ops.push_back(ConstantInt::get(Int64Ty, 0));
+  }
+
+  // For "vector base, scalar index" scale the index so that it becomes a
+  // scalar offset.
+  if (!TypeFlags.isByteIndexed() && Ops[1]->getType()->isVectorTy()) {
+    unsigned BytesPerElt =
+        OverloadedTy->getElementType()->getScalarSizeInBits() / 8;
+    Value *Scale = ConstantInt::get(Int64Ty, BytesPerElt);
+    Ops[2] = Builder.CreateMul(Ops[2], Scale);
+  }
+
+  Value *Call = Builder.CreateCall(F, Ops);
+
+  // The following sext/zext is only needed when ResultTy != OverloadedTy. In
+  // other cases it's folded into a nop.
+  return TypeFlags.isZExtReturn() ? Builder.CreateZExt(Call, ResultTy)
+                                  : Builder.CreateSExt(Call, ResultTy);
+}
+
+Value *CodeGenFunction::EmitSVEScatterStore(SVETypeFlags TypeFlags,
+                                            SmallVectorImpl<Value *> &Ops,
+                                            unsigned IntID) {
+  auto *SrcDataTy = getSVEType(TypeFlags);
+  auto *OverloadedTy = llvm::VectorType::get(SVEBuiltinMemEltTy(TypeFlags),
+                                             SrcDataTy->getElementCount());
+
+  // In ACLE the source data is passed in the last argument, whereas in LLVM IR
+  // it's the first argument. Move it accordingly.
+  Ops.insert(Ops.begin(), Ops.pop_back_val());
+
+  Function *F = nullptr;
+  if (Ops[2]->getType()->isVectorTy())
+    // This is the "vector base, scalar offset" case. In order to uniquely
+    // map this built-in to an LLVM IR intrinsic, we need both the return type
+    // and the type of the vector base.
+    F = CGM.getIntrinsic(IntID, {OverloadedTy, Ops[2]->getType()});
+  else
+    // This is the "scalar base, vector offset case". The type of the offset
+    // is encoded in the name of the intrinsic. We only need to specify the
+    // return type in order to uniquely map this built-in to an LLVM IR
+    // intrinsic.
+    F = CGM.getIntrinsic(IntID, OverloadedTy);
+
+  // Pass 0 when the offset is missing. This can only be applied when using
+  // the "vector base" addressing mode for which ACLE allows no offset. The
+  // corresponding LLVM IR always requires an offset.
+  if (Ops.size() == 3) {
+    assert(Ops[1]->getType()->isVectorTy() && "Scalar base requires an offset");
+    Ops.push_back(ConstantInt::get(Int64Ty, 0));
+  }
+
+  // Truncation is needed when SrcDataTy != OverloadedTy. In other cases it's
+  // folded into a nop.
+  Ops[0] = Builder.CreateTrunc(Ops[0], OverloadedTy);
+
+  // At the ACLE level there's only one predicate type, svbool_t, which is
+  // mapped to <n x 16 x i1>. However, this might be incompatible with the
+  // actual type being stored. For example, when storing doubles (i64) the
+  // predicated should be <n x 2 x i1> instead. At the IR level the type of
+  // the predicate and the data being stored must match. Cast accordingly.
+  Ops[1] = EmitSVEPredicateCast(Ops[1], OverloadedTy);
+
+  // For "vector base, scalar index" scale the index so that it becomes a
+  // scalar offset.
+  if (!TypeFlags.isByteIndexed() && Ops[2]->getType()->isVectorTy()) {
+    unsigned BytesPerElt =
+        OverloadedTy->getElementType()->getScalarSizeInBits() / 8;
+    Value *Scale = ConstantInt::get(Int64Ty, BytesPerElt);
+    Ops[3] = Builder.CreateMul(Ops[3], Scale);
+  }
+
+  return Builder.CreateCall(F, Ops);
+}
+
 Value *CodeGenFunction::EmitSVEMaskedLoad(const CallExpr *E,
                                           llvm::Type *ReturnTy,
                                           SmallVectorImpl<Value *> &Ops,
                                           unsigned BuiltinID,
                                           bool IsZExtReturn) {
   QualType LangPTy = E->getArg(1)->getType();
   llvm::Type *MemEltTy = CGM.getTypes().ConvertType(
       LangPTy->getAs<PointerType>()->getPointeeType());
auto *Builtin = findARMVectorIntrinsicInMap(AArch64SVEIntrinsicMap, BuiltinID,
                                               AArch64SVEIntrinsicsProvenSorted);
   SVETypeFlags TypeFlags(Builtin->TypeModifier);
   llvm::Type *Ty = ConvertType(E->getType());
   if (TypeFlags.isLoad())
     return EmitSVEMaskedLoad(E, Ty, Ops, Builtin->LLVMIntrinsic,
                              TypeFlags.isZExtReturn());
   else if (TypeFlags.isStore())
     return EmitSVEMaskedStore(E, Ops, Builtin->LLVMIntrinsic);
+  else if (TypeFlags.isGatherLoad())
+    return EmitSVEGatherLoad(TypeFlags, Ops, Builtin->LLVMIntrinsic);
+  else if (TypeFlags.isScatterStore())
+    return EmitSVEScatterStore(TypeFlags, Ops, Builtin->LLVMIntrinsic);
   else if (Builtin->LLVMIntrinsic != 0) {
-    llvm::Type* OverloadedTy = getSVEType(TypeFlags);
+    llvm::VectorType *OverloadedTy = getSVEType(TypeFlags);
 
     if (TypeFlags.getMergeType() == SVETypeFlags::MergeZeroExp)
       InsertExplicitZeroOperand(Builder, Ty, Ops);
 
     if (TypeFlags.getMergeType() == SVETypeFlags::MergeAnyExp)
       InsertExplicitUndefOperand(Builder, Ty, Ops);
 
     // Predicates must match the main datatype.

clang/lib/CodeGen/CodeGenFunction.h

public:
   llvm::Value *EmitNeonSplat(llvm::Value *V, llvm::Constant *Idx,
                              const llvm::ElementCount &Count);
   llvm::Value *EmitNeonSplat(llvm::Value *V, llvm::Constant *Idx);
   llvm::Value *EmitNeonShiftVector(llvm::Value *V, llvm::Type *Ty,
                                    bool negateForRightShift);
   llvm::Value *EmitNeonRShiftImm(llvm::Value *Vec, llvm::Value *Amt,
                                  llvm::Type *Ty, bool usgn, const char *name);
   llvm::Value *vectorWrapScalar16(llvm::Value *Op);
+  /// SVEBuiltinMemEltTy - Returns the memory element type for this memory
+  /// access builtin.  Only required if it can't be inferred from the base
+  /// pointer operand.
+  llvm::Type *SVEBuiltinMemEltTy(SVETypeFlags TypeFlags);
 
-  llvm::Type *getSVEType(const SVETypeFlags &TypeFlags);
+  llvm::Type *getEltType(SVETypeFlags TypeFlags);
+
+  llvm::VectorType *getSVEType(const SVETypeFlags &TypeFlags);
   llvm::Value *EmitSVEPredicateCast(llvm::Value *Pred, llvm::VectorType *VTy);
+  llvm::Value *EmitSVEGatherLoad(SVETypeFlags TypeFlags,
+                                 llvm::SmallVectorImpl<llvm::Value *> &Ops,
+                                 unsigned IntID);
+  llvm::Value *EmitSVEScatterStore(SVETypeFlags TypeFlags,
+                                   llvm::SmallVectorImpl<llvm::Value *> &Ops,
+                                   unsigned IntID);
   llvm::Value *EmitSVEMaskedLoad(const CallExpr *, llvm::Type *ReturnTy,
                                  SmallVectorImpl<llvm::Value *> &Ops,
                                  unsigned BuiltinID, bool IsZExtReturn);
   llvm::Value *EmitSVEMaskedStore(const CallExpr *,
                                   SmallVectorImpl<llvm::Value *> &Ops,
                                   unsigned BuiltinID);
   llvm::Value *EmitAArch64SVEBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
 

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c

 {
   // CHECK-LABEL: test_svld1_f64
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to <vscale x 2 x double>*
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.masked.load.nxv2f64.p0nxv2f64(<vscale x 2 x double>* %[[BASE]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> zeroinitializer)
   // CHECK: ret <vscale x 2 x double> %[[LOAD]]
   return SVE_ACLE_FUNC(svld1,_f64,,)(pg, base);
 }
+
 svint8_t test_svld1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum)
 {
   // CHECK-LABEL: test_svld1_vnum_s8
   // CHECK: %[[BASE:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
   // CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 16 x i8> @llvm.masked.load.nxv16i8.p0nxv16i8(<vscale x 16 x i8>* %[[GEP]], i32 1, <vscale x 16 x i1> %pg, <vscale x 16 x i8> zeroinitializer)
   // CHECK: ret <vscale x 16 x i8> %[[LOAD]]
   return SVE_ACLE_FUNC(svld1_vnum,_s8,,)(pg, base, vnum);
svfloat64_t test_svld1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum)
   // CHECK-LABEL: test_svld1_vnum_f64
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to <vscale x 2 x double>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x double>, <vscale x 2 x double>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.masked.load.nxv2f64.p0nxv2f64(<vscale x 2 x double>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> zeroinitializer)
   // CHECK: ret <vscale x 2 x double> %[[LOAD]]
   return SVE_ACLE_FUNC(svld1_vnum,_f64,,)(pg, base, vnum);
 }
+
+svint32_t test_svld1_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1_gather_u32base_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svld1_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1_gather_u64base_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svld1_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1_gather_u32base_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svld1_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _u64, )(pg, bases);
+}
+
+svfloat32_t test_svld1_gather_u32base_f32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1_gather_u32base_f32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _f32, )(pg, bases);
+}
+
+svfloat64_t test_svld1_gather_u64base_f64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1_gather_u64base_f64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _f64, )(pg, bases);
+}
+
+svint32_t test_svld1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_s32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _s32)(pg, base, offsets);
+}
+
+svint64_t test_svld1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _s64)(pg, base, offsets);
+}
+
+svuint32_t test_svld1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_s32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _u32)(pg, base, offsets);
+}
+
+svuint64_t test_svld1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _u64)(pg, base, offsets);
+}
+
+svfloat32_t test_svld1_gather_s32offset_f32(svbool_t pg, const float32_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_s32offset_f32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32(<vscale x 4 x i1> %[[PG]], float* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _f32)(pg, base, offsets);
+}
+
+svfloat64_t test_svld1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_s64offset_f64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _f64)(pg, base, offsets);
+}
+
+svint32_t test_svld1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_u32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _s32)(pg, base, offsets);
+}
+
+svint64_t test_svld1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_u64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _s64)(pg, base, offsets);
+}
+
+svuint32_t test_svld1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_u32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _u32)(pg, base, offsets);
+}
+
+svuint64_t test_svld1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_u64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _u64)(pg, base, offsets);
+}
+
+svfloat32_t test_svld1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_u32offset_f32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32(<vscale x 4 x i1> %[[PG]], float* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _f32)(pg, base, offsets);
+}
+
+svfloat64_t test_svld1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1_gather_u64offset_f64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _f64)(pg, base, offsets);
+}
+
+svint32_t test_svld1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1_gather_u32base_offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svld1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svld1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1_gather_u32base_offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svfloat32_t test_svld1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1_gather_u32base_offset_f32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_f32, )(pg, bases, offset);
+}
+
+svfloat64_t test_svld1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1_gather_u64base_offset_f64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_f64, )(pg, bases, offset);
+}
+
+svint32_t test_svld1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1_gather_s32index_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s32, index, _s32)(pg, base, indices);
+}
+
+svint64_t test_svld1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1_gather_s64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s64, index, _s64)(pg, base, indices);
+}
+
+svuint32_t test_svld1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1_gather_s32index_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s32, index, _u32)(pg, base, indices);
+}
+
+svuint64_t test_svld1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1_gather_s64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s64, index, _u64)(pg, base, indices);
+}
+
+svfloat32_t test_svld1_gather_s32index_f32(svbool_t pg, const float32_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1_gather_s32index_f32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32(<vscale x 4 x i1> %[[PG]], float* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s32, index, _f32)(pg, base, indices);
+}
+
+svfloat64_t test_svld1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1_gather_s64index_f64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.index.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, s64, index, _f64)(pg, base, indices);
+}
+
+svint32_t test_svld1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1_gather_u32index_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u32, index, _s32)(pg, base, indices);
+}
+
+svint64_t test_svld1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1_gather_u64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u64, index, _s64)(pg, base, indices);
+}
+
+svuint32_t test_svld1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1_gather_u32index_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> %[[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u32, index, _u32)(pg, base, indices);
+}
+
+svuint64_t test_svld1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1_gather_u64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.index.nxv2i64(<vscale x 2 x i1> %[[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u64, index, _u64)(pg, base, indices);
+}
+
+svfloat32_t test_svld1_gather_u32index_f32(svbool_t pg, const float32_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1_gather_u32index_f32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32(<vscale x 4 x i1> %[[PG]], float* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u32, index, _f32)(pg, base, indices);
+}
+
+svfloat64_t test_svld1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1_gather_u64index_f64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.index.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather_, u64, index, _f64)(pg, base, indices);
+}
+
+svint32_t test_svld1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1_gather_u32base_index_s32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svld1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1_gather_u64base_index_s64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svld1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1_gather_u32base_index_u32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: ret <vscale x 4 x i32> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svld1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1_gather_u64base_index_u64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: ret <vscale x 2 x i64> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_u64, )(pg, bases, index);
+}
+
+svfloat32_t test_svld1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1_gather_u32base_index_f32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: ret <vscale x 4 x float> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_f32, )(pg, bases, index);
+}
+
+svfloat64_t test_svld1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1_gather_u64base_index_f64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: ret <vscale x 2 x double> %[[LOAD]]
+  return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_f64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c

svuint64_t test_svld1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.masked.load.nxv2i8.p0nxv2i8(<vscale x 2 x i8>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i8> zeroinitializer)
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svld1sb_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svld1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1sb_gather_u32base_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svld1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1sb_gather_u64base_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svld1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1sb_gather_u32base_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svld1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1sb_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svld1sb_gather_s32offset_s32(svbool_t pg, const int8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_s32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1sb_gather_s32offset_u32(svbool_t pg, const int8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_s32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_u32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_u64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_u32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1sb_gather_u64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sb_gather_u32base_offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svld1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sb_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svld1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sb_gather_u32base_offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1sb_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sb_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c

svuint64_t test_svld1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to <vscale x 2 x i16>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i16>, <vscale x 2 x i16>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.masked.load.nxv2i16.p0nxv2i16(<vscale x 2 x i16>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i16> zeroinitializer)
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svld1sh_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svld1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1sh_gather_u32base_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svld1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1sh_gather_u64base_s64
+  // CHECK: %[[PG.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svld1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1sh_gather_u32base_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svld1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1sh_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svld1sh_gather_s32offset_s32(svbool_t pg, const int16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_s32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1sh_gather_s32offset_u32(svbool_t pg, const int16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_s32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_u32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_u64offset_s64
+  // CHECK: %[[PG]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_u32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1sh_gather_u64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sh_gather_u32base_offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svld1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sh_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svld1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sh_gather_u32base_offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %2
+  return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sh_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint32_t test_svld1sh_gather_s32index_s32(svbool_t pg, const int16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_s32index_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svld1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_s64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svld1sh_gather_s32index_u32(svbool_t pg, const int16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_s32index_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svld1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_s64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svld1sh_gather_u32index_s32(svbool_t pg, const int16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_u32index_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svld1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_u64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svld1sh_gather_u32index_u32(svbool_t pg, const int16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_u32index_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svld1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1sh_gather_u64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]]  = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]]  = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svld1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1sh_gather_u32base_index_s32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svld1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1sh_gather_u64base_index_s64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svld1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1sh_gather_u32base_index_u32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svld1sh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1sh_gather_u64base_index_u64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c

svuint64_t test_svld1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0nxv2i32(<vscale x 2 x i32>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i32> zeroinitializer)
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svld1sw_vnum_u64(pg, base, vnum);
 }
+
+svint64_t test_svld1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1sw_gather_u64base_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint64_t test_svld1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1sw_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svld1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1sw_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1sw_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svld1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1sw_gather_u64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1sw_gather_u64offset_u64
+  // CHECK: %[[PG]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svld1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sw_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1sw_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svld1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1sw_gather_s64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svld1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1sw_gather_s64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svld1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1sw_gather_u64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]]  = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]]  = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svld1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1sw_gather_u64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svld1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1sw_gather_u64base_index_s64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint64_t test_svld1sw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1sw_gather_u64base_index_u64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: <vscale x 2 x i64> %[[SEXT]]
+  return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c

svuint64_t test_svld1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.masked.load.nxv2i8.p0nxv2i8(<vscale x 2 x i8>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i8> zeroinitializer)
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svld1ub_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svld1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1ub_gather_u32base_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svld1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1ub_gather_u64base_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svld1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1ub_gather_u32base_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svld1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1ub_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svld1ub_gather_s32offset_s32(svbool_t pg, const uint8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_s32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1ub_gather_s32offset_u32(svbool_t pg, const uint8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_s32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_u32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_u64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_u32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1ub_gather_u64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1ub_gather_u32base_offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svld1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1ub_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svld1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1ub_gather_u32base_offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1ub_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1ub_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c

svuint64_t test_svld1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to <vscale x 2 x i16>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i16>, <vscale x 2 x i16>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.masked.load.nxv2i16.p0nxv2i16(<vscale x 2 x i16>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i16> zeroinitializer)
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svld1uh_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svld1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1uh_gather_u32base_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svld1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1uh_gather_u64base_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svld1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svld1uh_gather_u32base_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: et <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svld1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1uh_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svld1uh_gather_s32offset_s32(svbool_t pg, const uint16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_s32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %1 to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1uh_gather_s32offset_u32(svbool_t pg, const uint16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_s32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %1 to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_u32offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svld1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_u64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svld1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_u32offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1uh_gather_u64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %1 to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svld1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1uh_gather_u32base_offset_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svld1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1uh_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svld1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1uh_gather_u32base_offset_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %2
+  return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1uh_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint32_t test_svld1uh_gather_s32index_s32(svbool_t pg, const uint16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_s32index_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svld1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_s64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svld1uh_gather_s32index_u32(svbool_t pg, const uint16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_s32index_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svld1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_s64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svld1uh_gather_u32index_s32(svbool_t pg, const uint16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_u32index_s32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svld1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_u64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svld1uh_gather_u32index_u32(svbool_t pg, const uint16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_u32index_u32
+  // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svld1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1uh_gather_u64index_u64
+  // CHECK: %[[PG]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.index.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svld1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1uh_gather_u32base_index_s32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svld1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1uh_gather_u64base_index_s64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svld1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1uh_gather_u32base_index_u32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %bases, i64 %[[SHL]])
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svld1uh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1uh_gather_u64base_index_u64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c

svuint64_t test_svld1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BASE]], i64 %vnum
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.masked.load.nxv2i32.p0nxv2i32(<vscale x 2 x i32>* %[[GEP]], i32 1, <vscale x 2 x i1> %[[PG]], <vscale x 2 x i32> zeroinitializer)
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svld1uw_vnum_u64(pg, base, vnum);
 }
+
+svint64_t test_svld1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1uw_gather_u64base_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint64_t test_svld1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svld1uw_gather_u64base_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svld1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1uw_gather_s64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svld1uw_gather_s64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svld1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1uw_gather_u64offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svld1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svld1uw_gather_u64offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svld1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1uw_gather_u64base_offset_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint64_t test_svld1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svld1uw_gather_u64base_offset_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svld1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1uw_gather_s64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %1 to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svld1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svld1uw_gather_s64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %1 to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svld1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1uw_gather_u64index_s64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svld1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svld1uw_gather_u64index_u64
+  // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.index.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svld1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1uw_gather_u64base_index_s64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint64_t test_svld1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svld1uw_gather_u64base_index_u64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2
+  // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %bases, i64 %[[SHL]])
+  // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
+  // CHECK: <vscale x 2 x i64> %[[ZEXT]]
+  return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c

svfloat64_t test_svldff1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum)
   // CHECK-LABEL: test_svldff1_vnum_f64
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to <vscale x 2 x double>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x double>, <vscale x 2 x double>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.nxv2f64(<vscale x 2 x i1> %[[PG]], double* %[[GEP]])
   // CHECK: ret <vscale x 2 x double> %[[LOAD]]
   return SVE_ACLE_FUNC(svldff1_vnum,_f64,,)(pg, base, vnum);
 }
+
+svint32_t test_svldff1_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldff1_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldff1_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldff1_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _u64, )(pg, bases);
+}
+
+svfloat32_t test_svldff1_gather_u32base_f32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _f32, )(pg, bases);
+}
+
+svfloat64_t test_svldff1_gather_u64base_f64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _f64, )(pg, bases);
+}
+
+svint32_t test_svldff1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_s32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _s32)(pg, base, offsets);
+}
+
+svint64_t test_svldff1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _s64)(pg, base, offsets);
+}
+
+svuint32_t test_svldff1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_s32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _u32)(pg, base, offsets);
+}
+
+svuint64_t test_svldff1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _u64)(pg, base, offsets);
+}
+
+svfloat32_t test_svldff1_gather_s32offset_f32(svbool_t pg, const float32_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_s32offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32(<vscale x 4 x i1> [[PG]], float* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _f32)(pg, base, offsets);
+}
+
+svfloat64_t test_svldff1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_s64offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _f64)(pg, base, offsets);
+}
+
+svint32_t test_svldff1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _s32)(pg, base, offsets);
+}
+
+svint64_t test_svldff1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _s64)(pg, base, offsets);
+}
+
+svuint32_t test_svldff1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _u32)(pg, base, offsets);
+}
+
+svuint64_t test_svldff1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _u64)(pg, base, offsets);
+}
+
+svfloat32_t test_svldff1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_u32offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32(<vscale x 4 x i1> [[PG]], float* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _f32)(pg, base, offsets);
+}
+
+svfloat64_t test_svldff1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1_gather_u64offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _f64)(pg, base, offsets);
+}
+
+svint32_t test_svldff1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldff1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svfloat32_t test_svldff1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_f32, )(pg, bases, offset);
+}
+
+svfloat64_t test_svldff1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_f64, )(pg, bases, offset);
+}
+
+svint32_t test_svldff1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_s32index_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _s32)(pg, base, indices);
+}
+
+svint64_t test_svldff1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _s64)(pg, base, indices);
+}
+
+svuint32_t test_svldff1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_s32index_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _u32)(pg, base, indices);
+}
+
+svuint64_t test_svldff1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _u64)(pg, base, indices);
+}
+
+svfloat32_t test_svldff1_gather_s32index_f32(svbool_t pg, const float32_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_s32index_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32(<vscale x 4 x i1> [[PG]], float* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _f32)(pg, base, indices);
+}
+
+svfloat64_t test_svldff1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_s64index_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.index.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _f64)(pg, base, indices);
+}
+
+svint32_t test_svldff1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_u32index_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _s32)(pg, base, indices);
+}
+
+svint64_t test_svldff1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _s64)(pg, base, indices);
+}
+
+svuint32_t test_svldff1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_u32index_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _u32)(pg, base, indices);
+}
+
+svuint64_t test_svldff1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _u64)(pg, base, indices);
+}
+
+svfloat32_t test_svldff1_gather_u32index_f32(svbool_t pg, const float32_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_u32index_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32(<vscale x 4 x i1> [[PG]], float* %base, <vscale x 4 x i32> %indices)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _f32)(pg, base, indices);
+}
+
+svfloat64_t test_svldff1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1_gather_u64index_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.index.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _f64)(pg, base, indices);
+}
+
+svint32_t test_svldff1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svldff1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svldff1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svldff1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_u64, )(pg, bases, index);
+}
+
+svfloat32_t test_svldff1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1_gather_u32base_index_f32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_f32, )(pg, bases, index);
+}
+
+svfloat64_t test_svldff1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1_gather_u64base_index_f64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_f64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c

svuint64_t test_svldff1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]])
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svldff1sb_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svldff1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1sb_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldff1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1sb_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldff1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1sb_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldff1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1sb_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svldff1sb_gather_s32offset_s32(svbool_t pg, const int8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_s32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1sb_gather_s32offset_u32(svbool_t pg, const int8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_s32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sb_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sb_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sb_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldff1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sb_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1sb_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sb_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c

 // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 
 #include <arm_sve.h>
 
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
 svint32_t test_svldff1sh_s32(svbool_t pg, const int16_t *base)
 {
   // CHECK-LABEL: test_svldff1sh_s32
   // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
   // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base)
   // CHECK: %[[SEXT:.*]] = sext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
   // CHECK: ret <vscale x 4 x i32> %[[SEXT]]
   return svldff1sh_s32(pg, base);
svuint64_t test_svldff1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 2 x i16>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i16>, <vscale x 2 x i16>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %[[GEP]])
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svldff1sh_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svldff1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldff1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldff1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldff1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svldff1sh_gather_s32offset_s32(svbool_t pg, const int16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_s32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1sh_gather_s32offset_u32(svbool_t pg, const int16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_s32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldff1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint32_t test_svldff1sh_gather_s32index_s32(svbool_t pg, const int16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_s32index_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svldff1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svldff1sh_gather_s32index_u32(svbool_t pg, const int16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_s32index_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svldff1sh_gather_u32index_s32(svbool_t pg, const int16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32index_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svldff1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svldff1sh_gather_u32index_u32(svbool_t pg, const int16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32index_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svldff1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svldff1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svldff1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1sh_gather_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svldff1sh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1sh_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c

 // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 
 #include <arm_sve.h>
 
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
 svint64_t test_svldff1sw_s64(svbool_t pg, const int32_t *base)
 {
   // CHECK-LABEL: test_svldff1sw_s64
   // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base)
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svldff1sw_s64(pg, base);
svuint64_t test_svldff1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %[[GEP]])
   // CHECK: %[[SEXT:.*]] = sext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[SEXT]]
   return svldff1sw_vnum_u64(pg, base, vnum);
 }
+
+svint64_t test_svldff1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint64_t test_svldff1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldff1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sw_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sw_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1sw_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1sw_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldff1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldff1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint64_t test_svldff1sw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1sw_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c

 // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 
 #include <arm_sve.h>
 
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
 svint16_t test_svldff1ub_s16(svbool_t pg, const uint8_t *base)
 {
   // CHECK-LABEL: test_svldff1ub_s16
   // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
   // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldff1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base)
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
   // CHECK: ret <vscale x 8 x i16> %[[ZEXT]]
   return svldff1ub_s16(pg, base);
svuint64_t test_svldff1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]])
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svldff1ub_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svldff1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1ub_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldff1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1ub_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldff1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1ub_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldff1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1ub_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svldff1ub_gather_s32offset_s32(svbool_t pg, const uint8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_s32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1ub_gather_s32offset_u32(svbool_t pg, const uint8_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_s32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1ub_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1ub_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1ub_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldff1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1ub_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1ub_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1ub_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c

 // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 
 #include <arm_sve.h>
 
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
 svint32_t test_svldff1uh_s32(svbool_t pg, const uint16_t *base)
 {
   // CHECK-LABEL: test_svldff1uh_s32
   // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
   // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base)
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
   // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
   return svldff1uh_s32(pg, base);
svuint64_t test_svldff1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 2 x i16>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i16>, <vscale x 2 x i16>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %[[GEP]])
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svldff1uh_vnum_u64(pg, base, vnum);
 }
+
+svint32_t test_svldff1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldff1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldff1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldff1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint32_t test_svldff1uh_gather_s32offset_s32(svbool_t pg, const uint16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_s32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1uh_gather_s32offset_u32(svbool_t pg, const uint16_t *base, svint32_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_s32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldff1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldff1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldff1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint32_t test_svldff1uh_gather_s32index_s32(svbool_t pg, const uint16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_s32index_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svldff1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svldff1uh_gather_s32index_u32(svbool_t pg, const uint16_t *base, svint32_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_s32index_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svldff1uh_gather_u32index_s32(svbool_t pg, const uint16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32index_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u32, index_s32, )(pg, base, indices);
+}
+
+svint64_t test_svldff1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint32_t test_svldff1uh_gather_u32index_u32(svbool_t pg, const uint16_t *base, svuint32_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32index_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u32, index_u32, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svldff1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svldff1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svldff1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1uh_gather_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svldff1uh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1uh_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c

 // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
 
 #include <arm_sve.h>
 
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
 svint64_t test_svldff1uw_s64(svbool_t pg, const uint32_t *base)
 {
   // CHECK-LABEL: test_svldff1uw_s64
   // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %base)
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svldff1uw_s64(pg, base);
svuint64_t test_svldff1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum)
   // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
   // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to <vscale x 2 x i32>*
   // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i32>, <vscale x 2 x i32>* %[[BITCAST]], i64 %vnum, i64 0
   // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.nxv2i32(<vscale x 2 x i1> %[[PG]], i32* %[[GEP]])
   // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i32> %[[LOAD]] to <vscale x 2 x i64>
   // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
   return svldff1uw_vnum_u64(pg, base, vnum);
 }
+
+svint64_t test_svldff1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint64_t test_svldff1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldff1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uw_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uw_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldff1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldff1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint64_t test_svldff1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svldff1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1uw_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldff1uw_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldff1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldff1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldff1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint64_t test_svldff1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldff1uw_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint32_t test_svldnt1_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_s32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldnt1_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldnt1_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_u32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldnt1_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _u64, )(pg, bases);
+}
+
+svfloat32_t test_svldnt1_gather_u32base_f32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_f32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_f32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _f32, )(pg, bases);
+}
+
+svfloat64_t test_svldnt1_gather_u64base_f64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_f64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _f64, )(pg, bases);
+}
+
+svint64_t test_svldnt1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, s64, offset, _s64)(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, s64, offset, _u64)(pg, base, offsets);
+}
+
+svfloat64_t test_svldnt1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_s64offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64offset_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, s64, offset, _f64)(pg, base, offsets);
+}
+
+svint32_t test_svldnt1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u32, offset, _s32)(pg, base, offsets);
+}
+
+svint64_t test_svldnt1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u64, offset, _s64)(pg, base, offsets);
+}
+
+svuint32_t test_svldnt1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32(<vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u32, offset, _u32)(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u64, offset, _u64)(pg, base, offsets);
+}
+
+svfloat32_t test_svldnt1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_u32offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32(<vscale x 4 x i1> [[PG]], float* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32offset_f32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u32, offset, _f32)(pg, base, offsets);
+}
+
+svfloat64_t test_svldnt1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1_gather_u64offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64offset_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u64, offset, _f64)(pg, base, offsets);
+}
+
+svint32_t test_svldnt1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldnt1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svfloat32_t test_svldnt1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_f32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_offset_f32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _offset_f32, )(pg, bases, offset);
+}
+
+svfloat64_t test_svldnt1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_f64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_offset_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _offset_f64, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, s64, index, _s64)(pg, base, indices);
+}
+
+svuint64_t test_svldnt1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, s64, index, _u64)(pg, base, indices);
+}
+
+svfloat64_t test_svldnt1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1_gather_s64index_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64index_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, s64, index, _f64)(pg, base, indices);
+}
+
+svint64_t test_svldnt1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u64, index, _s64)(pg, base, indices);
+}
+
+svuint64_t test_svldnt1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64(<vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u64, index, _u64)(pg, base, indices);
+}
+
+svfloat64_t test_svldnt1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1_gather_u64index_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64(<vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64index_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather_, u64, index, _f64)(pg, base, indices);
+}
+
+svint32_t test_svldnt1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_index_s32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svldnt1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svldnt1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 4 x i32> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_index_u32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svldnt1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 2 x i64> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _index_u64, )(pg, bases, index);
+}
+
+svfloat32_t test_svldnt1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1_gather_u32base_index_f32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 4 x float> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_f32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_index_f32'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _index_f32, )(pg, bases, index);
+}
+
+svfloat64_t test_svldnt1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1_gather_u64base_index_f64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret <vscale x 2 x double> [[LOAD]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_f64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_index_f64'}}
+  return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _index_f64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint32_t test_svldnt1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldnt1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldnt1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldnt1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldnt1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sb_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sb_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldnt1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldnt1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1sb_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sb_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint32_t test_svldnt1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldnt1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldnt1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldnt1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldnt1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sh_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sh_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldnt1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldnt1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sh_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sh_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldnt1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svldnt1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_index_s32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svldnt1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svldnt1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_index_u32'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svldnt1sh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1sh_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint64_t test_svldnt1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint64_t test_svldnt1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldnt1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sw_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sw_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sw_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sw_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldnt1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldnt1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint64_t test_svldnt1sw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1sw_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[SEXT:%.*]] = sext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[SEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint32_t test_svldnt1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_s32'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldnt1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldnt1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_u32'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldnt1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldnt1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1ub_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1ub_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldnt1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8(<vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.nxv2i8(<vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldnt1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i8> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1ub_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1ub_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i8> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint32_t test_svldnt1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_s32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _s32, )(pg, bases);
+}
+
+svint64_t test_svldnt1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint32_t test_svldnt1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_u32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _u32, )(pg, bases);
+}
+
+svuint64_t test_svldnt1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldnt1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uh_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uh_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, u32, offset_s32, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint32_t test_svldnt1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, svuint32_t offsets) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16(<vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, u32, offset_u32, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint32_t test_svldnt1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _offset_s32, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint32_t test_svldnt1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _offset_u32, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uh_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uh_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldnt1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint32_t test_svldnt1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_index_s32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _index_s32, )(pg, bases, index);
+}
+
+svint64_t test_svldnt1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint32_t test_svldnt1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 4 x i16> [[LOAD]] to <vscale x 4 x i32>
+  // CHECK: ret <vscale x 4 x i32> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u32'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_index_u32'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _index_u32, )(pg, bases, index);
+}
+
+svuint64_t test_svldnt1uh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1uh_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i16> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+svint64_t test_svldnt1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _s64, )(pg, bases);
+}
+
+svuint64_t test_svldnt1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _u64, )(pg, bases);
+}
+
+svint64_t test_svldnt1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uw_gather_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uw_gather_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, offset_s64, )(pg, base, offsets);
+}
+
+svuint64_t test_svldnt1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, offset_u64, )(pg, base, offsets);
+}
+
+svint64_t test_svldnt1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _offset_s64, )(pg, bases, offset);
+}
+
+svuint64_t test_svldnt1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _offset_u64, )(pg, bases, offset);
+}
+
+svint64_t test_svldnt1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uw_gather_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uw_gather_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldnt1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, index_s64, )(pg, base, indices);
+}
+
+svuint64_t test_svldnt1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, index_u64, )(pg, base, indices);
+}
+
+svint64_t test_svldnt1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_s64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _index_s64, )(pg, bases, index);
+}
+
+svuint64_t test_svldnt1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) {
+  // CHECK-LABEL: test_svldnt1uw_gather_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: [[LOAD:%.*]] = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: [[ZEXT:%.*]] = zext <vscale x 2 x i32> [[LOAD]] to <vscale x 2 x i64>
+  // CHECK: ret <vscale x 2 x i64> [[ZEXT]]
+  // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_u64'}}
+  // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _index_u64, )(pg, bases, index);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+void test_svstnt1_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_s32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, , _s32)(pg, bases, data);
+}
+
+void test_svstnt1_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, , _s64)(pg, bases, data);
+}
+
+void test_svstnt1_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_u32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, , _u32)(pg, bases, data);
+}
+
+void test_svstnt1_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, , _u64)(pg, bases, data);
+}
+
+void test_svstnt1_scatter_u32base_f32(svbool_t pg, svuint32_t bases, svfloat32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_f32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, , _f32)(pg, bases, data);
+}
+
+void test_svstnt1_scatter_u64base_f64(svbool_t pg, svuint64_t bases, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, , _f64)(pg, bases, data);
+}
+
+void test_svstnt1_scatter_s64offset_s64(svbool_t pg, int64_t *base, svint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_s64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, s64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_s64offset_u64(svbool_t pg, uint64_t *base, svint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_s64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, s64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_s64offset_f64(svbool_t pg, float64_t *base, svint64_t offsets, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_s64offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64offset_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, s64, offset, _f64)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u32offset_s32(svbool_t pg, int32_t *base, svuint32_t offsets, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u32, offset, _s32)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u64offset_s64(svbool_t pg, int64_t *base, svuint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u32offset_u32(svbool_t pg, uint32_t *base, svuint32_t offsets, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], i32* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u32, offset, _u32)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u64offset_u64(svbool_t pg, uint64_t *base, svuint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u32offset_f32(svbool_t pg, float32_t *base, svuint32_t offsets, svfloat32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x i1> [[PG]], float* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32offset_f32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u32, offset, _f32)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u64offset_f64(svbool_t pg, float64_t *base, svuint64_t offsets, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64offset_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u64, offset, _f64)(pg, base, offsets, data);
+}
+
+void test_svstnt1_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_offset_s32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _offset, _s32)(pg, bases, offset, data);
+}
+
+void test_svstnt1_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_offset_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _offset, _s64)(pg, bases, offset, data);
+}
+
+void test_svstnt1_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_offset_u32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _offset, _u32)(pg, bases, offset, data);
+}
+
+void test_svstnt1_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_offset_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _offset, _u64)(pg, bases, offset, data);
+}
+
+void test_svstnt1_scatter_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset, svfloat32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_offset_f32
+  // CHECK: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_offset_f32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _offset, _f32)(pg, bases, offset, data);
+}
+
+void test_svstnt1_scatter_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_offset_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_offset_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _offset, _f64)(pg, bases, offset, data);
+}
+
+void test_svstnt1_scatter_s64index_s64(svbool_t pg, int64_t *base, svint64_t indices, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_s64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, s64, index, _s64)(pg, base, indices, data);
+}
+
+void test_svstnt1_scatter_s64index_u64(svbool_t pg, uint64_t *base, svint64_t indices, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_s64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, s64, index, _u64)(pg, base, indices, data);
+}
+
+void test_svstnt1_scatter_s64index_f64(svbool_t pg, float64_t *base, svint64_t indices, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_s64index_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64index_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, s64, index, _f64)(pg, base, indices, data);
+}
+
+void test_svstnt1_scatter_u64index_s64(svbool_t pg, int64_t *base, svuint64_t indices, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64index_s64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u64, index, _s64)(pg, base, indices, data);
+}
+
+void test_svstnt1_scatter_u64index_u64(svbool_t pg, uint64_t *base, svuint64_t indices, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64index_u64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], i64* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u64, index, _u64)(pg, base, indices, data);
+}
+
+void test_svstnt1_scatter_u64index_f64(svbool_t pg, float64_t *base, svuint64_t indices, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64index_f64
+  // CHECK: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], double* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64index_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter_, u64, index, _f64)(pg, base, indices, data);
+}
+
+void test_svstnt1_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_index_s32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_index_s32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _index, _s32)(pg, bases, index, data);
+}
+
+void test_svstnt1_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_index_s64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _index, _s64)(pg, bases, index, data);
+}
+
+void test_svstnt1_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_index_u32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_index_u32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _index, _u32)(pg, bases, index, data);
+}
+
+void test_svstnt1_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_index_u64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _index, _u64)(pg, bases, index, data);
+}
+
+void test_svstnt1_scatter_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index, svfloat32_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u32base_index_f32
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float> %data, <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_index_f32'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _index, _f32)(pg, bases, index, data);
+}
+
+void test_svstnt1_scatter_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index, svfloat64_t data) {
+  // CHECK-LABEL: test_svstnt1_scatter_u64base_index_f64
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data, <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_index_f64'}}
+  return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _index, _f64)(pg, bases, index, data);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+void test_svstnt1b_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u32base_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_s32'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, , _s32)(pg, bases, data);
+}
+
+void test_svstnt1b_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u64base_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_s64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, , _s64)(pg, bases, data);
+}
+
+void test_svstnt1b_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u32base_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_u32'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, , _u32)(pg, bases, data);
+}
+
+void test_svstnt1b_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u64base_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_u64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, , _u64)(pg, bases, data);
+}
+
+void test_svstnt1b_scatter_s64offset_s64(svbool_t pg, int8_t *base, svint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_s64offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter_, s64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1b_scatter_s64offset_u64(svbool_t pg, uint8_t *base, svint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_s64offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter_, s64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1b_scatter_u32offset_s32(svbool_t pg, int8_t *base, svuint32_t offsets, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u32offset_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8(<vscale x 4 x i8> [[TRUNC]], <vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter_, u32, offset, _s32)(pg, base, offsets, data);
+}
+
+void test_svstnt1b_scatter_u64offset_s64(svbool_t pg, int8_t *base, svuint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u64offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter_, u64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1b_scatter_u32offset_u32(svbool_t pg, uint8_t *base, svuint32_t offsets, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u32offset_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8(<vscale x 4 x i8> [[TRUNC]], <vscale x 4 x i1> [[PG]], i8* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter_, u32, offset, _u32)(pg, base, offsets, data);
+}
+
+void test_svstnt1b_scatter_u64offset_u64(svbool_t pg, uint8_t *base, svuint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u64offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], i8* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter_, u64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1b_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u32base_offset_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, _offset, _s32)(pg, bases, offset, data);
+}
+
+void test_svstnt1b_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u64base_offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, _offset, _s64)(pg, bases, offset, data);
+}
+
+void test_svstnt1b_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u32base_offset_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, _offset, _u32)(pg, bases, offset, data);
+}
+
+void test_svstnt1b_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1b_scatter_u64base_offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, _offset, _u64)(pg, bases, offset, data);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+void test_svstnt1h_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32base_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_s32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, , _s32)(pg, bases, data);
+}
+
+void test_svstnt1h_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64base_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, , _s64)(pg, bases, data);
+}
+
+void test_svstnt1h_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32base_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_u32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, , _u32)(pg, bases, data);
+}
+
+void test_svstnt1h_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64base_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, , _u64)(pg, bases, data);
+}
+
+void test_svstnt1h_scatter_s64offset_s64(svbool_t pg, int16_t *base, svint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_s64offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1h_scatter_s64offset_u64(svbool_t pg, uint16_t *base, svint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_s64offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1h_scatter_u32offset_s32(svbool_t pg, int16_t *base, svuint32_t offsets, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32offset_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32offset_s32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, u32, offset, _s32)(pg, base, offsets, data);
+}
+
+void test_svstnt1h_scatter_u64offset_s64(svbool_t pg, int16_t *base, svuint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1h_scatter_u32offset_u32(svbool_t pg, uint16_t *base, svuint32_t offsets, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32offset_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], i16* %base, <vscale x 4 x i32> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32offset_u32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, u32, offset, _u32)(pg, base, offsets, data);
+}
+
+void test_svstnt1h_scatter_u64offset_u64(svbool_t pg, uint16_t *base, svuint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1h_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32base_offset_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_offset_s32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _offset, _s32)(pg, bases, offset, data);
+}
+
+void test_svstnt1h_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64base_offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _offset, _s64)(pg, bases, offset, data);
+}
+
+void test_svstnt1h_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32base_offset_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_offset_u32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _offset, _u32)(pg, bases, offset, data);
+}
+
+void test_svstnt1h_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64base_offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _offset, _u64)(pg, bases, offset, data);
+}
+
+void test_svstnt1h_scatter_s64index_s64(svbool_t pg, int16_t *base, svint64_t indices, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_s64index_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, index, _s64)(pg, base, indices, data);
+}
+
+void test_svstnt1h_scatter_s64index_u64(svbool_t pg, uint16_t *base, svint64_t indices, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_s64index_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, index, _u64)(pg, base, indices, data);
+}
+
+void test_svstnt1h_scatter_u64index_s64(svbool_t pg, int16_t *base, svuint64_t indices, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64index_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, index, _s64)(pg, base, indices, data);
+}
+
+void test_svstnt1h_scatter_u64index_u64(svbool_t pg, uint16_t *base, svuint64_t indices, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64index_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], i16* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, index, _u64)(pg, base, indices, data);
+}
+
+void test_svstnt1h_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32base_index_s32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_index_s32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _index, _s32)(pg, bases, index, data);
+}
+
+void test_svstnt1h_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64base_index_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _index, _s64)(pg, bases, index, data);
+}
+
+void test_svstnt1h_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u32base_index_u32
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> [[TRUNC]], <vscale x 4 x i1> [[PG]], <vscale x 4 x i32> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_index_u32'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _index, _u32)(pg, bases, index, data);
+}
+
+void test_svstnt1h_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1h_scatter_u64base_index_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _index, _u64)(pg, bases, index, data);
+}

clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c

+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
+#endif
+
+void test_svstnt1w_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64base_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> [[DATA:%.*]] to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, , _s64)(pg, bases, data);
+}
+
+void test_svstnt1w_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64base_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 0)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, , _u64)(pg, bases, data);
+}
+
+void test_svstnt1w_scatter_s64offset_s64(svbool_t pg, int32_t *base, svint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_s64offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1w_scatter_s64offset_u64(svbool_t pg, uint32_t *base, svint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_s64offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1w_scatter_u64offset_s64(svbool_t pg, int32_t *base, svuint64_t offsets, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, offset, _s64)(pg, base, offsets, data);
+}
+
+void test_svstnt1w_scatter_u64offset_u64(svbool_t pg, uint32_t *base, svuint64_t offsets, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %offsets)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, offset, _u64)(pg, base, offsets, data);
+}
+
+void test_svstnt1w_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64base_offset_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_offset_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _offset, _s64)(pg, bases, offset, data);
+}
+
+void test_svstnt1w_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64base_offset_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 %offset)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_offset_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _offset, _u64)(pg, bases, offset, data);
+}
+
+void test_svstnt1w_scatter_s64index_s64(svbool_t pg, int32_t *base, svint64_t indices, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_s64index_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, index, _s64)(pg, base, indices, data);
+}
+
+void test_svstnt1w_scatter_s64index_u64(svbool_t pg, uint32_t *base, svint64_t indices, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_s64index_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, index, _u64)(pg, base, indices, data);
+}
+
+void test_svstnt1w_scatter_u64index_s64(svbool_t pg, int32_t *base, svuint64_t indices, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64index_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, index, _s64)(pg, base, indices, data);
+}
+
+void test_svstnt1w_scatter_u64index_u64(svbool_t pg, uint32_t *base, svuint64_t indices, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64index_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], i32* %base, <vscale x 2 x i64> %indices)
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, index, _u64)(pg, base, indices, data);
+}
+
+void test_svstnt1w_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64base_index_s64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_index_s64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _index, _s64)(pg, bases, index, data);
+}
+
+void test_svstnt1w_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) {
+  // CHECK-LABEL: test_svstnt1w_scatter_u64base_index_u64
+  // CHECK-DAG: [[TRUNC:%.*]] = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
+  // CHECK-DAG: [[PG:%.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2
+  // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> [[TRUNC]], <vscale x 2 x i1> [[PG]], <vscale x 2 x i64> %bases, i64 [[SHL]])
+  // CHECK: ret void
+  // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}}
+  // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_index_u64'}}
+  return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _index, _u64)(pg, bases, index, data);
+}

clang/utils/TableGen/SveEmitter.cpp

case 'P':
     Bitwidth = 16;
     ElementBitwidth = 1;
     break;
   case 'u':
     Predicate = false;
     Signed = false;
     Float = false;
     break;
+  case 'x':
+    Predicate = false;
+    Signed = true;
+    Float = false;
+    break;
   case 'i':
     Predicate = false;
     Float = false;
     ElementBitwidth = Bitwidth = 64;
     NumVectors = 0;
     Signed = false;
     Immediate = true;
     break;