[AIX] Return the correct set of callee saved regs

[daltenty]

Summary

r13 isn't reserved on 32-bit AIX, which is reflected in our calling
convention but not callee saved regs.

[daltenty]

• Add newline to test

[sfertile]

Change looks good, however there is a couple things complicating this.

1. The SplitCSR code is dead with Darwins removal and we didn't realize it.
2. CSR_AIX64 and CSR_SVR464 are the same and should be one list, not 2 distinct lists.

Usually I would suggest we land 2 NFC patches to clean this up first, however I don't want to delay this bugfix for te removal of dead code.

If no one else objects, I would suggest:

1. Condensing the SVR464 and AIX64 lists to a single list and removing the Darwin lists in an NFC patch.
2. Updating this patch to: keep the fatal error you added for AnyReg calling convention, then handling isOSAIX() immediately after, with a fatal error if the calling convention is ColdCC.

That avoids changing the SplitCSR code which makes it look like its still alive for SVR4 ABIs. We can then remove SplitCSR in a follow up NFC patch.

[daltenty]

Posted the NFC patch suggested as D77235

In D77101#1954884, @sfertile wrote:

If no one else objects, I would suggest:

1. Condensing the SVR464 and AIX64 lists to a single list and removing the Darwin lists in an NFC patch.
2. Updating this patch to: keep the fatal error you added for AnyReg calling convention, then handling isOSAIX() immediately after, with a fatal error if the calling convention is ColdCC.

That avoids changing the SplitCSR code which makes it look like its still alive for SVR4 ABIs. We can then remove SplitCSR in a follow up NFC patch.

[daltenty]

• Remove 64-bit cases since we've commoned up the AIX64 and SVR4 CSRs

[sfertile]

M

llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

154–156

Minor nit: can we add an error for SplitCC on AIX as well?

175

This error should be for both 64-bit and 32-bit AIX targets (We will need to land lit tests + rename the SVR64_ColdCC before removing the error for 64-bit).

[daltenty]

• Add SplitCSR and ColdCall errors

[sfertile]

LGTM.

[lei]

llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

172

nit: unrelated format change.

[daltenty]

Remove unrelated reformatting

[thakis]

This breaks tests: http://45.33.8.238/linux/15714/step_12.txt

Please take a look and revert if it takes a while to investigate.

[daltenty]

In D77101#1992667, @thakis wrote:

This breaks tests: http://45.33.8.238/linux/15714/step_12.txt

Please take a look and revert if it takes a while to investigate.

Reverted in 6c881bf1fec2288907cd87a7895c863243bba7c5.

[daltenty]

It broke hardcoded stack offsets in test aix-cc-byval-mem.ll, the test is fixed as of 8541a3cc9dca52933f71baa5f344a0b815638b6a. Relanding.

llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

if (TM.isPPC64())
     return &PPC::G8RCRegClass;
   return &PPC::GPRCRegClass;
 }
 
 const MCPhysReg*
 PPCRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
   const PPCSubtarget &Subtarget = MF->getSubtarget<PPCSubtarget>();
   if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) {
+    if (!TM.isPPC64() && Subtarget.isAIXABI())
+      report_fatal_error("AnyReg unimplemented on 32-bit AIX.");
     if (Subtarget.hasVSX())
       return CSR_64_AllRegs_VSX_SaveList;
     if (Subtarget.hasAltivec())
       return CSR_64_AllRegs_Altivec_SaveList;
     return CSR_64_AllRegs_SaveList;
   }
 
-  if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR())
+  if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) {
+    if (Subtarget.isAIXABI())
+      report_fatal_error("SplitCSR unimplemented on AIX.");
     return CSR_SRV464_TLS_PE_SaveList;
+  }
 
   // On PPC64, we might need to save r2 (but only if it is not reserved).
   bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2);
 
   // Cold calling convention CSRs.
   if (MF->getFunction().getCallingConv() == CallingConv::Cold) {
+    if (Subtarget.isAIXABI())
+      report_fatal_error("Cold calling unimplemented on AIX.");
     if (TM.isPPC64()) {
       if (Subtarget.hasAltivec())
         return SaveR2 ? CSR_SVR64_ColdCC_R2_Altivec_SaveList
                       : CSR_SVR64_ColdCC_Altivec_SaveList;
       return SaveR2 ? CSR_SVR64_ColdCC_R2_SaveList
                     : CSR_SVR64_ColdCC_SaveList;
     }
     // 32-bit targets.
     if (Subtarget.hasAltivec())
       return CSR_SVR32_ColdCC_Altivec_SaveList;
     else if (Subtarget.hasSPE())
       return CSR_SVR32_ColdCC_SPE_SaveList;
     return CSR_SVR32_ColdCC_SaveList;
   }
   // Standard calling convention CSRs.
   if (TM.isPPC64()) {
+    if (Subtarget.isAIXABI())
+      return CSR_AIX64_SaveList;
     if (Subtarget.hasAltivec())
       return SaveR2 ? CSR_SVR464_R2_Altivec_SaveList
                     : CSR_SVR464_Altivec_SaveList;
     return SaveR2 ? CSR_SVR464_R2_SaveList
                   : CSR_SVR464_SaveList;
   }
   // 32-bit targets.
+  if (Subtarget.isAIXABI())
+    return CSR_AIX32_SaveList;
   if (Subtarget.hasAltivec())
     return CSR_SVR432_Altivec_SaveList;
   else if (Subtarget.hasSPE())
     return CSR_SVR432_SPE_SaveList;
   return CSR_SVR432_SaveList;
 }
 
 const MCPhysReg *

llvm/test/CodeGen/PowerPC/aix-calleesavedregs.ll

+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
+; RUN:  -mtriple powerpc-ibm-aix-xcoff -O0 < %s | \
+; RUN: FileCheck --check-prefixes=CHECK %s
+
+define void @usethirteen() {
+    call void asm "nop", "~{r13}"()
+    ret void
+}
+
+; CHECK: stw 13, -4(1)
+; CHECK: lwz 13, -4(1)
 No newline at end of file