This is an archive of the discontinued LLVM Phabricator instance.

Differential D68776

[mips] Fix loading "double" immediate into a GPR and FPR
ClosedPublic

Authored by atanasyan on Oct 10 2019, 3:26 AM.

Details

Reviewers
Petar.Avramovic
petarj
mbrkusanin
mstojanovic
Commits
rG94970749d6f7: Merging r374544 and r374548:
rGb051a19aa02d: [mips] Fix loading "double" immediate into a GPR and FPR
rL374544: [mips] Fix loading "double" immediate into a GPR and FPR
Summary

If a "double" (64-bit) value has zero low 32-bits, it's possible to load such value into a GP/FP registers as an instruction immediate. But now assembler loads only high 32-bits of the value.

For example, if a target register is GPR the li.d $4, 1.0 instruction converts into the lui $4, 16368 one. As a result, we get 0x3FF00000 in the register. While a correct representation of the 1.0 value is 0x3FF0000000000000. The patch fixes that.

Diff Detail

Event Timeline

atanasyan created this revision.Oct 10 2019, 3:26 AM
Herald added a project: Restricted Project. · View Herald TranscriptOct 10 2019, 3:26 AM
Herald added subscribers: jrtc27, hiraditya, arichardson, sdardis. · View Herald Transcript
atanasyan added a child revision: D68777: [mips] Use less instruction to load zero into FPR by li.s / li.d pseudos.Oct 10 2019, 3:30 AM
mstojanovic accepted this revision.Oct 10 2019, 9:46 AM

LGTM, just have some clarifying questions.

llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
3481

An alternative to this condition could be isGP64bit(). Do you think there's a case where this wouldn't work and what do you prefer?

3482

Is there a reason why the IsAddress argument is set to true in the loadImmediate() call?

This revision is now accepted and ready to land.Oct 10 2019, 9:46 AM
atanasyan marked 2 inline comments as done.Oct 11 2019, 4:50 AM
atanasyan added inline comments.
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
3481

I'm going to fix that and other similar code by a separate patch.

3482

Good point, thanks. I missed that and just use the same value for this argument as in the original code. I think in both loadImmediate calls IsAddress should be false. I will fix that before commit.

Closed by commit rGb051a19aa02d: [mips] Fix loading "double" immediate into a GPR and FPR (authored by atanasyan). · Explain WhyOct 11 2019, 5:35 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
Mips/
AsmParser/
20 lines
test/
MC/
Mips/
34 lines

Diff 224576

llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 3,397 Lines • ▼ Show 20 Linesbool MipsAsmParser::expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc,
uint32_t HiImmOp64 = Hi_32(ImmOp64); uint32_t HiImmOp64 = Hi_32(ImmOp64);
unsigned TmpReg = getATReg(IDLoc); unsigned TmpReg = getATReg(IDLoc);
if (!TmpReg) if (!TmpReg)
return true; return true;
if (LoImmOp64 == 0) { if (LoImmOp64 == 0) {
if (isABI_N32() || isABI_N64()) { if (isABI_N32() || isABI_N64()) {
if (loadImmediate(HiImmOp64, FirstReg, Mips::NoRegister, false, true, if (loadImmediate(ImmOp64, FirstReg, Mips::NoRegister, false, true, IDLoc,
IDLoc, Out, STI)) Out, STI))
return true; return true;
} else { } else {
if (loadImmediate(HiImmOp64, FirstReg, Mips::NoRegister, true, true, if (loadImmediate(HiImmOp64, FirstReg, Mips::NoRegister, true, true,
IDLoc, Out, STI)) IDLoc, Out, STI))
return true; return true;
if (loadImmediate(0, nextReg(FirstReg), Mips::NoRegister, true, true, if (loadImmediate(0, nextReg(FirstReg), Mips::NoRegister, true, true,
IDLoc, Out, STI)) IDLoc, Out, STI))
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Linesbool MipsAsmParser::expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU,
unsigned TmpReg = getATReg(IDLoc); unsigned TmpReg = getATReg(IDLoc);
if (!TmpReg) if (!TmpReg)
return true; return true;
if ((LoImmOp64 == 0) && if ((LoImmOp64 == 0) &&
!((HiImmOp64 & 0xffff0000) && (HiImmOp64 & 0x0000ffff))) { !((HiImmOp64 & 0xffff0000) && (HiImmOp64 & 0x0000ffff))) {
// FIXME: In the case where the constant is zero, we can load the // FIXME: In the case where the constant is zero, we can load the
// register directly from the zero register. // register directly from the zero register.
if (loadImmediate(HiImmOp64, TmpReg, Mips::NoRegister, true, true, IDLoc,
if (isABI_N32() || isABI_N64()) {
mstojanovicUnsubmitted
Not Done
ReplyInline Actions

An alternative to this condition could be isGP64bit(). Do you think there's a case where this wouldn't work and what do you prefer?

mstojanovic: An alternative to this condition could be `isGP64bit()`. Do you think there's a case where this…
atanasyanAuthorUnsubmitted
Done
ReplyInline Actions

I'm going to fix that and other similar code by a separate patch.

atanasyan: I'm going to fix that and other similar code by a separate patch.
if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, false, IDLoc,
mstojanovicUnsubmitted
Not Done
ReplyInline Actions

Is there a reason why the IsAddress argument is set to true in the loadImmediate() call?

mstojanovic: Is there a reason why the `IsAddress` argument is set to `true` in the `loadImmediate()` call?
atanasyanAuthorUnsubmitted
Done
ReplyInline Actions

Good point, thanks. I missed that and just use the same value for this argument as in the original code. I think in both loadImmediate calls IsAddress should be false. I will fix that before commit.

atanasyan: Good point, thanks. I missed that and just use the same value for this argument as in the…
Out, STI)) Out, STI))
return true; return true;
if (isABI_N32() || isABI_N64())
TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI); TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI);
else if (hasMips32r2()) { return false;
}
if (loadImmediate(HiImmOp64, TmpReg, Mips::NoRegister, true, false, IDLoc,
Out, STI))
return true;
if (hasMips32r2()) {
TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI); TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI);
TOut.emitRRR(Mips::MTHC1_D32, FirstReg, FirstReg, TmpReg, IDLoc, STI); TOut.emitRRR(Mips::MTHC1_D32, FirstReg, FirstReg, TmpReg, IDLoc, STI);
} else { } else {
TOut.emitRR(Mips::MTC1, nextReg(FirstReg), TmpReg, IDLoc, STI); TOut.emitRR(Mips::MTC1, nextReg(FirstReg), TmpReg, IDLoc, STI);
TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI); TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI);
} }
return false; return false;
} }
▲ Show 20 Lines • Show All 5,081 Lines • Show Last 20 Lines

llvm/test/MC/Mips/macro-li.d.s

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
# N64-PIC: # fixup A - offset: 0, value: %got([[LABEL]]), kind: fixup_Mips_GOT # N64-PIC: # fixup A - offset: 0, value: %got([[LABEL]]), kind: fixup_Mips_GOT
# N64-PIC: daddiu $1, $1, %lo([[LABEL]]) # encoding: [A,A,0x21,0x64] # N64-PIC: daddiu $1, $1, %lo([[LABEL]]) # encoding: [A,A,0x21,0x64]
# N64-PIC: # fixup A - offset: 0, value: %lo([[LABEL]]), kind: fixup_Mips_LO16 # N64-PIC: # fixup A - offset: 0, value: %lo([[LABEL]]), kind: fixup_Mips_LO16
# O32: lw $4, 0($1) # encoding: [0x00,0x00,0x24,0x8c] # O32: lw $4, 0($1) # encoding: [0x00,0x00,0x24,0x8c]
# O32: lw $5, 4($1) # encoding: [0x04,0x00,0x25,0x8c] # O32: lw $5, 4($1) # encoding: [0x04,0x00,0x25,0x8c]
# N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc] # N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc]
li.d $4, 1 li.d $4, 1
# ALL: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c] # O32: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c]
# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
# N32-N64: ori $4, $zero, 65472 # encoding: [0xc0,0xff,0x04,0x34]
# N32-N64: dsll $4, $4, 46 # encoding: [0xbc,0x23,0x04,0x00]
li.d $4, 1.0 li.d $4, 1.0
# ALL: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c] # O32: lui $4, 16368 # encoding: [0xf0,0x3f,0x04,0x3c]
# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
# N32-N64: ori $4, $zero, 65472 # encoding: [0xc0,0xff,0x04,0x34]
# N32-N64: dsll $4, $4, 46 # encoding: [0xbc,0x23,0x04,0x00]
li.d $4, 12345678910 li.d $4, 12345678910
# ALL: .section .rodata,"a",@progbits # ALL: .section .rodata,"a",@progbits
# ALL: [[LABEL:\$tmp[0-9]+]]: # ALL: [[LABEL:\$tmp[0-9]+]]:
# ALL: .4byte 1107754720 # ALL: .4byte 1107754720
# ALL: .4byte 3790602240 # ALL: .4byte 3790602240
# ALL: .text # ALL: .text
# O32-N32-NO-PIC: lui $1, %hi([[LABEL]]) # encoding: [A,A,0x01,0x3c] # O32-N32-NO-PIC: lui $1, %hi([[LABEL]]) # encoding: [A,A,0x01,0x3c]
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
# N64-PIC: # fixup A - offset: 0, value: %got([[LABEL]]), kind: fixup_Mips_GOT # N64-PIC: # fixup A - offset: 0, value: %got([[LABEL]]), kind: fixup_Mips_GOT
# N64-PIC: daddiu $1, $1, %lo([[LABEL]]) # encoding: [A,A,0x21,0x64] # N64-PIC: daddiu $1, $1, %lo([[LABEL]]) # encoding: [A,A,0x21,0x64]
# N64-PIC: # fixup A - offset: 0, value: %lo([[LABEL]]), kind: fixup_Mips_LO16 # N64-PIC: # fixup A - offset: 0, value: %lo([[LABEL]]), kind: fixup_Mips_LO16
# O32: lw $4, 0($1) # encoding: [0x00,0x00,0x24,0x8c] # O32: lw $4, 0($1) # encoding: [0x00,0x00,0x24,0x8c]
# O32: lw $5, 4($1) # encoding: [0x04,0x00,0x25,0x8c] # O32: lw $5, 4($1) # encoding: [0x04,0x00,0x25,0x8c]
# N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc] # N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc]
li.d $4, 1.5 li.d $4, 1.5
# ALL: lui $4, 16376 # encoding: [0xf8,0x3f,0x04,0x3c] # O32: lui $4, 16376 # encoding: [0xf8,0x3f,0x04,0x3c]
# O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24] # O32: addiu $5, $zero, 0 # encoding: [0x00,0x00,0x05,0x24]
# N32-N64: ori $4, $zero, 65504 # encoding: [0xe0,0xff,0x04,0x34]
# N32-N64: dsll $4, $4, 46 # encoding: [0xbc,0x23,0x04,0x00]
li.d $4, 12345678910.12345678910 li.d $4, 12345678910.12345678910
# ALL: .section .rodata,"a",@progbits # ALL: .section .rodata,"a",@progbits
# ALL: [[LABEL:\$tmp[0-9]+]]: # ALL: [[LABEL:\$tmp[0-9]+]]:
# ALL: .4byte 1107754720 # ALL: .4byte 1107754720
# ALL: .4byte 3790666967 # ALL: .4byte 3790666967
# ALL: .text # ALL: .text
# O32-N32-NO-PIC: lui $1, %hi([[LABEL]]) # encoding: [A,A,0x01,0x3c] # O32-N32-NO-PIC: lui $1, %hi([[LABEL]]) # encoding: [A,A,0x01,0x3c]
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
li.d $f4, 0 li.d $f4, 0
# O32: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # O32: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44] # O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # N32-N64: daddiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x64]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
li.d $f4, 0.0 li.d $f4, 0.0
# O32: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # O32: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44] # O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24] # N32-N64: daddiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x64]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
li.d $f4, 1.12345 li.d $f4, 1.12345
# ALL: .section .rodata,"a",@progbits # ALL: .section .rodata,"a",@progbits
# ALL: [[LABEL:\$tmp[0-9]+]]: # ALL: [[LABEL:\$tmp[0-9]+]]:
# ALL: .4byte 1072822694 # ALL: .4byte 1072822694
# ALL: .4byte 3037400872 # ALL: .4byte 3037400872
# ALL: .text # ALL: .text
Show All 16 Lines
li.d $f4, 1 li.d $f4, 1
# O32: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # O32: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44] # O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # CHECK-MIPS32r2: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # N32-N64: ori $1, $zero, 65472 # encoding: [0xc0,0xff,0x01,0x34]
# N32-N64: dsll $1, $1, 46 # encoding: [0xbc,0x0b,0x01,0x00]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
li.d $f4, 1.0 li.d $f4, 1.0
# O32: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # O32: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44] # O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # CHECK-MIPS32r2: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: lui $1, 16368 # encoding: [0xf0,0x3f,0x01,0x3c] # N32-N64: ori $1, $zero, 65472 # encoding: [0xc0,0xff,0x01,0x34]
# N32-N64: dsll $1, $1, 46 # encoding: [0xbc,0x0b,0x01,0x00]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
li.d $f4, 12345678910 li.d $f4, 12345678910
# ALL: .section .rodata,"a",@progbits # ALL: .section .rodata,"a",@progbits
# ALL: [[LABEL:\$tmp[0-9]+]]: # ALL: [[LABEL:\$tmp[0-9]+]]:
# ALL: .4byte 1107754720 # ALL: .4byte 1107754720
# ALL: .4byte 3790602240 # ALL: .4byte 3790602240
# ALL: .text # ALL: .text
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
li.d $f4, 1.5 li.d $f4, 1.5
# O32: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c] # O32: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44] # O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c] # CHECK-MIPS32r2: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: lui $1, 16376 # encoding: [0xf8,0x3f,0x01,0x3c] # N32-N64: ori $1, $zero, 65504 # encoding: [0xe0,0xff,0x01,0x34]
# N32-N64: dsll $1, $1, 46 # encoding: [0xbc,0x0b,0x01,0x00]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
li.d $f4, 2.5 li.d $f4, 2.5
# O32: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c] # O32: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44] # O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c] # CHECK-MIPS32r2: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44] # CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44] # CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: lui $1, 16388 # encoding: [0x04,0x40,0x01,0x3c] # N32-N64: ori $1, $zero, 32776 # encoding: [0x08,0x80,0x01,0x34]
# N32-N64: dsll $1, $1, 47 # encoding: [0xfc,0x0b,0x01,0x00]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44] # N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
li.d $f4, 2.515625 li.d $f4, 2.515625
# ALL: .section .rodata,"a",@progbits # ALL: .section .rodata,"a",@progbits
# ALL: [[LABEL:\$tmp[0-9]+]]: # ALL: [[LABEL:\$tmp[0-9]+]]:
# ALL: .4byte 1074012160 # ALL: .4byte 1074012160
# ALL: .4byte 0 # ALL: .4byte 0
# ALL: .text # ALL: .text
▲ Show 20 Lines • Show All 62 Lines • Show Last 20 Lines