Page MenuHomePhabricator

Petar.Avramovic (Petar Avramovic)
User

Projects

User does not belong to any projects.

User Details

User Since
Feb 21 2018, 6:39 AM (165 w, 8 h)

Recent Activity

Thu, Apr 8

Petar.Avramovic updated the diff for D99735: [MIPatternMatch]: Add mi_match for MachineInstr.

Added tests for instructions with 0 and 2 defs.

Thu, Apr 8, 5:51 AM · Restricted Project

Fri, Apr 2

Petar.Avramovic updated the diff for D99735: [MIPatternMatch]: Add mi_match for MachineInstr.
Fri, Apr 2, 11:38 AM · Restricted Project
Petar.Avramovic updated the diff for D99736: [MIPatternMatch]: Add matchers for binary instructions.
Fri, Apr 2, 11:37 AM · Restricted Project

Thu, Apr 1

Petar.Avramovic updated the diff for D96605: AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE.

Fixed G_FCONSTANT and added test for it.

Thu, Apr 1, 8:08 AM · Restricted Project
Petar.Avramovic added reviewers for D99736: [MIPatternMatch]: Add matchers for binary instructions: arsenm, foad.
Thu, Apr 1, 8:05 AM · Restricted Project
Petar.Avramovic requested review of D99736: [MIPatternMatch]: Add matchers for binary instructions.
Thu, Apr 1, 8:05 AM · Restricted Project
Petar.Avramovic requested review of D99735: [MIPatternMatch]: Add mi_match for MachineInstr.
Thu, Apr 1, 8:04 AM · Restricted Project
Petar.Avramovic requested review of D99734: [MIPatternMatch]: Add ICstRegMatch.
Thu, Apr 1, 8:03 AM · Restricted Project
Petar.Avramovic requested review of D99733: [GlobalISel]: Add a getConstantIntVRegVal utility.
Thu, Apr 1, 8:02 AM · Restricted Project
Petar.Avramovic updated the diff for D90050: AMDGPU/GlobalISel: Add integer med3 combines.

Extracted MIPatternMtach changes.

Thu, Apr 1, 8:02 AM · Restricted Project

Wed, Mar 31

Petar.Avramovic updated the diff for D96605: AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE.

Added basic version of isCanonicalized for global-isel. Copied from sdag.

Wed, Mar 31, 8:41 AM · Restricted Project
Petar.Avramovic updated the diff for D90050: AMDGPU/GlobalISel: Add integer med3 combines.

Rebased. Updated uniform test (Jay fixed reg-bank-select for uniform min and max) and added test for v2i16 which we don't combine.
Renamed G_AMDGPU_MED3 to G_AMDGPU_SMED3 since this patch also adds UMED3.

Wed, Mar 31, 4:44 AM · Restricted Project

Mon, Mar 29

Petar.Avramovic committed rGb082e6f88acf: [AMDGPU] Extend gfx10 test coverage. NFC. (authored by Petar.Avramovic).
[AMDGPU] Extend gfx10 test coverage. NFC.
Mon, Mar 29, 2:17 AM
Petar.Avramovic closed D99267: [AMDGPU] Extend gfx10 test coverage. NFC..
Mon, Mar 29, 2:17 AM · Restricted Project

Wed, Mar 24

Petar.Avramovic requested review of D99267: [AMDGPU] Extend gfx10 test coverage. NFC..
Wed, Mar 24, 7:51 AM · Restricted Project

Mar 12 2021

Petar.Avramovic added inline comments to D98486: [TableGen/GlobalISel] Emit MI_predicate custom code for PatFrags (not only PatFrag).
Mar 12 2021, 6:39 AM · Restricted Project
Petar.Avramovic added a comment to D98486: [TableGen/GlobalISel] Emit MI_predicate custom code for PatFrags (not only PatFrag).

Looks good, I would like for other reviewers to also take a look.

Mar 12 2021, 5:54 AM · Restricted Project

Mar 5 2021

Petar.Avramovic committed rGd44f61f81ca0: Reland [GlobalISel] Combine zext(trunc x) to x (authored by Petar.Avramovic).
Reland [GlobalISel] Combine zext(trunc x) to x
Mar 5 2021, 2:11 AM
Petar.Avramovic committed rG36beaa3ba3b3: Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect (authored by Petar.Avramovic).
Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect
Mar 5 2021, 2:11 AM

Mar 4 2021

Petar.Avramovic committed rGd7834556b7ad: Reland [GlobalISel] Start using vectors in GISelKnownBits (authored by Petar.Avramovic).
Reland [GlobalISel] Start using vectors in GISelKnownBits
Mar 4 2021, 12:47 PM
Petar.Avramovic committed rGbf5a58265047: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect
Mar 4 2021, 6:06 AM
Petar.Avramovic committed rG4112299ee761: [GlobalISel] Combine zext(trunc x) to x (authored by Petar.Avramovic).
[GlobalISel] Combine zext(trunc x) to x
Mar 4 2021, 6:06 AM
Petar.Avramovic committed rG4c8fb7ddd6fa: [GlobalISel] Start using vectors in GISelKnownBits (authored by Petar.Avramovic).
[GlobalISel] Start using vectors in GISelKnownBits
Mar 4 2021, 6:06 AM
Petar.Avramovic closed D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.
Mar 4 2021, 6:06 AM · Restricted Project
Petar.Avramovic closed D96031: [GlobalISel] Combine zext(trunc x) to x.
Mar 4 2021, 6:06 AM · Restricted Project
Petar.Avramovic closed D96122: [GlobalISel] Start using vectors in GISelKnownBits.
Mar 4 2021, 6:06 AM · Restricted Project

Mar 3 2021

Petar.Avramovic updated the diff for D96122: [GlobalISel] Start using vectors in GISelKnownBits.

Removed isVector checks for non-Vector opcodes. Use Register instead of unsigned.

Mar 3 2021, 6:53 AM · Restricted Project

Mar 2 2021

Petar.Avramovic updated the diff for D96122: [GlobalISel] Start using vectors in GISelKnownBits.

Add a few unit tests and break for vector types on some opcodes.

Mar 2 2021, 8:59 AM · Restricted Project

Feb 23 2021

Petar.Avramovic updated the diff for D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.

There is no need for helper state class.

Feb 23 2021, 8:05 AM · Restricted Project
Petar.Avramovic updated the diff for D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.

Dropping icmp move for from this patch. Leaving zext_trunc_fold.
Zext is selected into AND with 1. zext_trunc_fold results in getting rid of the SCC copies when zext was the only instruction between icmp and select/branch.

Feb 23 2021, 7:38 AM · Restricted Project

Feb 18 2021

Petar.Avramovic added inline comments to D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.
Feb 18 2021, 3:54 AM · Restricted Project

Feb 12 2021

Petar.Avramovic committed rGf0d65f40968d: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum
Feb 12 2021, 8:16 AM
Petar.Avramovic committed rG122c649c982f: AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN
Feb 12 2021, 8:15 AM
Petar.Avramovic committed rG841ee7423d1c: AMDGPU/GlobalISel: Precommit globalisel tests for isKnownNeverNaN (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Precommit globalisel tests for isKnownNeverNaN
Feb 12 2021, 8:15 AM
Petar.Avramovic closed D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Feb 12 2021, 8:15 AM · Restricted Project
Petar.Avramovic closed D91714: AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN.
Feb 12 2021, 8:15 AM · Restricted Project
Petar.Avramovic added a comment to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.

Ping.

Feb 12 2021, 7:29 AM · Restricted Project
Petar.Avramovic updated the diff for D96605: AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE.

Use replaceSingleDefInstWithReg.

Feb 12 2021, 7:25 AM · Restricted Project
Petar.Avramovic requested review of D96605: AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE.
Feb 12 2021, 7:08 AM · Restricted Project

Feb 8 2021

Petar.Avramovic updated the diff for D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.

Use zext_trunc_fold from generic combiner to separately fold all cases of zext(trunc x) -> x made by regbankselect.
icmp move before select/brcond has to be aware of current state of MF since we run combines top-down and instructions (trunc) can be left without uses (zext was deleted by zext_trunc_fold)

Feb 8 2021, 5:14 AM · Restricted Project

Feb 5 2021

Petar.Avramovic updated the diff for D96031: [GlobalISel] Combine zext(trunc x) to x.

Adding vectors.

Feb 5 2021, 7:55 AM · Restricted Project
Petar.Avramovic updated the diff for D96122: [GlobalISel] Start using vectors in GISelKnownBits.

Adding non-splat test.
isKnownToBeAPowerOfTwo ends up checking known bits for build_vector and fails for non-splat values.

Feb 5 2021, 6:44 AM · Restricted Project
Petar.Avramovic added inline comments to D96122: [GlobalISel] Start using vectors in GISelKnownBits.
Feb 5 2021, 5:46 AM · Restricted Project
Petar.Avramovic updated the summary of D96122: [GlobalISel] Start using vectors in GISelKnownBits.
Feb 5 2021, 5:30 AM · Restricted Project
Petar.Avramovic requested review of D96122: [GlobalISel] Start using vectors in GISelKnownBits.
Feb 5 2021, 4:56 AM · Restricted Project

Feb 4 2021

Petar.Avramovic requested review of D96031: [GlobalISel] Combine zext(trunc x) to x.
Feb 4 2021, 6:17 AM · Restricted Project

Feb 2 2021

Petar.Avramovic added inline comments to D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.
Feb 2 2021, 8:06 AM · Restricted Project
Petar.Avramovic updated the diff for D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.

Handle some cases with many uses. Adding icmp fold without move for the case when we can't move icmp because code looks nicer in the case with more than one use.

Feb 2 2021, 8:04 AM · Restricted Project
Petar.Avramovic added inline comments to D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.
Feb 2 2021, 4:40 AM · Restricted Project

Feb 1 2021

Petar.Avramovic updated the diff for D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.

Addressed review comments.

Feb 1 2021, 8:21 AM · Restricted Project

Jan 26 2021

Petar.Avramovic requested review of D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect.
Jan 26 2021, 3:12 AM · Restricted Project

Jan 20 2021

Petar.Avramovic committed rG4ab704d62820: [AMDGPU][MC] Add tfe disassembler support MIMG opcodes (authored by Petar.Avramovic).
[AMDGPU][MC] Add tfe disassembler support MIMG opcodes
Jan 20 2021, 1:38 AM
Petar.Avramovic closed D94960: [AMDGPU][MC] Add tfe disassembler support MIMG opcodes.
Jan 20 2021, 1:37 AM · Restricted Project

Jan 19 2021

Petar.Avramovic requested review of D94960: [AMDGPU][MC] Add tfe disassembler support MIMG opcodes.
Jan 19 2021, 3:44 AM · Restricted Project

Jan 13 2021

Petar.Avramovic added inline comments to D93708: [AMDGPU] Add a new Clamp Pattern to the GlobalISel Path..
Jan 13 2021, 6:11 AM · Restricted Project, Restricted Project

Dec 23 2020

Petar.Avramovic added inline comments to D93708: [AMDGPU] Add a new Clamp Pattern to the GlobalISel Path..
Dec 23 2020, 5:04 AM · Restricted Project, Restricted Project

Dec 18 2020

Petar.Avramovic added inline comments to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Dec 18 2020, 8:18 AM · Restricted Project
Petar.Avramovic updated the diff for D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.

Removing target dependent semantics.

Dec 18 2020, 8:15 AM · Restricted Project
Petar.Avramovic added inline comments to D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.
Dec 18 2020, 6:39 AM · Restricted Project

Dec 17 2020

Petar.Avramovic updated the diff for D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.

Sorry about the delay. Use (int)Offset to check for one in most significant bit and potential unsigned overflow. DAG equivalent in SITargetLowering::setBufferOffsets also uses int for offset.

Dec 17 2020, 5:16 AM · Restricted Project

Dec 7 2020

Petar.Avramovic committed rG3a042dcd2e1a: [AMDGPU] Fix default value of glc for mubuf rtn atomics (authored by Petar.Avramovic).
[AMDGPU] Fix default value of glc for mubuf rtn atomics
Dec 7 2020, 5:01 AM
Petar.Avramovic closed D92654: [AMDGPU] Fix default value of glc for mubuf rtn atomics.
Dec 7 2020, 5:00 AM · Restricted Project

Dec 4 2020

Petar.Avramovic requested review of D92654: [AMDGPU] Fix default value of glc for mubuf rtn atomics.
Dec 4 2020, 6:20 AM · Restricted Project

Nov 20 2020

Petar.Avramovic updated the diff for D90050: AMDGPU/GlobalISel: Add integer med3 combines.

Move combines after register bank select. Check for register bank of the result register and only combine for vgpr bank. There is mir test for sgpr bank min/max input for completeness. However sgpr bank min/max are transformed to compare + select in regbankselect and we should not expect them in post regbank combiner.

Nov 20 2020, 3:46 AM · Restricted Project

Nov 19 2020

Petar.Avramovic added a comment to D90050: AMDGPU/GlobalISel: Add integer med3 combines.

Should we move this combine after register bank select and skip min/max with sgpr bank?

Nov 19 2020, 8:44 AM · Restricted Project
Petar.Avramovic updated the diff for D90050: AMDGPU/GlobalISel: Add integer med3 combines.

Address review comments.

Nov 19 2020, 8:41 AM · Restricted Project
Petar.Avramovic updated the diff for D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.
Nov 19 2020, 6:26 AM · Restricted Project

Nov 18 2020

Petar.Avramovic updated the diff for D90050: AMDGPU/GlobalISel: Add integer med3 combines.

Use MIPatternMatch to match source pattern. Use Optional instead of return 0. Separate from fp med3 function to avoid bitcasted G_FCONSTANT and explicitly match G_CONSTANT.

Nov 18 2020, 12:03 PM · Restricted Project
Petar.Avramovic added inline comments to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Nov 18 2020, 11:27 AM · Restricted Project
Petar.Avramovic added inline comments to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Nov 18 2020, 9:26 AM · Restricted Project
Petar.Avramovic updated the diff for D91714: AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN.

Add braces.

Nov 18 2020, 9:19 AM · Restricted Project
Petar.Avramovic added inline comments to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Nov 18 2020, 9:05 AM · Restricted Project
Petar.Avramovic added inline comments to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Nov 18 2020, 8:49 AM · Restricted Project
Petar.Avramovic added inline comments to D91714: AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN.
Nov 18 2020, 8:38 AM · Restricted Project
Petar.Avramovic added inline comments to D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Nov 18 2020, 8:34 AM · Restricted Project
Petar.Avramovic requested review of D91716: AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum.
Nov 18 2020, 8:29 AM · Restricted Project
Petar.Avramovic requested review of D91714: AMDGPU/GlobalISel: Check values of constants in isKnownNeverNaN.
Nov 18 2020, 8:27 AM · Restricted Project

Nov 12 2020

Petar.Avramovic added inline comments to D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.
Nov 12 2020, 9:48 AM · Restricted Project
Petar.Avramovic added inline comments to D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.
Nov 12 2020, 8:03 AM · Restricted Project
Petar.Avramovic updated the diff for D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.

Pre-commit the test.

Nov 12 2020, 5:58 AM · Restricted Project
Petar.Avramovic requested review of D91336: AMDGPU/GlobalISel: Fix negative offset folding for buffer_load.
Nov 12 2020, 4:50 AM · Restricted Project

Nov 3 2020

Petar.Avramovic added inline comments to D90052: AMDGPU/GlobalISel: Add clamp combine for IEEE=false.
Nov 3 2020, 5:52 AM · Restricted Project
Petar.Avramovic committed rG0031418dce3e: AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner
Nov 3 2020, 12:26 AM
Petar.Avramovic closed D90623: AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner.
Nov 3 2020, 12:26 AM · Restricted Project

Nov 2 2020

Petar.Avramovic updated the diff for D90623: AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner.

Use setInstrAndDebugLoc.

Nov 2 2020, 10:42 AM · Restricted Project
Petar.Avramovic requested review of D90623: AMDGPU/GlobalISel: Use same builder/observer in post-legalizer-combiner.
Nov 2 2020, 9:23 AM · Restricted Project

Oct 23 2020

Petar.Avramovic added inline comments to D90051: AMDGPU/GlobalISel: Add floating point med3 combine for IEEE=false.
Oct 23 2020, 11:34 AM · Restricted Project
Petar.Avramovic added inline comments to D90052: AMDGPU/GlobalISel: Add clamp combine for IEEE=false.
Oct 23 2020, 11:30 AM · Restricted Project
Petar.Avramovic requested review of D90052: AMDGPU/GlobalISel: Add clamp combine for IEEE=false.
Oct 23 2020, 8:43 AM · Restricted Project
Petar.Avramovic requested review of D90051: AMDGPU/GlobalISel: Add floating point med3 combine for IEEE=false.
Oct 23 2020, 8:42 AM · Restricted Project
Petar.Avramovic requested review of D90050: AMDGPU/GlobalISel: Add integer med3 combines.
Oct 23 2020, 8:40 AM · Restricted Project

Oct 20 2020

Petar.Avramovic added inline comments to D88572: AMDGPU/SelectionDAG Check for NaN, DX10Clamp and IEEE in fmed3 combine.
Oct 20 2020, 4:14 AM · Restricted Project

Oct 16 2020

Petar.Avramovic updated the diff for D88572: AMDGPU/SelectionDAG Check for NaN, DX10Clamp and IEEE in fmed3 combine.

Respect description of ISD::FMAXNUM and ISD::FMAXNUM_IEEE (their behavior is not affected by IEEE mode).
Legalizer will deal with use of FMAXNUM when IEEE=true (makes sure that potential SNaN input gets quieted) and we can try to fold FMAXNUM_IEEE later.
Most of the test changes come from clamp/fmed on top of fcanonicalize with IEEE=true.

Oct 16 2020, 6:49 AM · Restricted Project

Oct 13 2020

Petar.Avramovic added inline comments to D88572: AMDGPU/SelectionDAG Check for NaN, DX10Clamp and IEEE in fmed3 combine.
Oct 13 2020, 8:04 AM · Restricted Project
Petar.Avramovic updated the diff for D88572: AMDGPU/SelectionDAG Check for NaN, DX10Clamp and IEEE in fmed3 combine.

Fix typos.

Oct 13 2020, 8:04 AM · Restricted Project

Oct 1 2020

Petar.Avramovic updated the diff for D88573: [SelectionDAG] Add check for BUILD_VECTOR in isKnownNeverNaN.

Patch also affects constants with vector type. Effectively, during legalization, fcanonicalize will not be inserted when input was vector constant.

define amdgpu_kernel void @maxnum_v2f16_imm_b(<2 x half> addrspace(1)* %r, <2 x half> addrspace(1)* %a) {
entry:
  %a.val = load <2 x half>, <2 x half> addrspace(1)* %a
  %add = fadd <2 x half> %a.val, <half 9.0, half 8.0>
  %r.val = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %add, <2 x half> <half 4.0, half 3.0>) ;<half 4.0, half 3.0> will not get fcanonicalized during legalization after this patch
  store <2 x half> %r.val, <2 x half> addrspace(1)* %r
  ret void
}

This won't be visible in end result since there is fcanonicalize + build_vector combine in SITargetLowering::performFCanonicalizeCombine. Test changes were for non-constant build_vectors.
Add comment to indicate vector constants are handled bellow.

Oct 1 2020, 4:11 AM · Restricted Project

Sep 30 2020

Petar.Avramovic updated the diff for D88572: AMDGPU/SelectionDAG Check for NaN, DX10Clamp and IEEE in fmed3 combine.

Simplify logic in 'is safe to clamp' checks.

Sep 30 2020, 9:18 AM · Restricted Project
Petar.Avramovic requested review of D88574: AMDGPU/SelectionDAG Include fast-math-flags for fmed3 intrinsic.
Sep 30 2020, 7:41 AM · Restricted Project
Petar.Avramovic requested review of D88573: [SelectionDAG] Add check for BUILD_VECTOR in isKnownNeverNaN.
Sep 30 2020, 7:40 AM · Restricted Project
Petar.Avramovic requested review of D88572: AMDGPU/SelectionDAG Check for NaN, DX10Clamp and IEEE in fmed3 combine.
Sep 30 2020, 7:39 AM · Restricted Project