ARM and RISC-V do not support TLS relaxations. However, for General
Dynamic and Local Dynamic models, if we are producing an executable and
the symbol is non-preemptable, we know it must be defined and the
R_ARM_TLS_DTPMOD32/R_RISCV_TLS_DTPMOD{32,64} dynamic relocation can be
omitted because it is always 1.
Merge handleARMTlsRelocation() into handleTlsRelocation(). This
requires to add logic to R_TLSGD_PC and R_TLSLD_PC. As a bonus, the
additional logic in R_TLSGD_PC code can be shared by the TLS support for
RISC-V (D63220).