[DebugInfo] Terminate more kinds of location-list ranges at the end of basic blocks

[jmorse]

Summary

This patch fixes PR40795 [0] by preventing constant-value variable locations from flowing into nearby basic blocks during location-list calculation, and propagates constant-value locations in LiveDebugValues to compensate for lost variable coverage.

As documented in comment 8 of the PR, the range that a constant-value DBG_VALUE defines a variable location over does not currently terminate at the end of the basic block the DBG_VALUE is in. Instead, its range is valid across all basic blocks (as finally laid out) until another DBG_VALUE for the variable is seen. This often covers many instructions where the variable didn't actually have a location, and even down code paths where the variable was never assigned the constant value. Fix this by keeping a set of InlinedEntity's that are not register locations, and terminating them all at the end of the block. I believe this problem was also true for stack spill locations.

In addition to this, LiveDebugValues does not propagate constant-value variable locations, so with only that change we would lose constant-value variable locations outside of the defining basic block -- on a clang3.4 build this leads to a 2% drop in overall scope-bytes-covered (45% -> 43%). To get around this, I've fixed LiveDebugValues to also propagate constant values in the same way it does other values. There are zero algorithmic changes, it just propagates from one place to another better now, although now VarLoc::operator== does more work to compare CImmediate / FPImmediate objects, as I don't believe their pointers are uniqued.

This probably leads to greater memory use due to increased DBG_VALUE propagation / replication, although I haven't made any memory-usage measurements. I've timed a clang-3.4 build using llvm/clang r354569 with and without this patch; the time differences were negligible and well within the margin of error.

Test changes: due to constant-value DBG_VALUE propagation COFF/pieces.ll now gets several new .Ltmp labels, which I've updated accordingly. New lines 63-66 reflect the fact that a new basic block has a variable location for loop_csr:o now where previously it was missing (the constant-value location is legitimate). Line 46 gets a new & spurious constant-value DBG_VALUE -- I believe this is due to the LiveDebugValues-ignores-backedges problem in PR38997 [1].

MIR/AArch64/implicit-def-dead-scope.mir: I'm not sure what to make of this test: it runs after LiveDebugValues, drops a constant DBG_VALUE somewhere, and expects it to be promoted to being function-wide. That no longer happens (checks updated) and I'd argue that given the control flow merges mean that it shouldn't. Possibly some input required here.

X86/fission-ranges.ll: LiveDebugValues now detects and records stack spills in the large loop produced by this input, hence many more location entries. It doesn't fully cover the whole function as none of the phi's have dbg.values in the input.

Added test: this is four diamond-pattern if conditionals in MIR, with different combinations of DBG_VALUE with register/constant locations on the branches of the condition. The CHECKs test how LiveDebugValues propagates them when control flow merges (it should when the locations agree; not when they do not), while the RANGES checks test that DbgEntityHistoryCalculator correctly terminates the range of variable locations at the end of basic blocks.

[0] https://bugs.llvm.org/show_bug.cgi?id=40795
[1] https://bugs.llvm.org/show_bug.cgi?id=38997#c6

[aprantl]

As documented in comment 8 of the PR, the range that a constant-value DBG_VALUE defines a variable location over does not currently terminate at the end of the basic block the DBG_VALUE is in. Instead, its range is valid across all basic blocks (as finally laid out) until another DBG_VALUE for the variable is seen. This often covers many instructions where the variable didn't actually have a location, and even down code paths where the variable was never assigned the constant value.

Isn't that a symptom of previous passes failing to insert a dbg.value(undef) when they deleted a dbg.value? I'm trying to figure out what a legitimate example for this would look like.

[jmorse]

In D59431#1431410, @aprantl wrote:

Isn't that a symptom of previous passes failing to insert a dbg.value(undef) when they deleted a dbg.value? I'm trying to figure out what a legitimate example for this would look like.

Awkwardly yes and no -- the pass that doesn't insert dbg.value(undef) is mem2reg constructing SSA IR (example below). However LiveDebugValues and DbgEntityHistoryCalculator normally cover for this issue and appear to be designed to do so. I'm having a hard time describing what's wrong here, so I'm going to state two beliefs; explain how they works with register variable locations right now; and then how it doesn't work with constant variable locations (hence this patch). It's my (additional) belief that fixing these things at the LLVM-IR level would require an infeasibly large number of dbg.value intrinsics to be inserted, in the order of "maximal SSA".

The two beliefs are:

• We eventually get (and need) a DBG_VALUE for every source variable in every basic block recording its location for that block, and
• When control flow merges, we infer variable locations from the parent blocks, or terminate locations if they're inconsistent.

The first seems obvious: to make linear ranges of locations for DWARF location lists, we need to scan the machine code and record variable locations. However AFAIUI the IR has no control over how the target backend will chose to lay out blocks. Consider this example where I've reversed the control flow:

define dso_local i32 @_Z3foob(i1 %cond) #0 !dbg !12 {
entry:
  br label %bb2

exit: 
  ret i32 %value, !dbg !30

bb1: 
  br label %exit, !dbg !26

bb2:
  %value = select i1 %cond, i32 0, i32 1 
  call void @llvm.dbg.value(metadata i32 %value, metadata !23, metadata !DIExpression()), !dbg !24
  br label %bb1
}

When compiled with llc -O0 the block layout is kept the same in assembly (although that's not guaranteed). The dbg.value dominates the 'bb1' and 'exit' blocks, and when using a register in the example here it's location is correctly propagated into those blocks. However if one replaces the dbg.value operand with a constant, the location list only covers the last jmp of the machine code in 'bb2'. Furthermore, if you put a dbg.value of a different constant in the 'entry' block, according to the IR it dominates only "br label %bb2" and the select, but in the location-lists it will cover the whole function up to the last jmp. The main message here is that IR dominance is manually preserved by LiveDebugValues/DbgEntityHistoryCalculator for registers, but not constants, and because block layout is under the targets control the IR cannot fix this without wholesale copying of dbg.values into all blocks.

Problem 2, what to do when control flow merges, can be demonstrated with this example C++:

extern int f();
int global = 0;
int foo(bool cond) {
    int bar;
    if (cond) {
        bar = f();
        global = bar;
    } else {
        bar = f();
        global = bar;
    }
    return bar;
}

The variable of interest is going to be "bar". If I compile it with the following chain of things, which I believe disables all optimisations except mem2reg, using a month-old r354365:

clang++ ./test.cpp -g -Xclang -disable-O0-optnone -Xclang -disable-llvm-optzns -emit-llvm -c -S -o - | opt -mem2reg -S | llc -o - -O0 -filetype=obj | llvm-dwarfdump-6.0 -

Then some fairly obvious things happen: we get a dbg.value for "bar" on each side of the conditional branch, a PHI node in the exit block to merge the two values of "bar", a dbg.value for the PHI, then a return instruction. This is unremarkable: but interesting things start happening if "return bar" is replaced by "return 0". In that case, the PHI node in the exit block disappears, as does the dbg.value in the exit block. We're left with this IR after mem2reg:

; <label>:4:
  %5 = call i32 @_Z1fv(), !dbg !21
  call void @llvm.dbg.value(metadata i32 %5, metadata !23, metadata !DIExpression()), !dbg !24
  store i32 %5, i32* @global, align 4, !dbg !25
  br label %9, !dbg !26

; <label>:6:
  %7 = call i32 @_Z1fv(), !dbg !27
  call void @llvm.dbg.value(metadata i32 %7, metadata !23, metadata !DIExpression()), !dbg !24
  store i32 %7, i32* @global, align 4, !dbg !29
  br label %8

; <label>:8:
  ret i32 0, !dbg !31

Here there's no explicit termination of the live range of values of "bar" in %5 and %7, either in IR or in debug intrinsics. "bar" isn't used after control flow merges into the exit/return block, hence no phi or dbg.value. However, there is also no dbg.value(undef) terminating the variable. Instead, for registers, LiveDebugValues determines where variable locations merge and either adds a DBG_VALUE for the merged location, or nothing if it can't determine a location, which implicitly terminates the location range. Neither the propagation nor the termination happen for constants (fixed by this patch).

If we were to fix mem2reg to insert dbg.value(undef) in these circumstances I believe we'd have to introduce a large number of these intrinsics on every control flow merge, and we'd effectively be embedding the early liveness properties of the program into the debug metadata, even if the liveness then changes over the course of optimisation. Plus, the design clearly works for registers right now, it's just not implemented for constants.

In summary, I think LiveDebugValues/DbgEntityHistoryCalculator are inferring facts about variable locations to avoid having to record all variable locations in all basic blocks at the start of compilation. However, their implementation is not complete, as they mostly ignore constant locations. IMO it's a better fix to make their implementation complete, rather than to increase the number of dbg.values that have to be recorded.

[aprantl]

Thanks for the thoughtful writeup!

I think LiveDebugValues/DbgEntityHistoryCalculator are inferring facts about variable locations to avoid having to record all variable locations in all basic blocks at the start of compilation.

"at the start of compilation" really means in mem2reg, at least for Clang. As you pointed out, there is no way to preserve the dbg.value in the exit block in mem2reg without introducing an phi node, but doing so would change codegen, which is not an option. So I guess the answer to my question whether this is indicative of a bug in an earlier pass is: not necessarily. If we want to preserve our ability to get a chance of having debug info for bar in the exit block, we have to accept that mem2reg doesn't insert undefs. IMO, that is not elegant, but a good trade-off.

It would be great to include a section on mem2reg and your examples to SourceLevelDebugging.rst since this will no doubt come up again in the future!

If we go forward with this patch — the reason why we don't have dbg.values in the exit block in your example is because we can't introduce a new PHI for bar. But if bar is a *constant*, mem2reg could do a miniature version of LiveDebugValues that only applies to constants. Conceptually, we could move the ability to propagate constants from LiveDebugValues into mem2reg. I'm not sure if it will be worth the extra effort, but we can think about it.

[jmorse]

In D59431#1436497, @aprantl wrote:

So I guess the answer to my question whether this is indicative of a bug in an earlier pass is: not necessarily.

Indeed, I think it's an engineering compromise that seems to work fairly well, and requires the behaviour in LiveDebugValues/etc for correctness,

It would be great to include a section on mem2reg and your examples to SourceLevelDebugging.rst since this will no doubt come up again in the future!

I'll be doing this immediately to ensure everyone's on the same page, plus I think the way the backend debug-stuff works has now clicked in my mind.

If we go forward with this patch — the reason why we don't have dbg.values in the exit block in your example is because we can't introduce a new PHI for bar. But if bar is a *constant*, mem2reg could do a miniature version of LiveDebugValues that only applies to constants. Conceptually, we could move the ability to propagate constants from LiveDebugValues into mem2reg. I'm not sure if it will be worth the extra effort, but we can think about it.

(I'll get onto this once the docs for how this is supposed to work have been nailed down).

[gbedwell]

In D59431#1436497, @aprantl wrote:

"at the start of compilation" really means in mem2reg, at least for Clang. As you pointed out, there is no way to preserve the dbg.value in the exit block in mem2reg without introducing an phi node, but doing so would change codegen, which is not an option.

Without wanting to stray too far off the topic at hand, this is the sort of thing we could consider doing if we had a dedicated -Og mode (and presumably a corresponding optdebug IR attribute akin to optsize/minsize). FWIW I'm going to organise a roundtable at EuroLLVM to try and kick off some discussion in that area, although obviously I'll reflect everything of importance back to the list for those who aren't able to attend.

[aprantl]

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

392

The title says "constant" but this seems to also affect memory locations. Is that intentional?

lib/CodeGen/LiveDebugValues.cpp

148

ConstantFPKind and ConstantIntKind ?

218

The fact that this code exists means that ConstantFP/Ints are not unique?

443

Can you add an &&"errormessage" to explain what is being asserted here?

[jmorse]

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

392

It's intentional -- the "location falls through to subsequent blocks" issue described as problem 1 above, also applies to stack spills too. Plus in LiveDebugValues, stack spill DBG_VALUEs weren't propagated between basic blocks either (which this patch patches).

I think I missed it in the title as I was trying to compress what I was saying down into something readable, and wound up cutting out too much, curses.

lib/CodeGen/LiveDebugValues.cpp

148

Related to unique-ing, see comment below,

218

Hmmmmmm, I'd made the assumption that ConstantFP/Ints aren't unique'd as none of the constructors/static getters took an LLVMContext so couldn't be made unique. Digging further in however shows ConstantInt::get acquires a context through the passed-in type, and do get uniqued. I'll remove this in the next update.

[dstenb]

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

291

Just as a small heads up, I uploaded D59941 and D59942 which aims to improve handling of fragments in DbgEntityHistoryCalculator and its users. If people think that the structure that those patches introduces is a good idea, then it should be possible to adapt this patch to that by using the LiveEntries map, which keeps indices for all currently open debug values. That way we can ensure that all open non-overlapping fragments are closed at the end of the basic block.

[jmorse]

I've rebased this patch to be based on r358073, Davids improvements to DbgEntityHistoryCalculator. Rather than tracking non-register DBG_VALUEs separately, this patch now iterates over all open DBG_VALUE ranges and either terminates the constant ones, or clobbers the register ones. This should be the same behaviour as the previous patch.

There's some ongoing sketchyness with stack-slot referencing DBG_VALUEs: they refer to a register, but the stack pointer doesn't appear in the ChangingRegs set, and so they never get terminated. I'll open a PR for that rather than messing with it here.

In LiveDebugValues I've reduced the complexity of operator== as we can rely on constant-value uniquing, and thus pointer uniquing. I've added a comparison for the VarLoc Kind however, as I'm a little worried that a RegNo / Immediate-value collision could occur.

The COFF pieces.ll test has changed slightly further: the ranges of loop_csr:o now terminate at the end of the block where the "loopskip_start" label is, which is more correct than before.

[aprantl]

I think I'm mostly fin with this now, thanks!

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

367

DMI -> DbgValue ?

372

This comment is sort of misleading because your test also triggers for values where isIndirectDebugValue() is true. I think the code does what you want, but the condition also triggers for register-indirect values.

[dstenb]

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

380

I think you can use Ent instead of DbgValues.getEntry(Pair.first, Idx) here?

[dstenb]

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

380

Oh, no. Sorry. As we may add an entry to the vector when creating the clobbering entry, Ent may be stale.

[jmorse]

Rename variable, improve comment, sprinkle a little clang-format.

[jmorse]

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

372

I've adjusted the comment to reflect reality; the termination of indirect DBG_VALUEs is the subject of some oddness (PR41600) that's preserved in this patch.

380

Alas, I found that out the hard way when writing it ._.

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

void llvm::calculateDbgEntityHistory(const MachineFunction *MF,
                                      DbgValueHistoryMap &DbgValues,
                                      DbgLabelInstrMap &DbgLabels) {
   BitVector ChangingRegs(TRI->getNumRegs());
   collectChangingRegs(MF, TRI, ChangingRegs);
 
   const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
   unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
   RegDescribedVarsMap RegVars;
   DbgValueEntriesMap LiveEntries;
   for (const auto &MBB : *MF) {
     for (const auto &MI : MBB) {
       if (!MI.isDebugInstr()) {
         // Not a DBG_VALUE instruction. It may clobber registers which describe
         // some variables.
         for (const MachineOperand &MO : MI.operands()) {
           if (MO.isReg() && MO.isDef() && MO.getReg()) {
             // Ignore call instructions that claim to clobber SP. The AArch64
for (const auto &MI : MBB) {
         // When collecting debug information for labels, there is no MCSymbol
         // generated for it. So, we keep MachineInstr in DbgLabels in order
         // to query MCSymbol afterward.
         InlinedEntity L(RawLabel, MI.getDebugLoc()->getInlinedAt());
         DbgLabels.addInstr(L, MI);
       }
     }
 
-    // Make sure locations for register-described variables are valid only
-    // until the end of the basic block (unless it's the last basic block, in
-    // which case let their liveness run off to the end of the function).
+    // Make sure locations for all variables are valid only until the end of
+    // the basic block (unless it's the last basic block, in which case let
+    // their liveness run off to the end of the function).
     if (!MBB.empty() && &MBB != &MF->back()) {
-      for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
-        auto CurElem = I++; // CurElem can be erased below.
-        if (TRI->isVirtualRegister(CurElem->first) ||
-            ChangingRegs.test(CurElem->first))
-          clobberRegisterUses(RegVars, CurElem, DbgValues, LiveEntries,
-                              MBB.back());
+      // Iterate over all variables that have open debug values.
+      SmallSet<unsigned, 8> RegsToClobber;
+      for (auto &Pair : LiveEntries) {
+        // Iterate over history entries for all open fragments.
+        SmallVector<EntryIndex, 8> IdxesToRemove;
+        for (EntryIndex Idx : Pair.second) {
+          DbgValueHistoryMap::Entry &Ent = DbgValues.getEntry(Pair.first, Idx);
+          assert(Ent.isDbgValue() && !Ent.isClosed());
+          const MachineInstr *DbgValue = Ent.getInstr();
+
+          // If this is a register or indirect DBG_VALUE, apply some futher
+          // tests to see if we should clobber it. Perform the clobbering
+          // later though, to keep LiveEntries iteration stable.
+          if (DbgValue->getOperand(0).isReg()) {
+            unsigned RegNo = DbgValue->getOperand(0).getReg();
+            if (TRI->isVirtualRegister(RegNo) || ChangingRegs.test(RegNo))
+              RegsToClobber.insert(RegNo);
+          } else {
+            // This is a constant, terminate it at end of the block. Store
+            // eliminated EntryIdx and delete later, for iteration stability.
+            EntryIndex ClobIdx = DbgValues.startClobber(Pair.first, MBB.back());
+            DbgValues.getEntry(Pair.first, Idx).endEntry(ClobIdx);
+            IdxesToRemove.push_back(Idx);
           }
         }
+
+        for (EntryIndex Idx : IdxesToRemove)
+          Pair.second.erase(Idx);
+      }
+
+      // Implement clobbering of registers at the end of BB.
+      for (unsigned Reg : RegsToClobber)
+        clobberRegisterUses(RegVars, Reg, DbgValues, LiveEntries, MBB.back());
+    }
   }
 }
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
 LLVM_DUMP_METHOD void DbgValueHistoryMap::dump() const {
   dbgs() << "DbgValueHistoryMap:\n";
   for (const auto &VarRangePair : *this) {
     const InlinedEntity &Var = VarRangePair.first;

lib/CodeGen/LiveDebugValues.cpp

struct VarLoc {
     };
 
     const DebugVariable Var;
     const MachineInstr &MI; ///< Only used for cloning a new DBG_VALUE.
     mutable UserValueScopes UVS;
     enum VarLocKind {
       InvalidKind = 0,
       RegisterKind,
-      SpillLocKind
+      SpillLocKind,
+      ImmediateKind
     } Kind = InvalidKind;
 
     /// The value location. Stored separately to avoid repeatedly
     /// extracting it from MI.
     union {
       uint64_t RegNo;
       SpillLoc SpillLocation;
       uint64_t Hash;
+      int64_t Immediate;
+      const ConstantFP *FPImm;
+      const ConstantInt *CImm;
     } Loc;
 
     VarLoc(const MachineInstr &MI, LexicalScopes &LS)
         : Var(MI.getDebugVariable(), MI.getDebugLoc()->getInlinedAt()), MI(MI),
           UVS(MI.getDebugLoc(), LS) {
       static_assert((sizeof(Loc) == sizeof(uint64_t)),
                     "hash does not cover all members of Loc");
       assert(MI.isDebugValue() && "not a DBG_VALUE");
       assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
       if (int RegNo = isDbgValueDescribedByReg(MI)) {
         Kind = RegisterKind;
         Loc.RegNo = RegNo;
+      } else if (MI.getOperand(0).isImm()) {
+        Kind = ImmediateKind;
+        Loc.Immediate = MI.getOperand(0).getImm();
+      } else if (MI.getOperand(0).isFPImm()) {
+        Kind = ImmediateKind;
+        Loc.FPImm = MI.getOperand(0).getFPImm();
+      } else if (MI.getOperand(0).isCImm()) {
+        Kind = ImmediateKind;
+        Loc.CImm = MI.getOperand(0).getCImm();
       }
     }
 
     /// The constructor for spill locations.
     VarLoc(const MachineInstr &MI, unsigned SpillBase, int SpillOffset,
            LexicalScopes &LS)
         : Var(MI.getDebugVariable(), MI.getDebugLoc()->getInlinedAt()), MI(MI),
           UVS(MI.getDebugLoc(), LS) {
       assert(MI.isDebugValue() && "not a DBG_VALUE");
       assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
       Kind = SpillLocKind;
       Loc.SpillLocation = {SpillBase, SpillOffset};
     }
 
+    // Is the Loc field a constant or constant object?
+    bool isConstant() const { return Kind == ImmediateKind; }
+
     /// If this variable is described by a register, return it,
     /// otherwise return 0.
     unsigned isDescribedByReg() const {
       if (Kind == RegisterKind)
         return Loc.RegNo;
       return 0;
     }
 
     /// Determine whether the lexical scope of this value's debug location
     /// dominates MBB.
     bool dominates(MachineBasicBlock &MBB) const { return UVS.dominates(&MBB); }
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
     LLVM_DUMP_METHOD void dump() const { MI.dump(); }
 #endif
 
     bool operator==(const VarLoc &Other) const {
-      return Var == Other.Var && Loc.Hash == Other.Loc.Hash;
+      return Kind == Other.Kind && Var == Other.Var &&
+             Loc.Hash == Other.Loc.Hash;
     }
 
     /// This operator guarantees that VarLocs are sorted by Variable first.
     bool operator<(const VarLoc &Other) const {
       if (Var == Other.Var)
         return Loc.Hash < Other.Loc.Hash;
       return Var < Other.Var;
     }
   };
 
   using VarLocMap = UniqueVector<VarLoc>;
void LiveDebugValues::transferDebugValue(const MachineInstr &MI,
   assert(Var->isValidLocationForIntrinsic(DebugLoc) &&
          "Expected inlined-at fields to agree");
 
   // End all previous ranges of Var.
   DebugVariable V(Var, InlinedAt);
   OpenRanges.erase(V);
 
   // Add the VarLoc to OpenRanges from this DBG_VALUE.
-  // TODO: Currently handles DBG_VALUE which has only reg as location.
-  if (isDbgValueDescribedByReg(MI)) {
+  unsigned ID;
+  if (isDbgValueDescribedByReg(MI) || MI.getOperand(0).isImm() ||
+      MI.getOperand(0).isFPImm() || MI.getOperand(0).isCImm()) {
+    // Use normal VarLoc constructor for registers and immediates.
     VarLoc VL(MI, LS);
-    unsigned ID = VarLocIDs.insert(VL);
+    ID = VarLocIDs.insert(VL);
+    OpenRanges.insert(ID, VL.Var);
+  } else if (MI.hasOneMemOperand()) {
+    // It's a stack spill -- fetch spill base and offset.
+    VarLoc::SpillLoc SpillLocation = extractSpillBaseRegAndOffset(MI);
+    VarLoc VL(MI, SpillLocation.SpillBase, SpillLocation.SpillOffset, LS);
+    ID = VarLocIDs.insert(VL);
     OpenRanges.insert(ID, VL.Var);
+  } else {
+    // This must be an undefined location. We should leave OpenRanges closed.
+    assert(MI.getOperand(0).isReg() && MI.getOperand(0).getReg() == 0 &&
+           "Unexpected non-undef DBG_VALUE encountered");
   }
 }
 
 /// Create new TransferDebugPair and insert it in \p Transfers. The VarLoc
 /// with \p OldVarID should be deleted form \p OpenRanges and replaced with
 /// new VarLoc. If \p NewReg is different than default zero value then the
 /// new location will be register location created by the copy like instruction,
 /// otherwise it is variable's location on the stack.
bool LiveDebugValues::join(
   VarLocSet Diff = InLocsT;
   Diff.intersectWithComplement(ILS);
   for (auto ID : Diff) {
     // This VarLoc is not found in InLocs i.e. it is not yet inserted. So, a
     // new range is started for the var from the mbb's beginning by inserting
     // a new DBG_VALUE. process() will end this range however appropriate.
     const VarLoc &DiffIt = VarLocIDs[ID];
     const MachineInstr *DMI = &DiffIt.MI;
-    MachineInstr *MI =
-        BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(),
+    MachineInstr *MI = nullptr;
+    if (DiffIt.isConstant()) {
+      MachineOperand MO(DMI->getOperand(0));
+      MI = BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(),
+                   false, MO, DMI->getDebugVariable(),
+                   DMI->getDebugExpression());
+    } else {
+      MI = BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(),
                    DMI->isIndirectDebugValue(), DMI->getOperand(0).getReg(),
                    DMI->getDebugVariable(), DMI->getDebugExpression());
       if (DMI->isIndirectDebugValue())
         MI->getOperand(1).setImm(DMI->getOperand(1).getImm());
+    }
     LLVM_DEBUG(dbgs() << "Inserted: "; MI->dump(););
     ILS.set(ID);
     ++NumInserted;
     Changed = true;
   }
   return Changed;
 }
 

test/DebugInfo/COFF/pieces.ll

 ; }
 
 ; ASM-LABEL: loop_csr: # @loop_csr
 ; ASM:        #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
 ; ASM:        #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] 0
 ; ASM: # %bb.2:                                 # %for.body.preheader
 ; ASM:         xorl    %edi, %edi
 ; ASM:         xorl    %esi, %esi
+; ASM: [[oy_ox_start:\.Ltmp[0-9]+]]:
 ; ASM:         .p2align        4, 0x90
 ; ASM: .LBB0_3:                                # %for.body
-; ASM: [[oy_ox_start:\.Ltmp[0-9]+]]:
+; ASM:        #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
 ; ASM:        #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
 ; ASM:        #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
 ; ASM:        .cv_loc 0 1 13 11               # t.c:13:11
 ; ASM:        movl    %edi, %ecx
 ; ASM:        callq   g
 ; ASM:        movl    %eax, %edi
 ; ASM: [[ox_start:\.Ltmp[0-9]+]]:
 ; ASM:         #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] $edi
 ; ASM:         .cv_loc 0 1 14 11               # t.c:14:11
 ; ASM:         movl    %esi, %ecx
 ; ASM:         callq   g
 ; ASM:         movl    %eax, %esi
 ; ASM: [[oy_start:\.Ltmp[0-9]+]]:
 ; ASM:         #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] $esi
 ; ASM:         cmpl    n(%rip), %eax
 ; ASM:         jl      .LBB0_3
+; ASM: [[loopskip_start:\.Ltmp[0-9]+]]:
+; ASM:         #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
+; ASM:         xorl    %esi, %esi
+; ASM:         xorl    %edi, %edi
 ; ASM: [[oy_end:\.Ltmp[0-9]+]]:
 ; ASM:         addl    %edi, %esi
 ; ASM:         movl    %esi, %eax
 
+; XXX FIXME: the debug value line after loopskip_start should be repeated
+; because both fields of 'o' are zero flowing into this block. However, it
+; appears livedebugvalues doesn't account for fragments.
 
 ; ASM-LABEL: pad_right: # @pad_right
 ; ASM:         movq    %rcx, %rax
+; ASM: [[pad_right_tmp:\.Ltmp[0-9]+]]:
 ; ASM:         #DEBUG_VALUE: pad_right:o <- [DW_OP_LLVM_fragment 32 32] $eax
 ; ASM:         retq
 
 
 ; ASM-LABEL: pad_left: # @pad_left
 ; ASM:         .cv_loc 2 1 24 3                # t.c:24:3
 ; ASM:         movq    %rcx, %rax
+; ASM: [[pad_left_tmp:\.Ltmp[0-9]+]]:
 ; ASM:         #DEBUG_VALUE: pad_left:o <- [DW_OP_LLVM_fragment 0 32] $eax
 ; ASM:         retq
 
 
 ; ASM-LABEL: nested: # @nested
 ; ASM:         #DEBUG_VALUE: nested:o <- [DW_OP_deref] [$rcx+0]
 ; ASM:         movl    12(%rcx), %eax
 ; ASM: [[p_start:\.Ltmp[0-9]+]]:

 
 
 ; ASM-LABEL:  .short  4423                    # Record kind: S_GPROC32_ID
 ; ASM:        .asciz  "loop_csr"              # Function name
 ; ASM:        .short  4414                    # Record kind: S_LOCAL
 ; ASM:        .asciz  "o"
 ; ASM:        .cv_def_range    [[oy_ox_start]] [[ox_start]], "C\021\030\000\000\000\000\000\000\000"
 ; ASM:        .cv_def_range    [[oy_ox_start]] [[oy_start]], "C\021\027\000\000\000\004\000\000\000"
-; ASM:        .cv_def_range    [[ox_start]] [[oy_end]], "C\021\030\000\000\000\000\000\000\000"
-; ASM:        .cv_def_range    [[oy_start]] [[oy_end]], "C\021\027\000\000\000\004\000\000\000"
+; ASM:        .cv_def_range    [[ox_start]] [[loopskip_start]], "C\021\030\000\000\000\000\000\000\000"
+; ASM:        .cv_def_range    [[oy_start]] [[loopskip_start]], "C\021\027\000\000\000\004\000\000\000"
 
 
 ; OBJ-LABEL: GlobalProcIdSym {
 ; OBJ:         Kind: S_GPROC32_ID (0x1147)
 ; OBJ:         DisplayName: loop_csr
 ; OBJ:       }
 ; OBJ:       LocalSym {
 ; OBJ:         VarName: o

 ; OBJ:       }
 ; OBJ:       ProcEnd {
 ; OBJ:       }
 
 ; ASM-LABEL:  .short  4423                    # Record kind: S_GPROC32_ID
 ; ASM:        .asciz  "pad_right"             # Function name
 ; ASM:        .short  4414                    # Record kind: S_LOCAL
 ; ASM:        .asciz  "o"
-; ASM:        .cv_def_range    .Ltmp8 .Ltmp8, "C\021\021\000\000\000\004\000\000\000"
+; ASM:        .cv_def_range    [[pad_right_tmp]] [[pad_right_tmp]], "C\021\021\000\000\000\004\000\000\000"
 
 ; OBJ-LABEL: GlobalProcIdSym {
 ; OBJ:         Kind: S_GPROC32_ID (0x1147)
 ; OBJ:         DisplayName: pad_right
 ; OBJ:       }
 ; OBJ:       LocalSym {
 ; OBJ:         VarName: o
 ; OBJ:       }
 ; OBJ:       DefRangeSubfieldRegisterSym {
 ; OBJ:         Register: EAX (0x11)
 ; OBJ:         MayHaveNoName: 0
 ; OBJ:         OffsetInParent: 4
 ; OBJ:         LocalVariableAddrRange {
 ; OBJ:         }
 ; OBJ:       }
 ; OBJ:       ProcEnd {
 ; OBJ:       }
 
 ; ASM-LABEL:  .short  4423                    # Record kind: S_GPROC32_ID
 ; ASM:        .asciz  "pad_left"              # Function name
 ; ASM:        .short  4414                    # Record kind: S_LOCAL
 ; ASM:        .asciz  "o"
-; ASM:        .cv_def_range    .Ltmp10 .Ltmp10, "C\021\021\000\000\000\000\000\000\000"
+; ASM:        .cv_def_range    [[pad_left_tmp]] [[pad_left_tmp]], "C\021\021\000\000\000\000\000\000\000"
 
 ; OBJ-LABEL: GlobalProcIdSym {
 ; OBJ:         Kind: S_GPROC32_ID (0x1147)
 ; OBJ:         DisplayName: pad_left
 ; OBJ:       }
 ; OBJ:       LocalSym {
 ; OBJ:         VarName: o
 ; OBJ:       }

test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir

 # RUN: llc -start-after=livedebugvalues -filetype=obj -o - %s \
 # RUN:   | llvm-dwarfdump -v - | FileCheck %s
 
 # This tests for a crash in DwarfDebug's singular DBG_VALUE range promotion when
 #  encountering an IMPLICIT_DEF in its own lexical scope.
 
 # CHECK: .debug_info contents:
-# CHECK: DW_TAG_formal_parameter
-# CHECK:   DW_AT_const_value [DW_FORM_udata]   (0)
+# CHECK:       DW_TAG_formal_parameter
+# CHECK:       DW_AT_location [DW_FORM_sec_offset]
+# CHECK-NEXT:                 DW_OP_lit0, DW_OP_stack_value
+# CHECK-NEXT:  DW_AT_abstract_origin {{.*}} "name"
 --- |
   ; ModuleID = 't.ll'
   source_filename = "t.ll"
   target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64--linux-gnu"
   
   %class.v = type <{ i32, i8, i8, [2 x i8] }>
   %class.j = type <{ %"class.j<6, a::f>::D", i32, [4 x i8] }>
--- |
   !10 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "q", scope: !11, file: !5, line: 39, size: 64, elements: !2, identifier: "_ZTSN1jILi6EN1a1fEE1qE")
   !11 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "j<6, a::f>", file: !5, line: 7, size: 128, elements: !2, templateParams: !2, identifier: "_ZTS1jILi6EN1a1fEE")
   !12 = !{i32 2, !"Debug Info Version", i32 3}
   !13 = !{i32 1, !"wchar_size", i32 4}
   !14 = distinct !DISubprogram(name: "bv", linkageName: "_ZN1v2bvEv", scope: !15, file: !5, line: 104, type: !16, isLocal: false, isDefinition: true, scopeLine: 104, flags: DIFlagPrototyped, isOptimized: true, unit: !0, declaration: !17, retainedNodes: !2)
   !15 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "v", file: !5, line: 97, size: 64, elements: !2, identifier: "_ZTS1v")
   !16 = !DISubroutineType(types: !2)
   !17 = !DISubprogram(name: "bv", linkageName: "_ZN1v2bvEv", scope: !15, file: !5, line: 98, type: !16, isLocal: false, isDefinition: false, scopeLine: 98, flags: DIFlagPrototyped, isOptimized: true)
-  !18 = !DILocalVariable(arg: 2, scope: !19, file: !5, line: 22, type: !21)
+  !18 = !DILocalVariable(name: "name", arg: 2, scope: !19, file: !5, line: 22, type: !21)
   !19 = distinct !DISubprogram(name: "m", linkageName: "_ZN1jILi6EN1a1fEE1mEj", scope: !11, file: !5, line: 22, type: !16, isLocal: false, isDefinition: true, scopeLine: 22, flags: DIFlagPrototyped, isOptimized: true, unit: !0, declaration: !20, retainedNodes: !2)
   !20 = !DISubprogram(name: "m", linkageName: "_ZN1jILi6EN1a1fEE1mEj", scope: !11, file: !5, line: 22, type: !16, isLocal: false, isDefinition: false, scopeLine: 22, flags: DIFlagPublic | DIFlagPrototyped, isOptimized: true)
   !21 = !DIDerivedType(tag: DW_TAG_typedef, name: "h", file: !5, line: 10, baseType: !22)
   !22 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
   !23 = !DIExpression()
   !24 = !DILocation(line: 22, scope: !19, inlinedAt: !25)
   !25 = distinct !DILocation(line: 109, scope: !26)
   !26 = distinct !DILexicalBlock(scope: !14, file: !5, line: 106)

test/DebugInfo/X86/fission-ranges.ll

 ; CHECK-NEXT: DW_AT_stmt_list
 ; CHECK-NEXT: DW_AT_comp_dir
 ; CHECK-NEXT: DW_AT_GNU_dwo_name
 ; CHECK-NEXT: DW_AT_GNU_dwo_id
 ; CHECK-NEXT: DW_AT_GNU_ranges_base
 ; CHECK-NEXT: DW_AT_GNU_addr_base [DW_FORM_sec_offset]                   (0x00000000)
 
 ; CHECK: .debug_info.dwo contents:
+; CHECK: DW_AT_location [DW_FORM_sec_offset]   ([[P:0x[0-9a-z]*]]
 ; CHECK: DW_AT_location [DW_FORM_sec_offset]   ([[A:0x[0-9a-z]*]]
 ; CHECK: DW_AT_location [DW_FORM_sec_offset]   ([[E:0x[0-9a-z]*]]
 ; CHECK: DW_AT_location [DW_FORM_sec_offset]   ([[B:0x[0-9a-z]*]]
 ; CHECK: DW_AT_location [DW_FORM_sec_offset]   ([[D:0x[0-9a-z]*]]
 ; CHECK: DW_AT_ranges [DW_FORM_sec_offset]   (0x00000000
 ; CHECK-NOT: .debug_loc contents:
 ; CHECK-NOT: Beginning address offset
 ; CHECK: .debug_loc.dwo contents:
 
 ; Don't assume these locations are entirely correct - feel free to update them
 ; if they've changed due to a bugfix, change in register allocation, etc.
 
+; CHECK:      [[P]]:
+; CHECK-NEXT:   Addr idx 1 (w/ length 204): DW_OP_consts +1, DW_OP_stack_value
 ; CHECK:      [[A]]:
 ; CHECK-NEXT:   Addr idx 2 (w/ length 169): DW_OP_consts +0, DW_OP_stack_value
-; CHECK-NEXT:   Addr idx 3 (w/ length 25): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 3 (w/ length 15): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 4 (w/ length 6): DW_OP_breg7 RSP-8
+; CHECK-NEXT:   Addr idx 5 (w/ length 4): DW_OP_reg0 RAX
 ; CHECK:      [[E]]:
-; CHECK-NEXT:   Addr idx 4 (w/ length 19): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 6 (w/ length 9): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 7 (w/ length 98): DW_OP_breg7 RSP-44
 ; CHECK:      [[B]]:
-; CHECK-NEXT:   Addr idx 5 (w/ length 17): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 8 (w/ length 15): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 9 (w/ length 66): DW_OP_breg7 RSP-32
 ; CHECK:      [[D]]:
-; CHECK-NEXT:   Addr idx 6 (w/ length 17): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 10 (w/ length 15): DW_OP_reg0 RAX
+; CHECK-NEXT:   Addr idx 11 (w/ length 42): DW_OP_breg7 RSP-20
 
 ; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)
 ; HDR-NOT: .rela.{{.*}}.dwo
 
 ; Make sure we have enough stuff in the debug_addr to cover the address indexes
-; (6 is the last index in debug_loc.dwo, making 7 entries of 8 bytes each, 7 * 8
-; == 56 base 10 == 38 base 16)
+; (11 is the last index in debug_loc.dwo, making 12 entries of 8 bytes each,
+; 12 * 8 == 96 base 10 == 60 base 16)
 
-; HDR: .debug_addr 00000038
+; HDR: .debug_addr 00000060
 ; HDR-NOT: .rela.{{.*}}.dwo
 
 ; Check for the existence of a DWARF v5-style range list table in the .debug_rnglists
 ; section and that the compile unit has a DW_AT_rnglists_base attribute.
 ; The table should contain at least one rangelist with at least 2 individual ranges.
 
 ; V5RNGLISTS:      .debug_info contents:
 ; V5RNGLISTS:      DW_TAG_compile_unit

test/DebugInfo/X86/live-debug-values-constprop.mir

+# RUN: llc %s -o - -run-pass=livedebugvalues -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
+# RUN: llc %s -o - -start-before=livedebugvalues -filetype=obj -mtriple=x86_64-unknown-unknown | llvm-dwarfdump - | FileCheck %s --check-prefix=RANGES
+# Check that livedebugvalues does the right thing when register and constant
+# DBG_VALUEs interact, and that their ranges are correctly terminated by the
+# debug printing backend.
+--- |
+  ; All these IR functions are duds, see the MIR below.
+  source_filename = "<stdin>"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  
+  define i32 @foo(i32* %bees, i32* %output) !dbg !4 {
+  entry:
+    br i1 undef, label %bb1, label %bb1
+  bb1:
+    br label %bb3
+  bb2:
+    br label %bb3
+  bb3:
+    ret i32 0
+  }
+
+  define i32 @bar(i32* %bees, i32* %output) !dbg !40 {
+  entry:
+    br i1 undef, label %bb1, label %bb1
+  bb1:
+    br label %bb3
+  bb2:
+    br label %bb3
+  bb3:
+    ret i32 0
+  }
+
+  define i32 @baz(i32* %bees, i32* %output) !dbg !80 {
+  entry:
+    br i1 undef, label %bb1, label %bb1
+  bb1:
+    br label %bb3
+  bb2:
+    br label %bb3
+  bb3:
+    ret i32 0
+  }
+
+  define i32 @qux(i32* %bees, i32* %output) !dbg !120 {
+  entry:
+    br i1 undef, label %bb1, label %bb1
+  bb1:
+    br label %bb3
+  bb2:
+    br label %bb3
+  bb3:
+    ret i32 0
+  }
+
+  ; Function Attrs: nounwind readnone speculatable
+  declare void @llvm.dbg.value(metadata, metadata, metadata)
+  
+  ; Function Attrs: nounwind readnone speculatable
+  declare void @llvm.dbg.declare(metadata, metadata, metadata)
+  
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**)
+  
+  !llvm.module.flags = !{!0, !100}
+  !llvm.dbg.cu = !{!1}
+  
+  !100 = !{i32 2, !"Dwarf Version", i32 4}
+  !0 = !{i32 2, !"Debug Info Version", i32 3}
+  !1 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !2, producer: "beards", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+  !2 = !DIFile(filename: "bees.cpp", directory: ".")
+  !3 = !DILocalVariable(name: "flannel", scope: !4, file: !2, line: 1, type: !16)
+  !4 = distinct !DISubprogram(name: "nope", scope: !2, file: !2, line: 1, spFlags: DISPFlagDefinition, unit: !1, retainedNodes: !13, type: !14, isDefinition: true)
+  !5 = !DILocation(line: 0, scope: !4)
+  !6 = !DILocation(line: 1, scope: !4)
+  !7 = !DILocation(line: 2, scope: !4)
+  !8 = !DILocation(line: 4, scope: !4)
+  !9 = !DILocation(line: 5, scope: !4)
+  !10 = !DILocation(line: 6, scope: !4)
+  !11 = !DILocation(line: 7, scope: !4)
+  !12 = !DILocation(line: 8, scope: !4)
+  !13 = !{!3}
+  !14 = !DISubroutineType(types: !15)
+  !15 = !{!16}
+  !16 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
+  !40 = distinct !DISubprogram(name: "bar", scope: !2, file: !2, line: 1, spFlags: DISPFlagDefinition, unit: !1, retainedNodes: !13, type: !14, isDefinition: true)
+  !41 = !DILocalVariable(name: "towel", scope: !40, file: !2, line: 1, type: !16)
+  !42 = !DILocation(line: 40, scope: !40)
+  !80 = distinct !DISubprogram(name: "baz", scope: !2, file: !2, line: 1, spFlags: DISPFlagDefinition, unit: !1, retainedNodes: !13, type: !14, isDefinition: true)
+  !81 = !DILocalVariable(name: "socks", scope: !80, file: !2, line: 1, type: !16)
+  !82 = !DILocation(line: 40, scope: !80)
+  !120 = distinct !DISubprogram(name: "qux", scope: !2, file: !2, line: 1, spFlags: DISPFlagDefinition, unit: !1, retainedNodes: !13, type: !14, isDefinition: true)
+  !121 = !DILocalVariable(name: "shoes", scope: !120, file: !2, line: 1, type: !16)
+  !122 = !DILocation(line: 40, scope: !120)
+
+...
+---
+name:            foo
+alignment:       4
+tracksRegLiveness: true
+registers:       []
+liveins:         
+  - { reg: '$rdi', virtual-reg: '' }
+body:             |
+
+  ; Two DBG_VALUEs for eax merge into bb3, check that livedebugvalues propagates
+  ; the location.
+  ; CHECK-LABEL: name: foo
+  ; CHECK-LABEL: bb.1.bb1
+  ; CHECK:       $eax = MOV32rr
+  ; CHECK-NEXT:  DBG_VALUE $eax
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.2.bb2
+  ; CHECK:       $eax = ADD32ri8
+  ; CHECK-NEXT:  DBG_VALUE $eax
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.3.bb3
+  ; CHECK:       DBG_VALUE $eax
+  ; Test for there being a location-list gap between bb1 and bb2, as the
+  ; variable does not have a location over the ADD32ri. The range should also
+  ; extend over the final bb.
+  ; RANGES-LABEL: DW_TAG_subprogram
+  ; RANGES:       DW_AT_high_pc (0x[[NOPEHIGHPC:[0-9a-f]+]])
+  ; RANGES-LABEL: DW_AT_name ("nope")
+  ; RANGES:       DW_AT_location (0x{{[0-9a-f]+}}
+  ; RANGES-NEXT:   [0x{{[0-9a-f]+}}, 0x[[NOPEADDR:[0-9a-f]+]]): DW_OP_reg0 RAX
+  ; RANGES-NEXT:   [
+  ; RANGES-NOT:    0x[[NOPEADDR]]
+  ; RANGES-SAME:   , 0x[[NOPEHIGHPC]]): DW_OP_reg0 RAX
+
+  bb.0.entry:
+    successors: %bb.1, %bb.2
+    liveins: $rdi
+  
+    $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def $eflags
+    JCC_1 %bb.1, 2, implicit killed $eflags
+    JMP_1 %bb.2
+  
+  bb.1.bb1 (align 4):
+    successors: %bb.3
+    liveins: $ecx, $rdi
+  
+    $eax = MOV32rr killed $ecx, implicit-def $rax
+    DBG_VALUE $eax, $noreg, !3, !DIExpression(), debug-location !8
+    JMP_1 %bb.3
+  
+  bb.2.bb2:
+    successors: %bb.3
+    liveins: $rax
+  
+    $eax = ADD32ri8 $eax, 3, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax
+    DBG_VALUE $eax, $noreg, !3, !DIExpression(), debug-location !8
+    JMP_1 %bb.3
+
+  bb.3.bb3:
+    liveins: $rax
+    RETQ $eax, debug-location !9
+
+...
+---
+name:            bar
+alignment:       4
+tracksRegLiveness: true
+registers:       []
+liveins:         
+  - { reg: '$rdi', virtual-reg: '' }
+body:             |
+  ; Two DBG_VALUEs, one for eax, the other for zero, merge into bb3. Check that
+  ; livedebugvalues does not propagate anything.
+  ; the location.
+  ; CHECK-LABEL: name: bar
+  ; CHECK-LABEL: bb.1.bb1
+  ; CHECK:       $eax = MOV32rr
+  ; CHECK-NEXT:  DBG_VALUE 0
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.2.bb2
+  ; CHECK:       $eax = ADD32ri8
+  ; CHECK-NEXT:  DBG_VALUE $eax
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.3.bb3
+  ; CHECK-NOT:   DBG_VALUE
+  ; Test for there being a location-list gap between bb1 and bb2, the variable
+  ; should not have a location over the ADD32ri. The range of the last entry
+  ; should not cover the last block.
+  ; RANGES-LABEL: DW_TAG_subprogram
+  ; RANGES:       DW_AT_high_pc (0x[[BARHIGHPC:[0-9a-f]+]])
+  ; RANGES-LABEL: DW_AT_name ("bar")
+  ; RANGES:       DW_AT_location (0x{{[0-9a-f]+}}
+  ; RANGES-NEXT:   [0x{{[0-9a-f]+}}, 0x[[BARADDR:[0-9a-f]+]]): DW_OP_consts +0, DW_OP_stack_value
+  ; RANGES-NEXT:   [
+  ; RANGES-NOT:    0x[[BARADDR]]
+  ; RANGES-NOT:    0x[[BARHIGHPC]]
+  ; RANGES-SAME:   ): DW_OP_reg0 RAX
+
+  bb.0.entry:
+    successors: %bb.1, %bb.2
+    liveins: $rdi
+  
+    $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def $eflags
+    JCC_1 %bb.1, 2, implicit killed $eflags
+    JMP_1 %bb.2
+  
+  bb.1.bb1 (align 4):
+    successors: %bb.3
+    liveins: $ecx, $rdi
+  
+    $eax = MOV32rr killed $ecx, implicit-def $rax
+    DBG_VALUE 0, $noreg, !41, !DIExpression(), debug-location !42
+    JMP_1 %bb.3
+  
+  bb.2.bb2:
+    successors: %bb.3
+    liveins: $rax
+  
+    $eax = ADD32ri8 $eax, 3, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax
+    DBG_VALUE $eax, $noreg, !41, !DIExpression(), debug-location !42
+    JMP_1 %bb.3
+
+  bb.3.bb3:
+    liveins: $rax
+    RETQ $eax, debug-location !42
+
+...
+---
+name:            baz
+alignment:       4
+tracksRegLiveness: true
+registers:       []
+liveins:         
+  - { reg: '$rdi', virtual-reg: '' }
+body:             |
+  ; Two DBG_VALUEs, one for zero, the other for eax, merge into bb3. Check that
+  ; livedebugvalues does not propagate anything.
+  ; the location.
+  ; CHECK-LABEL: name: baz
+  ; CHECK-LABEL: bb.1.bb1
+  ; CHECK:       $eax = MOV32rr
+  ; CHECK-NEXT:  DBG_VALUE $eax
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.2.bb2
+  ; CHECK:       $eax = ADD32ri8
+  ; CHECK-NEXT:  DBG_VALUE 0
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.3.bb3
+  ; CHECK-NOT:   DBG_VALUE
+  ; Test for there being a location-list gap between bb1 and bb2, the variable
+  ; should not have a location over the ADD32ri. The range of the last item
+  ; should not cover the last block.
+  ; RANGES-LABEL: DW_TAG_subprogram
+  ; RANGES:       DW_AT_high_pc (0x[[BAZHIGHPC:[0-9a-f]+]])
+  ; RANGES-LABEL: DW_AT_name ("baz")
+  ; RANGES:       DW_AT_location (0x{{[0-9a-f]+}}
+  ; RANGES-NEXT:   [0x{{[0-9a-f]+}}, 0x[[BAZADDR:[0-9a-f]+]]): DW_OP_reg0 RAX
+  ; RANGES-NEXT:   [
+  ; RANGES-NOT:    0x[[BAZADDR]]
+  ; RANGES-NOT:    0x[[BAZHIGHPC]]
+  ; RANGES-SAME:   ): DW_OP_consts +0, DW_OP_stack_value
+
+  bb.0.entry:
+    successors: %bb.1, %bb.2
+    liveins: $rdi
+  
+    $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def $eflags
+    JCC_1 %bb.1, 2, implicit killed $eflags
+    JMP_1 %bb.2
+  
+  bb.1.bb1 (align 4):
+    successors: %bb.3
+    liveins: $ecx, $rdi
+  
+    $eax = MOV32rr killed $ecx, implicit-def $rax
+    DBG_VALUE $eax, $noreg, !81, !DIExpression(), debug-location !82
+    JMP_1 %bb.3
+  
+  bb.2.bb2:
+    successors: %bb.3
+    liveins: $rax
+  
+    $eax = ADD32ri8 $eax, 3, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax
+    DBG_VALUE 0, $noreg, !81, !DIExpression(), debug-location !82
+    JMP_1 %bb.3
+
+  bb.3.bb3:
+    liveins: $rax
+    RETQ $eax, debug-location !82
+
+...
+---
+name:            qux
+alignment:       4
+tracksRegLiveness: true
+registers:       []
+liveins:         
+  - { reg: '$rdi', virtual-reg: '' }
+body:             |
+  ; Two DBG_VALUEs for zero merging into bb3, Check that livedebugvalues does
+  ; propagate the zero into the merging block.
+  ; CHECK-LABEL: name: qux
+  ; CHECK-LABEL: bb.1.bb1
+  ; CHECK:       $eax = MOV32rr
+  ; CHECK-NEXT:  DBG_VALUE 0
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.2.bb2
+  ; CHECK:       $eax = ADD32ri8
+  ; CHECK-NEXT:  DBG_VALUE 0
+  ; CHECK-NEXT:  JMP_1 %bb.3
+  ; CHECK-LABEL: bb.3.bb3
+  ; CHECK:       DBG_VALUE 0
+  ; Test for there being a location-list gap between bb1 and bb2, the variable
+  ; should not have a location over the ADD32ri. The final entry should cover
+  ; the final block.
+  ; RANGES-LABEL: DW_TAG_subprogram
+  ; RANGES:       DW_AT_high_pc (0x[[QUXHIGHPC:[0-9a-f]+]])
+  ; RANGES-LABEL: DW_AT_name ("qux")
+  ; RANGES:       DW_AT_location (0x{{[0-9a-f]+}}
+  ; RANGES-NEXT:   [0x{{[0-9a-f]+}}, 0x[[QUXADDR:[0-9a-f]+]]): DW_OP_consts +0, DW_OP_stack_value
+  ; RANGES-NOT:    0x[[QUXADDR]]
+  ; RANGES-NEXT:   [0x{{[0-9a-f]+}}, 0x[[QUXHIGHPC]]): DW_OP_consts +0, DW_OP_stack_value
+
+  bb.0.entry:
+    successors: %bb.1, %bb.2
+    liveins: $rdi
+  
+    $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def $eflags
+    JCC_1 %bb.1, 2, implicit killed $eflags
+    JMP_1 %bb.2
+  
+  bb.1.bb1 (align 4):
+    successors: %bb.3
+    liveins: $ecx, $rdi
+  
+    $eax = MOV32rr killed $ecx, implicit-def $rax
+    DBG_VALUE 0, $noreg, !121, !DIExpression(), debug-location !122
+    JMP_1 %bb.3
+  
+  bb.2.bb2:
+    successors: %bb.3
+    liveins: $rax
+  
+    $eax = ADD32ri8 $eax, 3, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax
+    DBG_VALUE 0, $noreg, !121, !DIExpression(), debug-location !122
+    JMP_1 %bb.3
+
+  bb.3.bb3:
+    liveins: $rax
+    RETQ $eax, debug-location !122
+
+...