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[AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsics
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Authored by tpr on Mar 4 2019, 7:16 AM.

Details

Summary

On gfx6, a dwordx3 buffer load intrinsic is implemented as a dwordx4
instruction, and a dwordx3 buffer store intrinsic is not supported.
We need to support the dwordx3 load intrinsic because it is generated by
subtarget-unaware code in InstCombine.

Change-Id: I016729d8557b98a52f529638ae97c340a5922a4e

Diff Detail

Repository
rL LLVM

Event Timeline

tpr created this revision.Mar 4 2019, 7:16 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 4 2019, 7:16 AM
arsenm added inline comments.Mar 4 2019, 7:48 AM
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
60 ↗(On Diff #189146)

I would just merge these test files with the rest of the base intrinsic tests

tpr marked an inline comment as done.Mar 4 2019, 8:08 AM
tpr added inline comments.
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
60 ↗(On Diff #189146)

I didn't do that for symmetry with the store tests, which can't be merged because x3 is not supported at all in intrinsics on gfx6.

This revision is now accepted and ready to land.Mar 4 2019, 10:52 AM
This revision was automatically updated to reflect the committed changes.