This is another small step towards adding PIC addressing support to the RISC-V backend.
In this change we enable the codegen flow to emit PC-relative adressing to (dso-)local variables (i.e. PIC addressing that does not involve the GOT table).
Accesses via GOT will be implemented in a future change once we have the missing MC bits needed.
The approach taken is close to the one used in other backends:
- Wrap the address in a target specific DAG node. In this case RISCVISD::WRAPPER_PIC
- Use as operand of the wrapper node the corresponding Target* dag node with a flag. This flag indicates the kind of PIC addressing (PC-rel or GOT).
- Using a custom inserter we expand RISCVISD::WRAPPER_PIC using the usual sequence auipc + addi in a new basic block. We fold, if possible, the addi offset into its user load and store instructions.
The new basic block needs its label always be emitted. Currently AsmPrinter does not emit a label for a basic block if the control flow just falls through to the block. So this change adds a setLabelMustBeEmitted to MachineBasicBlock.