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AMDGPU: Remove redundant MIMG instruction variants
ClosedPublic

Authored by nhaehnle on Jun 14 2018, 6:24 AM.

Details

Summary

For sample and gather ops, we can accurately determine the set of
vaddr-size instruction variants that are required. This reduces
the size of instruction tables by ~5%.

The number of machine instruction opcodes is reduced from 10002
to 9476.

Change-Id: Ie7fc65d3657b762c7816017fe70b2e9bec644a8a

Diff Detail

Repository
rL LLVM

Event Timeline

nhaehnle created this revision.Jun 14 2018, 6:24 AM
This revision is now accepted and ready to land.Jun 14 2018, 9:42 AM
This revision was automatically updated to reflect the committed changes.