This is an archive of the discontinued LLVM Phabricator instance.

Differential D24688

Introduce "hosted" module flag.
AbandonedPublic

Authored by mehdi_amini on Sep 16 2016, 3:20 PM.

Details

Reviewers
• tstellarAMD
pcc
dexonsmith
• espindola
Summary

This module flag is used to mark modules which were compiled in hosted
mode. The TargetLibraryInfoImpl class now uses this module flag to initialize
library availability information.

Fixes PR30403.

Diff Detail

Event Timeline

pcc updated this revision to Diff 71707.Sep 16 2016, 3:20 PM
pcc retitled this revision from to Introduce "hosted" module flag..
pcc updated this object.
pcc added reviewers: mehdi_amini, dexonsmith.
pcc added subscribers: llvm-commits, cfe-commits.
Herald added a reviewer: • tstellarAMD. · View Herald TranscriptSep 16 2016, 3:20 PM
Herald added subscribers: nhaehnle, nemanjai, mehdi_amini and 2 others. · View Herald Transcript
• tstellarAMD edited edge metadata.Sep 21 2016, 1:30 PM

What does "hosted mode" mean?

pcc added a comment.Sep 21 2016, 1:40 PM

The word "hosted" takes its meaning from the C/C++ standards. It refers to a build environment where the standard library is guaranteed to be available.

Note that we've been rethinking this approach on the mailing list, see http://lists.llvm.org/pipermail/llvm-dev/2016-September/105035.html

mehdi_amini commandeered this revision.Jan 6 2017, 10:04 PM
mehdi_amini edited reviewers, added: pcc; removed: mehdi_amini.
Herald added a subscriber: wdng. · View Herald TranscriptJan 6 2017, 10:04 PM
mehdi_amini updated this revision to Diff 83510.Jan 6 2017, 10:04 PM
mehdi_amini edited edge metadata.

Rebase

pcc edited edge metadata.Jan 6 2017, 10:07 PM

Didn't we figure out in the end that this could be a function attribute instead?

mehdi_amini added a comment.Jan 6 2017, 10:09 PM
In D24688#638835, @pcc wrote:

Didn't we figure out in the end that this could be a function attribute instead?

We did? You wrote in PR30403: "I had a brief look at what it would take to have a per-function TLI, and I'm not convinced that it would be worth the effort."

jyknight added a comment.Jan 7 2017, 8:01 PM

Since this requires everyone generating llvm IR to add this module attribute for optimal codegen, it should be documented in release notes and the LangRef, I think.

I mean: it's unfortunate that it's needed at all, but at the very least it should be possible for people to find out about it.

mehdi_amini added a comment.Jan 7 2017, 8:41 PM
In D24688#639158, @jyknight wrote:

Since this requires everyone generating llvm IR to add this module attribute for optimal codegen,

Not sure yet how it'll end up, I'll revamp this.
See also: http://lists.llvm.org/pipermail/cfe-dev/2017-January/052114.html

it should be documented in release notes and the LangRef, I think.

Thanks, I'll try not to forget.

hfinkel added a subscriber: hfinkel.Jan 8 2017, 4:37 AM
In D24688#639158, @jyknight wrote:

Since this requires everyone generating llvm IR to add this module attribute for optimal codegen, it should be documented in release notes and the LangRef, I think.

And, for something like this, here: http://llvm.org/docs/Frontend/PerformanceTips.html

I mean: it's unfortunate that it's needed at all, but at the very least it should be possible for people to find out about it.

pcc added a comment.Jan 9 2017, 6:31 PM
In D24688#638836, @mehdi_amini wrote:
In D24688#638835, @pcc wrote:

Didn't we figure out in the end that this could be a function attribute instead?

We did? You wrote in PR30403: "I had a brief look at what it would take to have a per-function TLI, and I'm not convinced that it would be worth the effort."

That was before I figured out (see http://lists.llvm.org/pipermail/llvm-dev/2016-September/105035.html) that it would not be sound to have mixed freestanding/hosted mean hosted. Specifically:

Here's one
scenario where we may break: suppose I LTO-link an implementation of memset
compiled with -ffreestanding with a program compiled with -fhosted. With
the proposed rule, the loop idiom recognizer may transform the body of the
memset function into a self-call.

You later wrote that we should try not to default to freestanding: http://lists.llvm.org/pipermail/llvm-dev/2016-September/105083.html

And I think I agree with that.

To me that all makes it more reasonable to pursue a per-function approach.

Later on (I don't think it happened on the mailing list or the bug, maybe on IRC) we had another look at GlobalOpt (referenced in PR30403 comment 6) and figured out that we can in fact find a function context.

mehdi_amini added a comment.Jan 9 2017, 6:43 PM

Thanks, I'll investigate function attributes then!

dexonsmith requested changes to this revision.Oct 17 2020, 6:15 AM

You may have abandoned this, but marking as needing changes to get this off my queue.

This revision now requires changes to proceed.Oct 17 2020, 6:15 AM
Herald added a reviewer: • espindola. · View Herald TranscriptOct 17 2020, 6:15 AM
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Herald added subscribers: kerbowa, steven_wu, atanasyan and 7 others. · View Herald Transcript
mehdi_amini abandoned this revision.Oct 17 2020, 10:08 AM

Revision Contents

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Diff 83510

clang/lib/CodeGen/BackendUtil.cpp

Show First 20 Lines • Show All 249 Lines • ▼ Show 20 Linesstatic void addEfficiencySanitizerPass(const PassManagerBuilder &Builder,
EfficiencySanitizerOptions Opts; EfficiencySanitizerOptions Opts;
if (LangOpts.Sanitize.has(SanitizerKind::EfficiencyCacheFrag)) if (LangOpts.Sanitize.has(SanitizerKind::EfficiencyCacheFrag))
Opts.ToolType = EfficiencySanitizerOptions::ESAN_CacheFrag; Opts.ToolType = EfficiencySanitizerOptions::ESAN_CacheFrag;
else if (LangOpts.Sanitize.has(SanitizerKind::EfficiencyWorkingSet)) else if (LangOpts.Sanitize.has(SanitizerKind::EfficiencyWorkingSet))
Opts.ToolType = EfficiencySanitizerOptions::ESAN_WorkingSet; Opts.ToolType = EfficiencySanitizerOptions::ESAN_WorkingSet;
PM.add(createEfficiencySanitizerPass(Opts)); PM.add(createEfficiencySanitizerPass(Opts));
} }
static TargetLibraryInfoImpl *createTLII(llvm::Triple &TargetTriple, static TargetLibraryInfoImpl *createTLII(llvm::Module &M,
const CodeGenOptions &CodeGenOpts) { const CodeGenOptions &CodeGenOpts) {
TargetLibraryInfoImpl *TLII = new TargetLibraryInfoImpl(TargetTriple); TargetLibraryInfoImpl *TLII = new TargetLibraryInfoImpl(M);
if (!CodeGenOpts.SimplifyLibCalls)
TLII->disableAllFunctions();
else {
// Disable individual libc/libm calls in TargetLibraryInfo. // Disable individual libc/libm calls in TargetLibraryInfo.
// FIXME: Consider removing (see PR30403).
LibFunc::Func F; LibFunc::Func F;
for (auto &FuncName : CodeGenOpts.getNoBuiltinFuncs()) for (auto &FuncName : CodeGenOpts.getNoBuiltinFuncs())
if (TLII->getLibFunc(FuncName, F)) if (TLII->getLibFunc(FuncName, F))
TLII->setUnavailable(F); TLII->setUnavailable(F);
}
// FIXME: Move these to module flags.
switch (CodeGenOpts.getVecLib()) { switch (CodeGenOpts.getVecLib()) {
case CodeGenOptions::Accelerate: case CodeGenOptions::Accelerate:
TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::Accelerate); TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::Accelerate);
break; break;
case CodeGenOptions::SVML: case CodeGenOptions::SVML:
TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::SVML); TLII->addVectorizableFunctionsFromVecLib(TargetLibraryInfoImpl::SVML);
break; break;
default: default:
Show All 23 Linesvoid EmitAssemblyHelper::CreatePasses(legacy::PassManager &MPM,
PassManagerBuilderWrapper PMBuilder(CodeGenOpts, LangOpts); PassManagerBuilderWrapper PMBuilder(CodeGenOpts, LangOpts);
// Figure out TargetLibraryInfo. This needs to be added to MPM and FPM // Figure out TargetLibraryInfo. This needs to be added to MPM and FPM
// manually (and not via PMBuilder), since some passes (eg. InstrProfiling) // manually (and not via PMBuilder), since some passes (eg. InstrProfiling)
// are inserted before PMBuilder ones - they'd get the default-constructed // are inserted before PMBuilder ones - they'd get the default-constructed
// TLI with an unknown target otherwise. // TLI with an unknown target otherwise.
Triple TargetTriple(TheModule->getTargetTriple()); Triple TargetTriple(TheModule->getTargetTriple());
std::unique_ptr<TargetLibraryInfoImpl> TLII( std::unique_ptr<TargetLibraryInfoImpl> TLII(
createTLII(TargetTriple, CodeGenOpts)); createTLII(*TheModule, CodeGenOpts));
// At O0 and O1 we only run the always inliner which is more efficient. At // At O0 and O1 we only run the always inliner which is more efficient. At
// higher optimization levels we run the normal inliner. // higher optimization levels we run the normal inliner.
if (CodeGenOpts.OptimizationLevel <= 1) { if (CodeGenOpts.OptimizationLevel <= 1) {
bool InsertLifetimeIntrinsics = (CodeGenOpts.OptimizationLevel != 0 && bool InsertLifetimeIntrinsics = (CodeGenOpts.OptimizationLevel != 0 &&
!CodeGenOpts.DisableLifetimeMarkers); !CodeGenOpts.DisableLifetimeMarkers);
PMBuilder.Inliner = createAlwaysInlinerLegacyPass(InsertLifetimeIntrinsics); PMBuilder.Inliner = createAlwaysInlinerLegacyPass(InsertLifetimeIntrinsics);
} else { } else {
▲ Show 20 Lines • Show All 301 Lines • ▼ Show 20 Lines
} }
bool EmitAssemblyHelper::AddEmitPasses(legacy::PassManager &CodeGenPasses, bool EmitAssemblyHelper::AddEmitPasses(legacy::PassManager &CodeGenPasses,
BackendAction Action, BackendAction Action,
raw_pwrite_stream &OS) { raw_pwrite_stream &OS) {
// Add LibraryInfo. // Add LibraryInfo.
llvm::Triple TargetTriple(TheModule->getTargetTriple()); llvm::Triple TargetTriple(TheModule->getTargetTriple());
std::unique_ptr<TargetLibraryInfoImpl> TLII( std::unique_ptr<TargetLibraryInfoImpl> TLII(
createTLII(TargetTriple, CodeGenOpts)); createTLII(*TheModule, CodeGenOpts));
CodeGenPasses.add(new TargetLibraryInfoWrapperPass(*TLII)); CodeGenPasses.add(new TargetLibraryInfoWrapperPass(*TLII));
// Normal mode, emit a .s or .o file by running the code generator. Note, // Normal mode, emit a .s or .o file by running the code generator. Note,
// this also adds codegenerator level optimization passes. // this also adds codegenerator level optimization passes.
TargetMachine::CodeGenFileType CGFT = TargetMachine::CGFT_AssemblyFile; TargetMachine::CodeGenFileType CGFT = TargetMachine::CGFT_AssemblyFile;
if (Action == Backend_EmitObj) if (Action == Backend_EmitObj)
CGFT = TargetMachine::CGFT_ObjectFile; CGFT = TargetMachine::CGFT_ObjectFile;
else if (Action == Backend_EmitMCNull) else if (Action == Backend_EmitMCNull)
▲ Show 20 Lines • Show All 469 Lines • Show Last 20 Lines

clang/lib/CodeGen/CodeGenModule.cpp

Show First 20 Lines • Show All 480 Lines • ▼ Show 20 Linesvoid CodeGenModule::Release() {
if (uint32_t PLevel = Context.getLangOpts().PICLevel) { if (uint32_t PLevel = Context.getLangOpts().PICLevel) {
assert(PLevel < 3 && "Invalid PIC Level"); assert(PLevel < 3 && "Invalid PIC Level");
getModule().setPICLevel(static_cast<llvm::PICLevel::Level>(PLevel)); getModule().setPICLevel(static_cast<llvm::PICLevel::Level>(PLevel));
if (Context.getLangOpts().PIE) if (Context.getLangOpts().PIE)
getModule().setPIELevel(static_cast<llvm::PIELevel::Level>(PLevel)); getModule().setPIELevel(static_cast<llvm::PIELevel::Level>(PLevel));
} }
if (CodeGenOpts.SimplifyLibCalls)
getModule().addModuleFlag(llvm::Module::Override, "hosted", 1);
SimplifyPersonality(); SimplifyPersonality();
if (getCodeGenOpts().EmitDeclMetadata) if (getCodeGenOpts().EmitDeclMetadata)
EmitDeclMetadata(); EmitDeclMetadata();
if (getCodeGenOpts().EmitGcovArcs || getCodeGenOpts().EmitGcovNotes) if (getCodeGenOpts().EmitGcovArcs || getCodeGenOpts().EmitGcovNotes)
EmitCoverageFile(); EmitCoverageFile();
▲ Show 20 Lines • Show All 3,882 Lines • Show Last 20 Lines

clang/test/CodeGen/nobuiltin.c

Show All 13 Lines
void PR4941(char *s) { void PR4941(char *s) {
// Make sure we don't optimize this loop to a memset(). // Make sure we don't optimize this loop to a memset().
// NOMEMSET-NOT: memset // NOMEMSET-NOT: memset
// MEMSET: memset // MEMSET: memset
for (unsigned i = 0; i < 8192; ++i) for (unsigned i = 0; i < 8192; ++i)
s[i] = 0; s[i] = 0;
} }
// IR1: !llvm.module.flags = !{!0}
// IR1: !0 = !{i32 4, !"hosted", i32 1}
// IR2-NOT: "hosted"

clang/test/CodeGenCUDA/flush-denormals.cu

Show All 12 Lines
// or absence of -fcuda-flush-denormals-to-zero in a module flag. // or absence of -fcuda-flush-denormals-to-zero in a module flag.
// CHECK-LABEL: define void @foo() #0 // CHECK-LABEL: define void @foo() #0
extern "C" __device__ void foo() {} extern "C" __device__ void foo() {}
// FTZ: attributes #0 = {{.*}} "nvptx-f32ftz"="true" // FTZ: attributes #0 = {{.*}} "nvptx-f32ftz"="true"
// NOFTZ-NOT: attributes #0 = {{.*}} "nvptx-f32ftz" // NOFTZ-NOT: attributes #0 = {{.*}} "nvptx-f32ftz"
// FTZ:!llvm.module.flags = !{[[MODFLAG:![0-9]+]]} // FTZ:!llvm.module.flags = !{[[MODFLAG:![0-9]+]]
// FTZ:[[MODFLAG]] = !{i32 4, !"nvvm-reflect-ftz", i32 1} // FTZ:[[MODFLAG]] = !{i32 4, !"nvvm-reflect-ftz", i32 1}
// NOFTZ:!llvm.module.flags = !{[[MODFLAG:![0-9]+]]} // NOFTZ:!llvm.module.flags = !{[[MODFLAG:![0-9]+]]
// NOFTZ:[[MODFLAG]] = !{i32 4, !"nvvm-reflect-ftz", i32 0} // NOFTZ:[[MODFLAG]] = !{i32 4, !"nvvm-reflect-ftz", i32 0}

clang/test/CodeGenCXX/strict-vtable-pointers.cpp

Show First 20 Lines • Show All 205 Lines • ▼ Show 20 Lines
// CHECK-DTORS: call i8* @llvm.invariant.group.barrier( // CHECK-DTORS: call i8* @llvm.invariant.group.barrier(
// CHECK-DTORS-LABEL: {{^}}} // CHECK-DTORS-LABEL: {{^}}}
// CHECK-DTORS-LABEL: define linkonce_odr void @_ZN14DynamicDerivedD2Ev // CHECK-DTORS-LABEL: define linkonce_odr void @_ZN14DynamicDerivedD2Ev
// CHECK-DTORS-NOT: call i8* @llvm.invariant.group.barrier( // CHECK-DTORS-NOT: call i8* @llvm.invariant.group.barrier(
// CHECK-DTORS-LABEL: {{^}}} // CHECK-DTORS-LABEL: {{^}}}
// CHECK-LINK-REQ: !llvm.module.flags = !{![[FIRST:.*]], ![[SEC:.*]]{{.*}}} // CHECK-LINK-REQ: !llvm.module.flags = !{![[FIRST:[0-9]*]], ![[SEC:[0-9]*]]{{.*}}}
// CHECK-LINK-REQ: ![[FIRST]] = !{i32 1, !"StrictVTablePointers", i32 1} // CHECK-LINK-REQ: ![[FIRST]] = !{i32 1, !"StrictVTablePointers", i32 1}
// CHECK-LINK-REQ: ![[SEC]] = !{i32 3, !"StrictVTablePointersRequirement", ![[META:.*]]} // CHECK-LINK-REQ: ![[SEC]] = !{i32 3, !"StrictVTablePointersRequirement", ![[META:.*]]}
// CHECK-LINK-REQ: ![[META]] = !{!"StrictVTablePointers", i32 1} // CHECK-LINK-REQ: ![[META]] = !{!"StrictVTablePointers", i32 1}

lld/test/ELF/lto/undefined-puts.ll

Show All 20 Lines
; there's a relocation for it. ; there's a relocation for it.
; CHECK: Dynamic Relocations { ; CHECK: Dynamic Relocations {
; CHECK-NEXT: 0x203018 R_X86_64_JUMP_SLOT puts 0x0 ; CHECK-NEXT: 0x203018 R_X86_64_JUMP_SLOT puts 0x0
; CHECK-NEXT: } ; CHECK-NEXT: }
; CHECK: DynamicSymbols [ ; CHECK: DynamicSymbols [
; CHECK: Symbol { ; CHECK: Symbol {
; CHECK: Name: puts@ ; CHECK: Name: puts@
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/include/llvm/Analysis/TargetLibraryInfo.h

Show First 20 Lines • Show All 86 Lines • ▼ Show 20 Linespublic:
/// vectorizable functions. /// vectorizable functions.
enum VectorLibrary { enum VectorLibrary {
NoLibrary, // Don't use any vector library. NoLibrary, // Don't use any vector library.
Accelerate, // Use Accelerate framework. Accelerate, // Use Accelerate framework.
SVML // Intel short vector math library. SVML // Intel short vector math library.
}; };
TargetLibraryInfoImpl(); TargetLibraryInfoImpl();
explicit TargetLibraryInfoImpl(const Triple &T); explicit TargetLibraryInfoImpl(const Module &M);
// Provide value semantics. // Provide value semantics.
TargetLibraryInfoImpl(const TargetLibraryInfoImpl &TLI); TargetLibraryInfoImpl(const TargetLibraryInfoImpl &TLI);
TargetLibraryInfoImpl(TargetLibraryInfoImpl &&TLI); TargetLibraryInfoImpl(TargetLibraryInfoImpl &&TLI);
TargetLibraryInfoImpl &operator=(const TargetLibraryInfoImpl &TLI); TargetLibraryInfoImpl &operator=(const TargetLibraryInfoImpl &TLI);
TargetLibraryInfoImpl &operator=(TargetLibraryInfoImpl &&TLI); TargetLibraryInfoImpl &operator=(TargetLibraryInfoImpl &&TLI);
/// Searches for a particular function name. /// Searches for a particular function name.
▲ Show 20 Lines • Show All 244 Lines • ▼ Show 20 Linespublic:
TargetLibraryInfo run(Function &F, FunctionAnalysisManager &); TargetLibraryInfo run(Function &F, FunctionAnalysisManager &);
private: private:
friend AnalysisInfoMixin<TargetLibraryAnalysis>; friend AnalysisInfoMixin<TargetLibraryAnalysis>;
static AnalysisKey Key; static AnalysisKey Key;
Optional<TargetLibraryInfoImpl> PresetInfoImpl; Optional<TargetLibraryInfoImpl> PresetInfoImpl;
StringMap<std::unique_ptr<TargetLibraryInfoImpl>> Impls; DenseMap<const Module *, std::unique_ptr<TargetLibraryInfoImpl>> Impls;
TargetLibraryInfoImpl &lookupInfoImpl(const Triple &T); TargetLibraryInfoImpl &lookupInfoImpl(const Module &M);
}; };
class TargetLibraryInfoWrapperPass : public ImmutablePass { class TargetLibraryInfoWrapperPass : public ImmutablePass {
TargetLibraryInfoImpl TLIImpl; TargetLibraryInfoImpl TLIImpl;
TargetLibraryInfo TLI; TargetLibraryInfo TLI;
virtual void anchor(); virtual void anchor();
public: public:
static char ID; static char ID;
TargetLibraryInfoWrapperPass(); TargetLibraryInfoWrapperPass();
explicit TargetLibraryInfoWrapperPass(const Triple &T); explicit TargetLibraryInfoWrapperPass(const Module &M);
explicit TargetLibraryInfoWrapperPass(const TargetLibraryInfoImpl &TLI); explicit TargetLibraryInfoWrapperPass(const TargetLibraryInfoImpl &TLI);
TargetLibraryInfo &getTLI() { return TLI; } TargetLibraryInfo &getTLI() { return TLI; }
const TargetLibraryInfo &getTLI() const { return TLI; } const TargetLibraryInfo &getTLI() const { return TLI; }
}; };
} // end namespace llvm } // end namespace llvm
#endif #endif

llvm/lib/Analysis/TargetLibraryInfo.cpp

Show First 20 Lines • Show All 436 Lines • ▼ Show 20 Lines
TargetLibraryInfoImpl::TargetLibraryInfoImpl() { TargetLibraryInfoImpl::TargetLibraryInfoImpl() {
// Default to everything being available. // Default to everything being available.
memset(AvailableArray, -1, sizeof(AvailableArray)); memset(AvailableArray, -1, sizeof(AvailableArray));
initialize(*this, Triple(), StandardNames); initialize(*this, Triple(), StandardNames);
} }
TargetLibraryInfoImpl::TargetLibraryInfoImpl(const Triple &T) { TargetLibraryInfoImpl::TargetLibraryInfoImpl(const Module &M) {
// Default to everything being available. // Default to everything being available.
memset(AvailableArray, -1, sizeof(AvailableArray)); memset(AvailableArray, -1, sizeof(AvailableArray));
initialize(*this, T, StandardNames); // Freestanding modules have no functions available.
if (!M.getModuleFlag("hosted")) {
disableAllFunctions();
return;
}
initialize(*this, Triple(M.getTargetTriple()), StandardNames);
} }
TargetLibraryInfoImpl::TargetLibraryInfoImpl(const TargetLibraryInfoImpl &TLI) TargetLibraryInfoImpl::TargetLibraryInfoImpl(const TargetLibraryInfoImpl &TLI)
: CustomNames(TLI.CustomNames), ShouldExtI32Param(TLI.ShouldExtI32Param), : CustomNames(TLI.CustomNames), ShouldExtI32Param(TLI.ShouldExtI32Param),
ShouldExtI32Return(TLI.ShouldExtI32Return), ShouldExtI32Return(TLI.ShouldExtI32Return),
ShouldSignExtI32Param(TLI.ShouldSignExtI32Param) { ShouldSignExtI32Param(TLI.ShouldSignExtI32Param) {
memcpy(AvailableArray, TLI.AvailableArray, sizeof(AvailableArray)); memcpy(AvailableArray, TLI.AvailableArray, sizeof(AvailableArray));
VectorDescs = TLI.VectorDescs; VectorDescs = TLI.VectorDescs;
▲ Show 20 Lines • Show All 764 Lines • ▼ Show 20 LinesStringRef TargetLibraryInfoImpl::getScalarizedFunction(StringRef F,
return I->ScalarFnName; return I->ScalarFnName;
} }
TargetLibraryInfo TargetLibraryAnalysis::run(Module &M, TargetLibraryInfo TargetLibraryAnalysis::run(Module &M,
ModuleAnalysisManager &) { ModuleAnalysisManager &) {
if (PresetInfoImpl) if (PresetInfoImpl)
return TargetLibraryInfo(*PresetInfoImpl); return TargetLibraryInfo(*PresetInfoImpl);
return TargetLibraryInfo(lookupInfoImpl(Triple(M.getTargetTriple()))); return TargetLibraryInfo(lookupInfoImpl(M));
} }
TargetLibraryInfo TargetLibraryAnalysis::run(Function &F, TargetLibraryInfo TargetLibraryAnalysis::run(Function &F,
FunctionAnalysisManager &) { FunctionAnalysisManager &) {
if (PresetInfoImpl) if (PresetInfoImpl)
return TargetLibraryInfo(*PresetInfoImpl); return TargetLibraryInfo(*PresetInfoImpl);
return TargetLibraryInfo( return TargetLibraryInfo(lookupInfoImpl(*F.getParent()));
lookupInfoImpl(Triple(F.getParent()->getTargetTriple())));
} }
TargetLibraryInfoImpl &TargetLibraryAnalysis::lookupInfoImpl(const Triple &T) { TargetLibraryInfoImpl &TargetLibraryAnalysis::lookupInfoImpl(const Module &M) {
std::unique_ptr<TargetLibraryInfoImpl> &Impl = std::unique_ptr<TargetLibraryInfoImpl> &Impl = Impls[&M];
Impls[T.normalize()];
if (!Impl) if (!Impl)
Impl.reset(new TargetLibraryInfoImpl(T)); Impl.reset(new TargetLibraryInfoImpl(M));
return *Impl; return *Impl;
} }
TargetLibraryInfoWrapperPass::TargetLibraryInfoWrapperPass() TargetLibraryInfoWrapperPass::TargetLibraryInfoWrapperPass()
: ImmutablePass(ID), TLIImpl(), TLI(TLIImpl) { : ImmutablePass(ID), TLIImpl(), TLI(TLIImpl) {
initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry()); initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry());
} }
TargetLibraryInfoWrapperPass::TargetLibraryInfoWrapperPass(const Triple &T) TargetLibraryInfoWrapperPass::TargetLibraryInfoWrapperPass(const Module &M)
: ImmutablePass(ID), TLIImpl(T), TLI(TLIImpl) { : ImmutablePass(ID), TLIImpl(M), TLI(TLIImpl) {
initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry()); initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry());
} }
TargetLibraryInfoWrapperPass::TargetLibraryInfoWrapperPass( TargetLibraryInfoWrapperPass::TargetLibraryInfoWrapperPass(
const TargetLibraryInfoImpl &TLIImpl) const TargetLibraryInfoImpl &TLIImpl)
: ImmutablePass(ID), TLIImpl(TLIImpl), TLI(this->TLIImpl) { : ImmutablePass(ID), TLIImpl(TLIImpl), TLI(this->TLIImpl) {
initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry()); initializeTargetLibraryInfoWrapperPassPass(*PassRegistry::getPassRegistry());
} }
Show All 9 Lines

llvm/lib/LTO/LTOBackend.cpp

Show First 20 Lines • Show All 167 Lines • ▼ Show 20 Lines
} }
static void runOldPMPasses(Config &Conf, Module &Mod, TargetMachine *TM, static void runOldPMPasses(Config &Conf, Module &Mod, TargetMachine *TM,
bool IsThinLTO) { bool IsThinLTO) {
legacy::PassManager passes; legacy::PassManager passes;
passes.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis())); passes.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));
PassManagerBuilder PMB; PassManagerBuilder PMB;
PMB.LibraryInfo = new TargetLibraryInfoImpl(Triple(TM->getTargetTriple())); PMB.LibraryInfo = new TargetLibraryInfoImpl(Mod);
PMB.Inliner = createFunctionInliningPass(); PMB.Inliner = createFunctionInliningPass();
// Unconditionally verify input since it is not verified before this // Unconditionally verify input since it is not verified before this
// point and has unknown origin. // point and has unknown origin.
PMB.VerifyInput = true; PMB.VerifyInput = true;
PMB.VerifyOutput = !Conf.DisableVerify; PMB.VerifyOutput = !Conf.DisableVerify;
PMB.LoopVectorize = true; PMB.LoopVectorize = true;
PMB.SLPVectorize = true; PMB.SLPVectorize = true;
PMB.OptLevel = Conf.OptLevel; PMB.OptLevel = Conf.OptLevel;
▲ Show 20 Lines • Show All 191 Lines • Show Last 20 Lines

llvm/lib/LTO/LTOCodeGenerator.cpp

Show First 20 Lines • Show All 560 Lines • ▼ Show 20 Linesbool LTOCodeGenerator::optimize(bool DisableVerify, bool DisableInline,
Triple TargetTriple(TargetMach->getTargetTriple()); Triple TargetTriple(TargetMach->getTargetTriple());
PassManagerBuilder PMB; PassManagerBuilder PMB;
PMB.DisableGVNLoadPRE = DisableGVNLoadPRE; PMB.DisableGVNLoadPRE = DisableGVNLoadPRE;
PMB.LoopVectorize = !DisableVectorization; PMB.LoopVectorize = !DisableVectorization;
PMB.SLPVectorize = !DisableVectorization; PMB.SLPVectorize = !DisableVectorization;
if (!DisableInline) if (!DisableInline)
PMB.Inliner = createFunctionInliningPass(); PMB.Inliner = createFunctionInliningPass();
PMB.LibraryInfo = new TargetLibraryInfoImpl(TargetTriple); PMB.LibraryInfo = new TargetLibraryInfoImpl(*MergedModule);
PMB.OptLevel = OptLevel; PMB.OptLevel = OptLevel;
PMB.VerifyInput = !DisableVerify; PMB.VerifyInput = !DisableVerify;
PMB.VerifyOutput = !DisableVerify; PMB.VerifyOutput = !DisableVerify;
PMB.populateLTOPassManager(passes); PMB.populateLTOPassManager(passes);
// Run our queue of passes all at once now, efficiently. // Run our queue of passes all at once now, efficiently.
passes.run(*MergedModule); passes.run(*MergedModule);
▲ Show 20 Lines • Show All 131 Lines • Show Last 20 Lines

llvm/lib/LTO/ThinLTOCodeGenerator.cpp

Show First 20 Lines • Show All 198 Lines • ▼ Show 20 LinescrossImportIntoModule(Module &TheModule, const ModuleSummaryIndex &Index,
if (!Importer.importFunctions(TheModule, ImportList)) if (!Importer.importFunctions(TheModule, ImportList))
report_fatal_error("importFunctions failed"); report_fatal_error("importFunctions failed");
} }
static void optimizeModule(Module &TheModule, TargetMachine &TM, static void optimizeModule(Module &TheModule, TargetMachine &TM,
unsigned OptLevel) { unsigned OptLevel) {
// Populate the PassManager // Populate the PassManager
PassManagerBuilder PMB; PassManagerBuilder PMB;
PMB.LibraryInfo = new TargetLibraryInfoImpl(TM.getTargetTriple()); PMB.LibraryInfo = new TargetLibraryInfoImpl(TheModule);
PMB.Inliner = createFunctionInliningPass(); PMB.Inliner = createFunctionInliningPass();
// FIXME: should get it from the bitcode? // FIXME: should get it from the bitcode?
PMB.OptLevel = OptLevel; PMB.OptLevel = OptLevel;
PMB.LoopVectorize = true; PMB.LoopVectorize = true;
PMB.SLPVectorize = true; PMB.SLPVectorize = true;
PMB.VerifyInput = true; PMB.VerifyInput = true;
PMB.VerifyOutput = false; PMB.VerifyOutput = false;
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llvm/lib/LTO/UpdateCompilerUsed.cpp

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Linesprivate:
// Output // Output
std::vector<GlobalValue *> &LLVMUsed; std::vector<GlobalValue *> &LLVMUsed;
// Collect names of runtime library functions. User-defined functions with the // Collect names of runtime library functions. User-defined functions with the
// same names are added to llvm.compiler.used to prevent them from being // same names are added to llvm.compiler.used to prevent them from being
// deleted by optimizations. // deleted by optimizations.
void initializeLibCalls(const Module &TheModule) { void initializeLibCalls(const Module &TheModule) {
TargetLibraryInfoImpl TLII(Triple(TM.getTargetTriple())); TargetLibraryInfoImpl TLII(TheModule);
TargetLibraryInfo TLI(TLII); TargetLibraryInfo TLI(TLII);
// TargetLibraryInfo has info on C runtime library calls on the current // TargetLibraryInfo has info on C runtime library calls on the current
// target. // target.
for (unsigned I = 0, E = static_cast<unsigned>(LibFunc::NumLibFuncs); for (unsigned I = 0, E = static_cast<unsigned>(LibFunc::NumLibFuncs);
I != E; ++I) { I != E; ++I) {
LibFunc::Func F = static_cast<LibFunc::Func>(I); LibFunc::Func F = static_cast<LibFunc::Func>(I);
if (TLI.has(F)) if (TLI.has(F))
▲ Show 20 Lines • Show All 59 Lines • Show Last 20 Lines

llvm/test/Analysis/GlobalsModRef/indirect-global.ll

Show All 18 Lines; CHECK: ret i32 0
%g1 = load i32*, i32** @G ; <i32*> [#uses=2] %g1 = load i32*, i32** @G ; <i32*> [#uses=2]
%h1 = load i32, i32* %g1 ; <i32> [#uses=1] %h1 = load i32, i32* %g1 ; <i32> [#uses=1]
store i32 123, i32* %P store i32 123, i32* %P
%g2 = load i32*, i32** @G ; <i32*> [#uses=0] %g2 = load i32*, i32** @G ; <i32*> [#uses=0]
%h2 = load i32, i32* %g1 ; <i32> [#uses=1] %h2 = load i32, i32* %g1 ; <i32> [#uses=1]
%X = sub i32 %h1, %h2 ; <i32> [#uses=1] %X = sub i32 %h1, %h2 ; <i32> [#uses=1]
ret i32 %X ret i32 %X
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Analysis/GlobalsModRef/memset-escape.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Linesif.end: ; preds = %for.end
ret i32 0 ret i32 0
} }
; Function Attrs: nounwind argmemonly ; Function Attrs: nounwind argmemonly
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind argmemonly declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind argmemonly
; Function Attrs: noreturn nounwind ; Function Attrs: noreturn nounwind
declare void @abort() noreturn nounwind declare void @abort() noreturn nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Analysis/TypeBasedAliasAnalysis/memcpyopt.ll

; RUN: opt -S -tbaa -basicaa -memcpyopt -instcombine < %s | FileCheck %s ; RUN: opt -S -tbaa -basicaa -memcpyopt -instcombine < %s | FileCheck %s
target datalayout = "e-p:64:64:64" target datalayout = "e-p:64:64:64"
; The second memcpy is redundant and can be deleted. There's an intervening store, but ; The second memcpy is redundant and can be deleted. There's an intervening store, but
; it has a TBAA tag which declares that it is unrelated. ; it has a TBAA tag which declares that it is unrelated.
; CHECK: @foo ; CHECK: @foo
; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !0 ; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !1
; CHECK-NEXT: store i8 2, i8* %s, align 1, !tbaa [[TAGA:!.*]] ; CHECK-NEXT: store i8 2, i8* %s, align 1, !tbaa [[TAGA:!.*]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
define void @foo(i8* nocapture %p, i8* nocapture %q, i8* nocapture %s) nounwind { define void @foo(i8* nocapture %p, i8* nocapture %q, i8* nocapture %s) nounwind {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !2 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %q, i64 16, i32 1, i1 false), !tbaa !2
store i8 2, i8* %s, align 1, !tbaa !1 store i8 2, i8* %s, align 1, !tbaa !1
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %p, i64 16, i32 1, i1 false), !tbaa !2 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %p, i64 16, i32 1, i1 false), !tbaa !2
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
; CHECK: [[TAGA]] = !{[[TYPEA:!.*]], [[TYPEA]], i64 0} ; CHECK: [[TAGA]] = !{[[TYPEA:!.*]], [[TYPEA]], i64 0}
; CHECK: [[TYPEA]] = !{!"A", !{{.*}}} ; CHECK: [[TYPEA]] = !{!"A", !{{.*}}}
!0 = !{!"tbaa root"} !0 = !{!"tbaa root"}
!1 = !{!3, !3, i64 0} !1 = !{!3, !3, i64 0}
!2 = !{!4, !4, i64 0} !2 = !{!4, !4, i64 0}
!3 = !{!"A", !0} !3 = !{!"A", !0}
!4 = !{!"B", !0} !4 = !{!"B", !0}
!llvm.module.flags = !{!5}
!5 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AArch64/arm64-fcopysign.ll

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines; CHECK: bit.16b v{{[0-9]+}}, v0, v[[CONST]]
%2 = tail call float @copysignf(float 5.000000e-01, float %1) nounwind readnone %2 = tail call float @copysignf(float 5.000000e-01, float %1) nounwind readnone
%3 = fadd float %1, %2 %3 = fadd float %1, %2
ret float %3 ret float %3
} }
declare double @bar(...) declare double @bar(...)
declare double @copysign(double, double) nounwind readnone declare double @copysign(double, double) nounwind readnone
declare float @copysignf(float, float) nounwind readnone declare float @copysignf(float, float) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AArch64/arm64-rounding.ll

Show First 20 Lines • Show All 196 Lines • ▼ Show 20 Lines
define double @test20(double %a) #1 { define double @test20(double %a) #1 {
entry: entry:
%call = tail call double @round(double %a) nounwind readnone %call = tail call double @round(double %a) nounwind readnone
ret double %call ret double %call
} }
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { nounwind "unsafe-fp-math"="true" } attributes #1 = { nounwind "unsafe-fp-math"="true" }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AArch64/arm64-sincos.ll

Show All 34 Lines; CHECK-LINUX: bl cos
%add = fadd double %call, %call1 %add = fadd double %call, %call1
ret double %add ret double %add
} }
declare float @sinf(float) readonly declare float @sinf(float) readonly
declare double @sin(double) readonly declare double @sin(double) readonly
declare float @cosf(float) readonly declare float @cosf(float) readonly
declare double @cos(double) readonly declare double @cos(double) readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AArch64/floatdp_1source.ll

Show First 20 Lines • Show All 130 Lines • ▼ Show 20 Lines
; CHECK: fcvt {{h[0-9]+}}, {{d[0-9]+}} ; CHECK: fcvt {{h[0-9]+}}, {{d[0-9]+}}
%val64to32 = fptrunc double %val64 to float %val64to32 = fptrunc double %val64 to float
store volatile float %val64to32, float* @varfloat store volatile float %val64to32, float* @varfloat
; CHECK: fcvt {{s[0-9]+}}, {{d[0-9]+}} ; CHECK: fcvt {{s[0-9]+}}, {{d[0-9]+}}
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AArch64/round-conv.ll

Show First 20 Lines • Show All 322 Lines • ▼ Show 20 Lines
declare float @floorf(float) nounwind readnone declare float @floorf(float) nounwind readnone
declare double @floor(double) nounwind readnone declare double @floor(double) nounwind readnone
declare float @ceilf(float) nounwind readnone declare float @ceilf(float) nounwind readnone
declare double @ceil(double) nounwind readnone declare double @ceil(double) nounwind readnone
declare float @truncf(float) nounwind readnone declare float @truncf(float) nounwind readnone
declare double @trunc(double) nounwind readnone declare double @trunc(double) nounwind readnone
declare float @roundf(float) nounwind readnone declare float @roundf(float) nounwind readnone
declare double @round(double) nounwind readnone declare double @round(double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/complex-folding.ll

Show All 9 Linesentry:
%3 = bitcast i32 %2 to float %3 = bitcast i32 %2 to float
%4 = insertelement <4 x float> undef, float %3, i32 0 %4 = insertelement <4 x float> undef, float %3, i32 0
call void @llvm.r600.store.swizzle(<4 x float> %4, i32 0, i32 0) call void @llvm.r600.store.swizzle(<4 x float> %4, i32 0, i32 0)
ret void ret void
} }
declare float @fabs(float ) readnone declare float @fabs(float ) readnone
declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/fabs.f64.ll

Show First 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; SI: v_and_b32 ; SI: v_and_b32
; SI: s_endpgm ; SI: s_endpgm
define void @fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) { define void @fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) {
%bc= bitcast i64 %in to double %bc= bitcast i64 %in to double
%fabs = call double @fabs(double %bc) %fabs = call double @fabs(double %bc)
store double %fabs, double addrspace(1)* %out store double %fabs, double addrspace(1)* %out
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/fabs.ll

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Linesdefine void @fabs_fold(float addrspace(1)* %out, float %in0, float %in1) {
store float %fmul, float addrspace(1)* %out store float %fmul, float addrspace(1)* %out
ret void ret void
} }
declare float @fabs(float) readnone declare float @fabs(float) readnone
declare float @llvm.fabs.f32(float) readnone declare float @llvm.fabs.f32(float) readnone
declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/floor.ll

; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s
; CHECK: FLOOR * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ; CHECK: FLOOR * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
define amdgpu_ps void @test(<4 x float> inreg %reg0) { define amdgpu_ps void @test(<4 x float> inreg %reg0) {
%r0 = extractelement <4 x float> %reg0, i32 0 %r0 = extractelement <4 x float> %reg0, i32 0
%r1 = call float @floor(float %r0) %r1 = call float @floor(float %r0)
%vec = insertelement <4 x float> undef, float %r1, i32 0 %vec = insertelement <4 x float> undef, float %r1, i32 0
call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0) call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
ret void ret void
} }
declare float @floor(float) readonly declare float @floor(float) readonly
declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Linesdefine void @fneg_fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
store <4 x double> %fsub, <4 x double> addrspace(1)* %out store <4 x double> %fsub, <4 x double> addrspace(1)* %out
ret void ret void
} }
declare double @fabs(double) readnone declare double @fabs(double) readnone
declare double @llvm.fabs.f64(double) readnone declare double @llvm.fabs.f64(double) readnone
declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone
declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/fneg-fabs.ll

Show First 20 Lines • Show All 104 Lines • ▼ Show 20 Linesdefine void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) {
store <4 x float> %fsub, <4 x float> addrspace(1)* %out store <4 x float> %fsub, <4 x float> addrspace(1)* %out
ret void ret void
} }
declare float @fabs(float) readnone declare float @fabs(float) readnone
declare float @llvm.fabs.f32(float) readnone declare float @llvm.fabs.f32(float) readnone
declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/llvm.SI.fs.interp.ll

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #0 declare float @llvm.SI.fs.interp(i32, i32, i32, <2 x i32>) #0
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
attributes #1 = { readnone } attributes #1 = { readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
declare float @fabs(float) #0 declare float @fabs(float) #0
declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
; Function Attrs: readnone ; Function Attrs: readnone
declare <4 x float> @llvm.r600.texc(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0 declare <4 x float> @llvm.r600.texc(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) #0
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/AMDGPU/schedule-if-2.ll

Show First 20 Lines • Show All 86 Lines • ▼ Show 20 LinesIF23: ; preds = %ELSE
br label %ENDIF br label %ENDIF
} }
declare float @fabs(float) #0 declare float @fabs(float) #0
declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
attributes #0 = { readonly } attributes #0 = { readonly }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/apcs-vfp.ll

Show First 20 Lines • Show All 145 Lines • ▼ Show 20 Lines
declare arm_aapcs_vfpcc double @x(double, double, double, double, double, double, double, float, double) declare arm_aapcs_vfpcc double @x(double, double, double, double, double, double, double, float, double)
declare arm_aapcs_vfpcc double @cos(double) #0 declare arm_aapcs_vfpcc double @cos(double) #0
declare arm_aapcs_vfpcc double @sin(double) #0 declare arm_aapcs_vfpcc double @sin(double) #0
declare double @__exp10(double) declare double @__exp10(double)
attributes #0 = { readnone } attributes #0 = { readnone }
attributes #1 = { readonly } attributes #1 = { readonly }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/arm32-round-conv.ll

Show First 20 Lines • Show All 109 Lines • ▼ Show 20 Lines
} }
declare float @floorf(float) nounwind readnone declare float @floorf(float) nounwind readnone
declare double @floor(double) nounwind readnone declare double @floor(double) nounwind readnone
declare float @ceilf(float) nounwind readnone declare float @ceilf(float) nounwind readnone
declare double @ceil(double) nounwind readnone declare double @ceil(double) nounwind readnone
declare float @roundf(float) nounwind readnone declare float @roundf(float) nounwind readnone
declare double @round(double) nounwind readnone declare double @round(double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/arm32-rounding.ll

Show First 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
declare float @roundf(float) nounwind readnone declare float @roundf(float) nounwind readnone
declare double @round(double) nounwind readnone declare double @round(double) nounwind readnone
declare float @truncf(float) nounwind readnone declare float @truncf(float) nounwind readnone
declare double @trunc(double) nounwind readnone declare double @trunc(double) nounwind readnone
declare float @nearbyintf(float) nounwind readnone declare float @nearbyintf(float) nounwind readnone
declare double @nearbyint(double) nounwind readnone declare double @nearbyint(double) nounwind readnone
declare float @rintf(float) nounwind readnone declare float @rintf(float) nounwind readnone
declare double @rint(double) nounwind readnone declare double @rint(double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/fabs-to-bfc.ll

; RUN: llc < %s -mtriple=armv5e-none-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=CHECK-VABS ; RUN: llc < %s -mtriple=armv5e-none-linux-gnueabi -mattr=+vfp2 | FileCheck %s -check-prefix=CHECK-VABS
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+vfp3 | FileCheck %s -check-prefix=CHECK-BFC ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+vfp3 | FileCheck %s -check-prefix=CHECK-BFC
define double @test(double %tx) { define double @test(double %tx) {
;CHECK-LABEL: test: ;CHECK-LABEL: test:
%call = tail call double @fabs(double %tx) %call = tail call double @fabs(double %tx)
ret double %call ret double %call
;CHECK-VABS: vabs.f64 ;CHECK-VABS: vabs.f64
;CHECK-BFC: bfc ;CHECK-BFC: bfc
} }
declare double @fabs(double) readnone declare double @fabs(double) readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/fabss.ll

Show All 21 Lines
; NFP0: vabs.f32 s ; NFP0: vabs.f32 s
; CORTEXA8-LABEL: test: ; CORTEXA8-LABEL: test:
; CORTEXA8: vadd.f32 [[D1:d[0-9]+]] ; CORTEXA8: vadd.f32 [[D1:d[0-9]+]]
; CORTEXA8: vabs.f32 {{d[0-9]+}}, [[D1]] ; CORTEXA8: vabs.f32 {{d[0-9]+}}, [[D1]]
; CORTEXA9-LABEL: test: ; CORTEXA9-LABEL: test:
; CORTEXA9: vabs.f32 s{{.}}, s{{.}} ; CORTEXA9: vabs.f32 s{{.}}, s{{.}}
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/fcopysign.ll

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Lines; SOFT: vbsl [[REG6]], [[REG7]],
%2 = tail call float @copysignf(float 5.000000e-01, float %1) nounwind readnone %2 = tail call float @copysignf(float 5.000000e-01, float %1) nounwind readnone
%3 = fadd float %1, %2 %3 = fadd float %1, %2
ret float %3 ret float %3
} }
declare double @bar(...) declare double @bar(...)
declare double @copysign(double, double) nounwind declare double @copysign(double, double) nounwind
declare float @copysignf(float, float) nounwind declare float @copysignf(float, float) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/floorf.ll

Show All 21 Lines
} }
declare float @floorf(float) nounwind readnone declare float @floorf(float) nounwind readnone
declare float @ceilf(float) nounwind readnone declare float @ceilf(float) nounwind readnone
declare float @truncf(float) nounwind readnone declare float @truncf(float) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/fparith.ll

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Lines
;CHECK-LABEL: f12: ;CHECK-LABEL: f12:
;CHECK: vabs.f64 ;CHECK: vabs.f64
entry: entry:
%tmp1 = call double @fabs( double %a ) readnone ; <double> [#uses=1] %tmp1 = call double @fabs( double %a ) readnone ; <double> [#uses=1]
ret double %tmp1 ret double %tmp1
} }
declare double @fabs(double) declare double @fabs(double)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/ifcvt10.ll

Show All 35 Lines
declare double @sqrt(double) readnone declare double @sqrt(double) readnone
declare double @cos(double) readnone declare double @cos(double) readnone
declare double @fabs(double) declare double @fabs(double)
declare double @llvm.pow.f64(double, double) nounwind readonly declare double @llvm.pow.f64(double, double) nounwind readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/sincos.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines; NOOPT-GNU: bl cos
%add = fadd double %call, %call1 %add = fadd double %call, %call1
ret double %add ret double %add
} }
declare float @sinf(float) readonly declare float @sinf(float) readonly
declare double @sin(double) readonly declare double @sin(double) readonly
declare float @cosf(float) readonly declare float @cosf(float) readonly
declare double @cos(double) readonly declare double @cos(double) readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/v7k-libcalls.ll

Show First 20 Lines • Show All 155 Lines • ▼ Show 20 Lines
declare arm_aapcs_vfpcc double @x(double, double, double, double, double, double, double, float, double) declare arm_aapcs_vfpcc double @x(double, double, double, double, double, double, double, float, double)
declare arm_aapcs_vfpcc double @cos(double) #0 declare arm_aapcs_vfpcc double @cos(double) #0
declare arm_aapcs_vfpcc double @sin(double) #0 declare arm_aapcs_vfpcc double @sin(double) #0
declare double @__exp10(double) declare double @__exp10(double)
attributes #0 = { readnone } attributes #0 = { readnone }
attributes #1 = { readonly } attributes #1 = { readonly }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/v7k-sincos.ll

; RUN: llc -mtriple=thumbv7k-apple-watchos2.0 -o - %s | FileCheck %s ; RUN: llc -mtriple=thumbv7k-apple-watchos2.0 -o - %s | FileCheck %s
declare double @sin(double) nounwind readnone declare double @sin(double) nounwind readnone
declare double @cos(double) nounwind readnone declare double @cos(double) nounwind readnone
define double @test_stret(double %in) { define double @test_stret(double %in) {
; CHECK-LABEL: test_stret: ; CHECK-LABEL: test_stret:
; CHECK: bl ___sincos_stret ; CHECK: bl ___sincos_stret
; CHECK-NOT: ldr ; CHECK-NOT: ldr
; CHECK: vadd.f64 d0, d0, d1 ; CHECK: vadd.f64 d0, d0, d1
%sin = call double @sin(double %in) %sin = call double @sin(double %in)
%cos = call double @cos(double %in) %cos = call double @cos(double %in)
%sum = fadd double %sin, %cos %sum = fadd double %sin, %cos
ret double %sum ret double %sum
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/ARM/vfp.ll

Show First 20 Lines • Show All 148 Lines • ▼ Show 20 Lines
cond_true: ; preds = %entry cond_true: ; preds = %entry
%tmp.upgrd.4 = tail call i32 (...) @bar( ) ; <i32> [#uses=0] %tmp.upgrd.4 = tail call i32 (...) @bar( ) ; <i32> [#uses=0]
ret void ret void
cond_false: ; preds = %entry cond_false: ; preds = %entry
%tmp1 = tail call i32 (...) @baz( ) ; <i32> [#uses=0] %tmp1 = tail call i32 (...) @baz( ) ; <i32> [#uses=0]
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Hexagon/fminmax.ll

Show All 19 Lines
} }
declare float @fminf(float, float) #0 declare float @fminf(float, float) #0
declare float @fmaxf(float, float) #0 declare float @fmaxf(float, float) #0
attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Hexagon/opt-fabs.ll

; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=hexagonv5 -hexagon-bit=0 < %s | FileCheck %s ; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=hexagonv5 -hexagon-bit=0 < %s | FileCheck %s
; Optimize fabsf to clrbit in V5. ; Optimize fabsf to clrbit in V5.
; CHECK: r{{[0-9]+}} = clrbit(r{{[0-9]+}}, #31) ; CHECK: r{{[0-9]+}} = clrbit(r{{[0-9]+}}, #31)
define float @my_fabsf(float %x) nounwind { define float @my_fabsf(float %x) nounwind {
entry: entry:
%x.addr = alloca float, align 4 %x.addr = alloca float, align 4
store float %x, float* %x.addr, align 4 store float %x, float* %x.addr, align 4
%0 = load float, float* %x.addr, align 4 %0 = load float, float* %x.addr, align 4
%call = call float @fabsf(float %0) readnone %call = call float @fabsf(float %0) readnone
ret float %call ret float %call
} }
declare float @fabsf(float) declare float @fabsf(float)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/f16abs.ll

Show All 29 Lines
declare float @fabsf(float) #1 declare float @fabsf(float) #1
attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
attributes #1 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } attributes #1 = { nounwind optsize readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
attributes #2 = { nounwind optsize readnone } attributes #2 = { nounwind optsize readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/fabs.ll

Show All 30 Lines
; CHECK-LABEL: foo1: ; CHECK-LABEL: foo1:
; CHECK: abs.d ; CHECK: abs.d
%call = tail call double @fabs(double %a) nounwind readnone %call = tail call double @fabs(double %a) nounwind readnone
ret double %call ret double %call
} }
declare double @fabs(double) nounwind readnone declare double @fabs(double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1 ; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1
; 64R2: dmtc1 $[[INS]], $f0 ; 64R2: dmtc1 $[[INS]], $f0
%add = fadd double %d, 1.000000e+00 %add = fadd double %d, 1.000000e+00
%conv = fpext float %f to double %conv = fpext float %f to double
%call = tail call double @copysign(double %add, double %conv) nounwind readnone %call = tail call double @copysign(double %add, double %conv) nounwind readnone
ret double %call ret double %call
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/fcopysign.ll

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; 32R2: mtc1 $[[INS]], $f0 ; 32R2: mtc1 $[[INS]], $f0
%call = tail call float @copysignf(float %f0, float %f1) nounwind readnone %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone
ret float %call ret float %call
} }
declare float @copysignf(float, float) nounwind readnone declare float @copysignf(float, float) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/llvm-ir/sqrt.ll

; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s ; RUN: llc < %s -march=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s ; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s
define float @sqrt_fn(float %value) #0 { define float @sqrt_fn(float %value) #0 {
entry: entry:
%sqrtf = tail call float @sqrtf(float %value) #0 %sqrtf = tail call float @sqrtf(float %value) #0
ret float %sqrtf ret float %sqrtf
} }
declare float @sqrtf(float) declare float @sqrtf(float)
; CHECK: sqrt.s $f0, $f12 ; CHECK: sqrt.s $f0, $f12
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/mips64-f128.ll

Show First 20 Lines • Show All 669 Lines • ▼ Show 20 Lines
; CMP_CC_FMT: or $4, $[[NE2]], $[[EQ2]] ; CMP_CC_FMT: or $4, $[[NE2]], $[[EQ2]]
define fp128 @selectCC_LD(fp128 %a, fp128 %b, fp128 %c, fp128 %d) { define fp128 @selectCC_LD(fp128 %a, fp128 %b, fp128 %c, fp128 %d) {
entry: entry:
%cmp = fcmp ogt fp128 %a, %b %cmp = fcmp ogt fp128 %a, %b
%cond = select i1 %cmp, fp128 %c, fp128 %d %cond = select i1 %cmp, fp128 %c, fp128 %d
ret fp128 %cond ret fp128 %cond
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/Mips/optimize-fp-math.ll

Show All 25 Lines
define double @test_sqrt_double_(double %a) { define double @test_sqrt_double_(double %a) {
entry: entry:
%call = tail call double @sqrt(double %a) %call = tail call double @sqrt(double %a)
ret double %call ret double %call
} }
declare double @sqrt(double) declare double @sqrt(double)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/PowerPC/copysignl.ll

Show First 20 Lines • Show All 75 Lines • ▼ Show 20 Lines
; CHECK: blr ; CHECK: blr
; CHECK-VSX-LABEL: @foo_lf ; CHECK-VSX-LABEL: @foo_lf
; CHECK-VSX: bl copysignl ; CHECK-VSX: bl copysignl
; CHECK-VSX: blr ; CHECK-VSX: blr
} }
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/PowerPC/fabs.ll

Show All 22 Lines
; CHECK-NEXT: blr ; CHECK-NEXT: blr
; ;
%bc1 = bitcast float %x to i32 %bc1 = bitcast float %x to i32
%and = and i32 %bc1, 2147483647 %and = and i32 %bc1, 2147483647
%bc2 = bitcast i32 %and to float %bc2 = bitcast i32 %and to float
ret float %bc2 ret float %bc2
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/PowerPC/fcpsgn.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; CHECK: blr ; CHECK: blr
; CHECK-VSX-LABEL: @foo_ds ; CHECK-VSX-LABEL: @foo_ds
; CHECK-VSX: fcpsgn 1, 2, 1 ; CHECK-VSX: fcpsgn 1, 2, 1
; CHECK-VSX: blr ; CHECK-VSX: blr
} }
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/PowerPC/fnabs.ll

; RUN: llc -verify-machineinstrs < %s -mattr=-vsx -march=ppc32 | grep fnabs ; RUN: llc -verify-machineinstrs < %s -mattr=-vsx -march=ppc32 | grep fnabs
declare double @fabs(double) declare double @fabs(double)
define double @test(double %X) { define double @test(double %X) {
%Y = call double @fabs( double %X ) readnone ; <double> [#uses=1] %Y = call double @fabs( double %X ) readnone ; <double> [#uses=1]
%Z = fsub double -0.000000e+00, %Y ; <double> [#uses=1] %Z = fsub double -0.000000e+00, %Y ; <double> [#uses=1]
ret double %Z ret double %Z
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/PowerPC/rounding-ops.ll

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Lines
; CHECK-LABEL: test10: ; CHECK-LABEL: test10:
; CHECK: friz 1, 1 ; CHECK: friz 1, 1
; CHECK-VSX-LABEL: test10: ; CHECK-VSX-LABEL: test10:
; CHECK-VSX: xsrdpiz 1, 1 ; CHECK-VSX: xsrdpiz 1, 1
} }
declare double @trunc(double) nounwind readnone declare double @trunc(double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/PowerPC/vsx-elementary-arith.ll

Show First 20 Lines • Show All 143 Lines • ▼ Show 20 Lines
; Function Attrs: nounwind ; Function Attrs: nounwind
declare double @sqrt(double) declare double @sqrt(double)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float>) declare <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float>)
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double>) declare <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double>)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SPARC/64abi.ll

Show First 20 Lines • Show All 537 Lines • ▼ Show 20 Linesentry:
%0 = tail call inreg float @cosf(float %arg1) %0 = tail call inreg float @cosf(float %arg1)
%1 = tail call inreg float @sinf(float %arg0) %1 = tail call inreg float @sinf(float %arg0)
%2 = fmul float %0, %1 %2 = fmul float %0, %1
ret float %2 ret float %2
} }
declare inreg float @cosf(float %arg) readnone nounwind declare inreg float @cosf(float %arg) readnone nounwind
declare inreg float @sinf(float %arg) readnone nounwind declare inreg float @sinf(float %arg) readnone nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/fp-copysign-01.ll

Show First 20 Lines • Show All 120 Lines • ▼ Show 20 Lines
; CHECK: std [[ALOW]], 8(%r2) ; CHECK: std [[ALOW]], 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%a = load volatile fp128 , fp128 *%aptr %a = load volatile fp128 , fp128 *%aptr
%b = load volatile fp128 , fp128 *%bptr %b = load volatile fp128 , fp128 *%bptr
%c = call fp128 @copysignl(fp128 %a, fp128 %b) readnone %c = call fp128 @copysignl(fp128 %a, fp128 %b) readnone
store fp128 %c, fp128 *%cptr store fp128 %c, fp128 *%cptr
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/fp-sincos-01.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
declare float @sinf(float) readonly declare float @sinf(float) readonly
declare double @sin(double) readonly declare double @sin(double) readonly
declare fp128 @sinl(fp128) readonly declare fp128 @sinl(fp128) readonly
declare float @cosf(float) readonly declare float @cosf(float) readonly
declare double @cos(double) readonly declare double @cos(double) readonly
declare fp128 @cosl(fp128) readonly declare fp128 @cosl(fp128) readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/fp-sqrt-01.ll

Show First 20 Lines • Show All 159 Lines • ▼ Show 20 Lines
; CHECK: sqebr %f0, %f2 ; CHECK: sqebr %f0, %f2
; CHECK: cebr %f0, %f0 ; CHECK: cebr %f0, %f0
; CHECK: bnor %r14 ; CHECK: bnor %r14
; CHECK: ler %f0, %f2 ; CHECK: ler %f0, %f2
; CHECK: jg sqrtf@PLT ; CHECK: jg sqrtf@PLT
%res = tail call float @sqrtf(float %val) %res = tail call float @sqrtf(float %val)
ret float %res ret float %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/fp-sqrt-02.ll

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; CHECK: sqdbr %f0, %f2 ; CHECK: sqdbr %f0, %f2
; CHECK: cdbr %f0, %f0 ; CHECK: cdbr %f0, %f0
; CHECK: bnor %r14 ; CHECK: bnor %r14
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: jg sqrt@PLT ; CHECK: jg sqrt@PLT
%res = tail call double @sqrt(double %val) %res = tail call double @sqrt(double %val)
ret double %res ret double %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/memchr-01.ll

Show All 13 Lines
; CHECK: srst %r2, [[REG]] ; CHECK: srst %r2, [[REG]]
; CHECK-NEXT: jo [[LABEL]] ; CHECK-NEXT: jo [[LABEL]]
; CHECK: blr %r14 ; CHECK: blr %r14
; CHECK: lghi %r2, 0 ; CHECK: lghi %r2, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call i8 *@memchr(i8 *%src, i16 %char, i32 %len) %res = call i8 *@memchr(i8 *%src, i16 %char, i32 %len)
ret i8 *%res ret i8 *%res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/memchr-02.ll

Show First 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; CHECK: br %r14 ; CHECK: br %r14
%char = load volatile i8 , i8 *%charptr %char = load volatile i8 , i8 *%charptr
%charext = zext i8 %char to i32 %charext = zext i8 %char to i32
%res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len) %res1 = call i8 *@memchr(i8 *%src, i32 %charext, i64 %len)
call void asm sideeffect "blah $0", "{r0}" (i32 0) call void asm sideeffect "blah $0", "{r0}" (i32 0)
%res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len) %res2 = call i8 *@memchr(i8 *%res1, i32 %charext, i64 %len)
ret i8 *%res2 ret i8 *%res2
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/memcmp-01.ll

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; CHECK: brctg [[COUNT]], [[LOOP]] ; CHECK: brctg [[COUNT]], [[LOOP]]
; CHECK: clc 0(1,%r2), 0(%r3) ; CHECK: clc 0(1,%r2), 0(%r3)
; CHECK: [[LABEL]]: ; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]] ; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14 ; CHECK: br %r14
%res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 769) %res = call i32 @memcmp(i8 *%src1, i8 *%src2, i64 769)
ret i32 %res ret i32 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/memcmp-02.ll

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; CHECK: jlh [[LABEL:\..*]] ; CHECK: jlh [[LABEL:\..*]]
; CHECK: clc 256(1,%r2), 256(%r3) ; CHECK: clc 256(1,%r2), 256(%r3)
; CHECK: [[LABEL]]: ; CHECK: [[LABEL]]:
; CHECK: ipm [[REG:%r[0-5]]] ; CHECK: ipm [[REG:%r[0-5]]]
; CHECK: br %r14 ; CHECK: br %r14
%res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 257) %res = call i64 @memcmp(i8 *%src1, i8 *%src2, i64 257)
ret i64 %res ret i64 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/strcmp-01.ll

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store: store:
store i32 0, i32 *%dest store i32 0, i32 *%dest
br label %exit br label %exit
exit: exit:
ret i32 %res ret i32 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/strcmp-02.ll

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store: store:
store i64 0, i64 *%dest store i64 0, i64 *%dest
br label %exit br label %exit
exit: exit:
ret i64 %res ret i64 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/strcpy-01.ll

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; CHECK-NEXT: jo [[LABEL]] ; CHECK-NEXT: jo [[LABEL]]
; CHECK: mvhi 0(%r6), 0 ; CHECK: mvhi 0(%r6), 0
; CHECK: br %r14 ; CHECK: br %r14
%res = load i32 , i32 *%resptr %res = load i32 , i32 *%resptr
%unused = call i8 *@strcpy(i8 *%dest, i8 *%src) %unused = call i8 *@strcpy(i8 *%dest, i8 *%src)
store i32 0, i32 *%storeptr store i32 0, i32 *%storeptr
ret i32 %res ret i32 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/strlen-01.ll

Show All 31 Lines
; CHECK-NEXT: srst %r2, [[REG]] ; CHECK-NEXT: srst %r2, [[REG]]
; CHECK-NEXT: jo [[LABEL]] ; CHECK-NEXT: jo [[LABEL]]
; CHECK-NEXT: BB#{{[0-9]+}} ; CHECK-NEXT: BB#{{[0-9]+}}
; CHECK-NEXT: sgr %r2, %r3 ; CHECK-NEXT: sgr %r2, %r3
; CHECK: br %r14 ; CHECK: br %r14
%res = call i64 @strnlen(i8 *%src, i64 %len) %res = call i64 @strnlen(i8 *%src, i64 %len)
ret i64 %res ret i64 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/SystemZ/strlen-02.ll

Show All 31 Lines
; CHECK-NEXT: srst %r2, [[REG]] ; CHECK-NEXT: srst %r2, [[REG]]
; CHECK-NEXT: jo [[LABEL]] ; CHECK-NEXT: jo [[LABEL]]
; CHECK-NEXT: BB#{{[0-9]+}} ; CHECK-NEXT: BB#{{[0-9]+}}
; CHECK-NEXT: sgr %r2, %r3 ; CHECK-NEXT: sgr %r2, %r3
; CHECK: br %r14 ; CHECK: br %r14
%res = call i32 @strnlen(i8 *%src, i32 %len) %res = call i32 @strnlen(i8 *%src, i32 %len)
ret i32 %res ret i32 %res
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/avx512-arith.ll

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; SKX: ## BB#0: ; SKX: ## BB#0:
; SKX-NEXT: vandps {{.*}}(%rip){1to16}, %zmm0, %zmm0 ; SKX-NEXT: vandps {{.*}}(%rip){1to16}, %zmm0, %zmm0
; SKX-NEXT: retq ; SKX-NEXT: retq
{ {
%t = call <16 x float> @llvm.fabs.v16f32(<16 x float> %p) %t = call <16 x float> @llvm.fabs.v16f32(<16 x float> %p)
ret <16 x float> %t ret <16 x float> %t
} }
declare <16 x float> @llvm.fabs.v16f32(<16 x float> %p) declare <16 x float> @llvm.fabs.v16f32(<16 x float> %p)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fabs.ll

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} }
; CHECK: {{^[ \t]+fabs$}} ; CHECK: {{^[ \t]+fabs$}}
; UNSAFE: {{^[ \t]+fabs$}} ; UNSAFE: {{^[ \t]+fabs$}}
; NOOPT: {{^[ \t]+fabs$}} ; NOOPT: {{^[ \t]+fabs$}}
; CHECK-NOT: fabs ; CHECK-NOT: fabs
; UNSAFE-NOT: fabs ; UNSAFE-NOT: fabs
; NOOPT-NOT: fabs ; NOOPT-NOT: fabs
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fmaxnum.ll

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; AVX-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm1 ; AVX-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm1
; AVX-NEXT: vblendvpd %ymm1, %ymm3, %ymm2, %ymm1 ; AVX-NEXT: vblendvpd %ymm1, %ymm3, %ymm2, %ymm1
; AVX-NEXT: retq ; AVX-NEXT: retq
define <8 x double> @test_intrinsic_fmax_v8f64(<8 x double> %x, <8 x double> %y) { define <8 x double> @test_intrinsic_fmax_v8f64(<8 x double> %x, <8 x double> %y) {
%z = call <8 x double> @llvm.maxnum.v8f64(<8 x double> %x, <8 x double> %y) readnone %z = call <8 x double> @llvm.maxnum.v8f64(<8 x double> %x, <8 x double> %y) readnone
ret <8 x double> %z ret <8 x double> %z
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fminnum.ll

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; AVX-NEXT: vminpd %ymm1, %ymm3, %ymm2 ; AVX-NEXT: vminpd %ymm1, %ymm3, %ymm2
; AVX-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm1 ; AVX-NEXT: vcmpunordpd %ymm1, %ymm1, %ymm1
; AVX-NEXT: vblendvpd %ymm1, %ymm3, %ymm2, %ymm1 ; AVX-NEXT: vblendvpd %ymm1, %ymm3, %ymm2, %ymm1
; AVX-NEXT: retq ; AVX-NEXT: retq
define <8 x double> @test_intrinsic_fmin_v8f64(<8 x double> %x, <8 x double> %y) { define <8 x double> @test_intrinsic_fmin_v8f64(<8 x double> %x, <8 x double> %y) {
%z = call <8 x double> @llvm.minnum.v8f64(<8 x double> %x, <8 x double> %y) readnone %z = call <8 x double> @llvm.minnum.v8f64(<8 x double> %x, <8 x double> %y) readnone
ret <8 x double> %z ret <8 x double> %z
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fnabs.ll

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declare <4 x float> @llvm.fabs.v4f32(<4 x float> %p) declare <4 x float> @llvm.fabs.v4f32(<4 x float> %p)
declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p) declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
declare float @fabsf(float) declare float @fabsf(float)
attributes #1 = { readnone } attributes #1 = { readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fp-in-intregs.ll

Show All 14 Lines
entry: entry:
%tmp2 = tail call float @copysignf( float 1.000000e+00, float %x ) nounwind readnone ; <float> [#uses=1] %tmp2 = tail call float @copysignf( float 1.000000e+00, float %x ) nounwind readnone ; <float> [#uses=1]
%tmp210 = bitcast float %tmp2 to i32 ; <i32> [#uses=1] %tmp210 = bitcast float %tmp2 to i32 ; <i32> [#uses=1]
ret i32 %tmp210 ret i32 %tmp210
} }
declare float @copysignf(float, float) nounwind readnone declare float @copysignf(float, float) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fp128-cast.ll

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; X64-NEXT: orps %xmm1, %xmm0 ; X64-NEXT: orps %xmm1, %xmm0
; X64-NEXT: callq __extenddftf2 ; X64-NEXT: callq __extenddftf2
; X64: retq ; X64: retq
} }
declare double @copysign(double, double) #1 declare double @copysign(double, double) #1
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/fp128-i128.ll

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; CHECK: andps {{.*}}, %xmm0 ; CHECK: andps {{.*}}, %xmm0
; CHECK: retq ; CHECK: retq
} }
attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/memcmp.ll

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return: ; preds = %entry return: ; preds = %entry
ret void ret void
; CHECK-LABEL: memcmp8a: ; CHECK-LABEL: memcmp8a:
; CHECK: movabsq $8029759185026510694, ; CHECK: movabsq $8029759185026510694,
; CHECK: cmpq ; CHECK: cmpq
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/mempcpy.ll

Show All 20 Lines
define i8* @RET_MEMPCPY(i8* %DST, i8* %SRC, i64 %N) { define i8* @RET_MEMPCPY(i8* %DST, i8* %SRC, i64 %N) {
%add.ptr = getelementptr inbounds i8, i8* %DST, i64 %N %add.ptr = getelementptr inbounds i8, i8* %DST, i64 %N
store i8* %add.ptr, i8** @G, align 8 store i8* %add.ptr, i8** @G, align 8
%call = tail call i8* @mempcpy(i8* %DST, i8* %SRC, i64 %N) %call = tail call i8* @mempcpy(i8* %DST, i8* %SRC, i64 %N)
ret i8* %call ret i8* %call
} }
declare i8* @mempcpy(i8*, i8*, i64) declare i8* @mempcpy(i8*, i8*, i64)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/pr13577.ll

Show All 35 Lines
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
%c = call float @copysignf(float 1.0, float undef) readnone %c = call float @copysignf(float 1.0, float undef) readnone
ret float %c ret float %c
} }
declare float @copysignf(float, float) declare float @copysignf(float, float)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/pr2656.ll

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; CHECK-NEXT: movlps %xmm0, (%esp) ; CHECK-NEXT: movlps %xmm0, (%esp)
%call = tail call double @fabs(double %x) #0 %call = tail call double @fabs(double %x) #0
ret double %call ret double %call
} }
declare double @fabs(double) #0 declare double @fabs(double) #0
attributes #0 = { readnone } attributes #0 = { readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/pr26625.ll

Show All 12 Lines
; CHECK-NEXT: fsqrt ; CHECK-NEXT: fsqrt
; CHECK-NOT: vsqrtss ; CHECK-NOT: vsqrtss
} }
declare float @sqrtf(float) #0 declare float @sqrtf(float) #0
attributes #0 = { nounwind optsize readnone } attributes #0 = { nounwind optsize readnone }
attributes #1 = { nounwind optsize readnone } attributes #1 = { nounwind optsize readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/rounding-ops.ll

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; CHECK-SSE-LABEL: test10: ; CHECK-SSE-LABEL: test10:
; CHECK-SSE: roundsd $11 ; CHECK-SSE: roundsd $11
; CHECK-AVX-LABEL: test10: ; CHECK-AVX-LABEL: test10:
; CHECK-AVX: vroundsd $11 ; CHECK-AVX: vroundsd $11
} }
declare double @trunc(double) nounwind readnone declare double @trunc(double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/sincos-opt.ll

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declare float @sinf(float) readonly declare float @sinf(float) readonly
declare double @sin(double) readonly declare double @sin(double) readonly
declare float @cosf(float) readonly declare float @cosf(float) readonly
declare double @cos(double) readonly declare double @cos(double) readonly
declare x86_fp80 @sinl(x86_fp80) declare x86_fp80 @sinl(x86_fp80)
declare x86_fp80 @cosl(x86_fp80) declare x86_fp80 @cosl(x86_fp80)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/sincos.ll

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define x86_fp80 @test6(x86_fp80 %X) { define x86_fp80 @test6(x86_fp80 %X) {
%Y = call x86_fp80 @cosl(x86_fp80 %X) readonly %Y = call x86_fp80 @cosl(x86_fp80 %X) readonly
ret x86_fp80 %Y ret x86_fp80 %Y
} }
; COS: {{^[ \t]*fcos}} ; COS: {{^[ \t]*fcos}}
; SIN-NOT: fsin ; SIN-NOT: fsin
; COS-NOT: fcos ; COS-NOT: fcos
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/CodeGen/X86/stack-align.ll

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declare void @llvm.lifetime.start(i64, i8* nocapture) argmemonly nounwind declare void @llvm.lifetime.start(i64, i8* nocapture) argmemonly nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) argmemonly nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) argmemonly nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) argmemonly nounwind declare void @llvm.lifetime.end(i64, i8* nocapture) argmemonly nounwind
attributes #0 = { nounwind alignstack=16 "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } attributes #0 = { nounwind alignstack=16 "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Instrumentation/AddressSanitizer/str-nobuiltin.ll

Show All 25 Linesdefine void @f1(i8* %a, i8* %b) nounwind uwtable sanitize_address {
tail call i32 @memcmp(i8* %a, i8* %b, i64 12) tail call i32 @memcmp(i8* %a, i8* %b, i64 12)
tail call i32 @strcmp(i8* %a, i8* %b) tail call i32 @strcmp(i8* %a, i8* %b)
tail call i8* @strcpy(i8* %a, i8* %b) tail call i8* @strcpy(i8* %a, i8* %b)
tail call i8* @stpcpy(i8* %a, i8* %b) tail call i8* @stpcpy(i8* %a, i8* %b)
tail call i64 @strlen(i8* %a) tail call i64 @strlen(i8* %a)
tail call i64 @strnlen(i8* %a, i64 12) tail call i64 @strnlen(i8* %a, i64 12)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Instrumentation/BoundsChecking/simple.ll

Show First 20 Lines • Show All 159 Lines • ▼ Show 20 Linesdead:
%incdec.ptr = getelementptr inbounds i32, i32* %incdec.ptr, i64 1 %incdec.ptr = getelementptr inbounds i32, i32* %incdec.ptr, i64 1
; CHECK: %incdec.ptr = getelementptr inbounds i32, i32* %incdec.ptr ; CHECK: %incdec.ptr = getelementptr inbounds i32, i32* %incdec.ptr
%l = load i32, i32* %incdec.ptr %l = load i32, i32* %incdec.ptr
br label %alive br label %alive
alive: alive:
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Instrumentation/EfficiencySanitizer/str-nobuiltin.ll

Show All 25 Linesdefine void @f1(i8* %a, i8* %b) nounwind uwtable {
tail call i32 @memcmp(i8* %a, i8* %b, i64 12) tail call i32 @memcmp(i8* %a, i8* %b, i64 12)
tail call i32 @strcmp(i8* %a, i8* %b) tail call i32 @strcmp(i8* %a, i8* %b)
tail call i8* @strcpy(i8* %a, i8* %b) tail call i8* @strcpy(i8* %a, i8* %b)
tail call i8* @stpcpy(i8* %a, i8* %b) tail call i8* @stpcpy(i8* %a, i8* %b)
tail call i64 @strlen(i8* %a) tail call i64 @strlen(i8* %a)
tail call i64 @strnlen(i8* %a, i64 12) tail call i64 @strnlen(i8* %a, i64 12)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Instrumentation/MemorySanitizer/str-nobuiltin.ll

Show All 25 Linesdefine void @f1(i8* %a, i8* %b) nounwind uwtable sanitize_memory {
tail call i32 @memcmp(i8* %a, i8* %b, i64 12) tail call i32 @memcmp(i8* %a, i8* %b, i64 12)
tail call i32 @strcmp(i8* %a, i8* %b) tail call i32 @strcmp(i8* %a, i8* %b)
tail call i8* @strcpy(i8* %a, i8* %b) tail call i8* @strcpy(i8* %a, i8* %b)
tail call i8* @stpcpy(i8* %a, i8* %b) tail call i8* @stpcpy(i8* %a, i8* %b)
tail call i64 @strlen(i8* %a) tail call i64 @strlen(i8* %a)
tail call i64 @strnlen(i8* %a, i64 12) tail call i64 @strnlen(i8* %a, i64 12)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Instrumentation/ThreadSanitizer/str-nobuiltin.ll

Show All 25 Linesdefine void @f1(i8* %a, i8* %b) nounwind uwtable sanitize_thread {
tail call i32 @memcmp(i8* %a, i8* %b, i64 12) tail call i32 @memcmp(i8* %a, i8* %b, i64 12)
tail call i32 @strcmp(i8* %a, i8* %b) tail call i32 @strcmp(i8* %a, i8* %b)
tail call i8* @strcpy(i8* %a, i8* %b) tail call i8* @strcpy(i8* %a, i8* %b)
tail call i8* @stpcpy(i8* %a, i8* %b) tail call i8* @stpcpy(i8* %a, i8* %b)
tail call i64 @strlen(i8* %a) tail call i64 @strlen(i8* %a)
tail call i64 @strnlen(i8* %a, i64 12) tail call i64 @strnlen(i8* %a, i64 12)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/LTO/X86/runtime-library.ll

Show All 19 Linesdefine void @memset() {
ret void ret void
} }
; LOSE-NOT: _myprintf ; LOSE-NOT: _myprintf
define void @myprintf() { define void @myprintf() {
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/LTO/X86/triple-init.ll

; RUN: llvm-as < %s >%t1 ; RUN: llvm-as < %s >%t1
; RUN: llvm-lto -exported-symbol=_main -o %t2 %t1 ; RUN: llvm-lto -exported-symbol=_main -o %t2 %t1
; RUN: llvm-nm %t2 | FileCheck %s ; RUN: llvm-nm %t2 | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9" target triple = "x86_64-apple-macosx10.9"
declare double @pow(double, double) declare double @pow(double, double)
define double @main(double %x) { define double @main(double %x) {
; We check that LTO will be aware of target triple and apply pow to __exp10 transformation. ; We check that LTO will be aware of target triple and apply pow to __exp10 transformation.
; CHECK: U ___exp10 ; CHECK: U ___exp10
%retval = call double @pow(double 10.0, double %x) %retval = call double @pow(double 10.0, double %x)
ret double %retval ret double %retval
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/ConstProp/calls.ll

Show First 20 Lines • Show All 394 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test_intrinsic_pow( ; CHECK-LABEL: @test_intrinsic_pow(
; CHECK-NOT: call ; CHECK-NOT: call
; CHECK: ret ; CHECK: ret
%0 = call double @llvm.pow.f64(double 1.500000e+00, double 3.000000e+00) %0 = call double @llvm.pow.f64(double 1.500000e+00, double 3.000000e+00)
ret double %0 ret double %0
} }
declare double @llvm.pow.f64(double, double) nounwind readonly declare double @llvm.pow.f64(double, double) nounwind readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/Coroutines/ArgAddr.ll

Show First 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
declare i32 @llvm.coro.size.i32() declare i32 @llvm.coro.size.i32()
declare i8* @llvm.coro.begin(token, i8*) declare i8* @llvm.coro.begin(token, i8*)
declare i8 @llvm.coro.suspend(token, i1) declare i8 @llvm.coro.suspend(token, i1)
declare i8* @llvm.coro.free(token, i8*) declare i8* @llvm.coro.free(token, i8*)
declare void @llvm.coro.end(i8*, i1) declare void @llvm.coro.end(i8*, i1)
declare void @llvm.coro.resume(i8*) declare void @llvm.coro.resume(i8*)
declare void @llvm.coro.destroy(i8*) declare void @llvm.coro.destroy(i8*)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/Coroutines/ex3.ll

Show First 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
declare i32 @llvm.coro.size.i32() declare i32 @llvm.coro.size.i32()
declare i8* @llvm.coro.begin(token, i8*) declare i8* @llvm.coro.begin(token, i8*)
declare i8 @llvm.coro.suspend(token, i1) declare i8 @llvm.coro.suspend(token, i1)
declare i8* @llvm.coro.free(token, i8*) declare i8* @llvm.coro.free(token, i8*)
declare void @llvm.coro.end(i8*, i1) declare void @llvm.coro.end(i8*, i1)
declare void @llvm.coro.resume(i8*) declare void @llvm.coro.resume(i8*)
declare void @llvm.coro.destroy(i8*) declare void @llvm.coro.destroy(i8*)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/2016-07-17-UseAfterFree.ll

Show All 24 Lines
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @free(i8* nocapture) local_unnamed_addr #0 declare void @free(i8* nocapture) local_unnamed_addr #0
; Function Attrs: argmemonly nounwind ; Function Attrs: argmemonly nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1) #1 declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1) #1
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/calloc-store.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
define i8* @test7(i8 %arg) { define i8* @test7(i8 %arg) {
; CHECK-LABEL: test7 ; CHECK-LABEL: test7
%1 = tail call noalias i8* @calloc(i64 1, i64 4) %1 = tail call noalias i8* @calloc(i64 1, i64 4)
store i8 %arg, i8* %1, align 4 store i8 %arg, i8* %1, align 4
; CHECK: store i8 %arg, i8* %1, align 4 ; CHECK: store i8 %arg, i8* %1, align 4
ret i8* %1 ret i8* %1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/fence.ll

Show First 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
%P1 = alloca i32 %P1 = alloca i32
store i32 0, i32* %P1, align 4 store i32 0, i32* %P1, align 4
fence seq_cst fence seq_cst
store i32 4, i32* %P1, align 4 store i32 4, i32* %P1, align 4
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/free.ll

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
define void @test5() { define void @test5() {
br label %bb br label %bb
bb: bb:
tail call void @free(i8* undef) nounwind tail call void @free(i8* undef) nounwind
br label %bb br label %bb
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/libcalls.ll

Show First 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
; CHECK: @strcpy ; CHECK: @strcpy
%call = call i8* @strcpy(i8* %dest, i8* %src) %call = call i8* @strcpy(i8* %dest, i8* %src)
; CHECK: @user ; CHECK: @user
call void @user(i8* %dest) call void @user(i8* %dest)
; CHECK: ret void ; CHECK: ret void
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/operand-bundles.ll

Show All 35 Linesdefine void @test3() {
; Verify that this first store is not considered killed by the second one ; Verify that this first store is not considered killed by the second one
; since it could be observed from the deopt continuation. ; since it could be observed from the deopt continuation.
; CHECK: store i64 1, i64* %s ; CHECK: store i64 1, i64* %s
store i64 1, i64* %s store i64 1, i64* %s
call void @foo() [ "deopt"(i64* %s) ] call void @foo() [ "deopt"(i64* %s) ]
store i64 0, i64* %s store i64 0, i64* %s
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/DeadStoreElimination/simple.ll

Show First 20 Lines • Show All 515 Lines • ▼ Show 20 Lines
; CHECK-NEXT: store i32 0 ; CHECK-NEXT: store i32 0
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
define void @test35(i32* noalias %p) { define void @test35(i32* noalias %p) {
call void @unknown_func() call void @unknown_func()
store i32 1, i32* %p store i32 1, i32* %p
store i32 0, i32* %p store i32 0, i32* %p
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GVN/calloc-load-removal.ll

Show All 17 Lines
; CHECK_NO_LIBCALLS-LABEL: @test1( ; CHECK_NO_LIBCALLS-LABEL: @test1(
; CHECK_NO_LIBCALLS: load ; CHECK_NO_LIBCALLS: load
; CHECK_NO_LIBCALLS: ret i32 % ; CHECK_NO_LIBCALLS: ret i32 %
} }
declare noalias i8* @calloc(i64, i64) declare noalias i8* @calloc(i64, i64)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GVN/malloc-load-removal.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test2( ; CHECK-LABEL: @test2(
; CHECK-NOT: load ; CHECK-NOT: load
; CHECK-NOT: icmp ; CHECK-NOT: icmp
; CHECK_NO_LIBCALLS-LABEL: @test2( ; CHECK_NO_LIBCALLS-LABEL: @test2(
; CHECK_NO_LIBCALLS: load ; CHECK_NO_LIBCALLS: load
; CHECK_NO_LIBCALLS: icmp ; CHECK_NO_LIBCALLS: icmp
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GVN/no_speculative_loads_with_asan.ll

Show First 20 Lines • Show All 47 Lines • ▼ Show 20 Lines; <label>:11 ; preds = %0, %6
%12 = phi i32 [ %10, %6 ], [ 0, %0 ] %12 = phi i32 [ %10, %6 ], [ 0, %0 ]
ret i32 %12 ret i32 %12
} }
; CHECK-LABEL: @TestAsan ; CHECK-LABEL: @TestAsan
; CHECK-NOT: %[[LOAD:[^ ]+]] = load i32 ; CHECK-NOT: %[[LOAD:[^ ]+]] = load i32
; CHECK: {{.*}} = phi ; CHECK: {{.*}} = phi
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GVN/nonescaping-malloc.ll

Show First 20 Lines • Show All 103 Lines • ▼ Show 20 Linesbb9.i: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
store i32 %tmp27.i, i32* %tmp25.i, align 8 store i32 %tmp27.i, i32* %tmp25.i, align 8
ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
_ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i _ZN4llvm9StringMapIPvNS_15MallocAllocatorEE16GetOrCreateValueIS1_EERNS_14StringMapEntryIS1_EENS_9StringRefET_.exit: ; preds = %_ZN4llvm14StringMapEntryIPvE6CreateINS_15MallocAllocatorES1_EEPS2_PKcS7_RT_T0_.exit.i
ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i ret %"struct.llvm::StringMapEntry<void*>"* %tmp10.i.i
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/2009-11-16-BrokenPerformHeapAllocSRoA.ll

Show All 18 Linesdefine void @test() nounwind ssp {
%4 = tail call i8* @malloc(i64 %3) ; <i8*> [#uses=1] %4 = tail call i8* @malloc(i64 %3) ; <i8*> [#uses=1]
; CHECK-NOT: call i8* @malloc(i64 ; CHECK-NOT: call i8* @malloc(i64
%5 = bitcast i8* %4 to %struct.strchartype* ; <%struct.strchartype*> [#uses=1] %5 = bitcast i8* %4 to %struct.strchartype* ; <%struct.strchartype*> [#uses=1]
store %struct.strchartype* %5, %struct.strchartype** @chartypes, align 8 store %struct.strchartype* %5, %struct.strchartype** @chartypes, align 8
ret void ret void
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/MallocSROA-section.ll

Show All 20 Lines
define void @load_train() { define void @load_train() {
entry: entry:
%0 = load %struct.xyz*, %struct.xyz** @Y, align 8 ; <%struct.xyz*> [#uses=0] %0 = load %struct.xyz*, %struct.xyz** @Y, align 8 ; <%struct.xyz*> [#uses=0]
ret void ret void
} }
declare noalias i8* @malloc(i32) declare noalias i8* @malloc(i32)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/ctor-list-opt.ll

Show First 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
entry: entry:
%0 = bitcast %struct.B* @GV1 to i8* %0 = bitcast %struct.B* @GV1 to i8*
%1 = getelementptr inbounds i8, i8* %0, i64 16 %1 = getelementptr inbounds i8, i8* %0, i64 16
%2 = bitcast i8* %1 to %struct.A* %2 = bitcast i8* %1 to %struct.A*
%3 = bitcast %struct.B* @GV1 to i8*** %3 = bitcast %struct.B* @GV1 to i8***
store i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @GV2, i64 1, i64 0), i8*** %3 store i8** getelementptr inbounds ([3 x i8*], [3 x i8*]* @GV2, i64 1, i64 0), i8*** %3
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/cxx-dtor.ll

Show All 25 Lines
define linkonce_odr void @_ZN1BD1Ev(%struct.B* %this) nounwind align 2 { define linkonce_odr void @_ZN1BD1Ev(%struct.B* %this) nounwind align 2 {
ret void ret void
} }
define internal void @_GLOBAL__I_a() nounwind section "__TEXT,__StaticInit,regular,pure_instructions" { define internal void @_GLOBAL__I_a() nounwind section "__TEXT,__StaticInit,regular,pure_instructions" {
call void @__cxx_global_var_init() call void @__cxx_global_var_init()
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/heap-sra-1.ll

Show All 30 Linesbb1: ; preds = %bb1, %bb1.thread
%indvar.next = add i32 %i.0.reg2mem.0, 1 %indvar.next = add i32 %i.0.reg2mem.0, 1
%exitcond = icmp eq i32 %indvar.next, 1200 %exitcond = icmp eq i32 %indvar.next, 1200
br i1 %exitcond, label %bb2, label %bb1 br i1 %exitcond, label %bb2, label %bb1
bb2: ; preds = %bb1 bb2: ; preds = %bb1
ret i32 %3 ret i32 %3
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/heap-sra-2.ll

Show All 30 Linesbb1: ; preds = %bb1, %bb1.thread
%indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2] %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
%exitcond = icmp eq i32 %indvar.next, 1200 ; <i1> [#uses=1] %exitcond = icmp eq i32 %indvar.next, 1200 ; <i1> [#uses=1]
br i1 %exitcond, label %bb2, label %bb1 br i1 %exitcond, label %bb2, label %bb1
bb2: ; preds = %bb1 bb2: ; preds = %bb1
ret i32 %3 ret i32 %3
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/heap-sra-3.ll

Show All 31 Linesbb1: ; preds = %bb1, %bb1.thread
%indvar.next = add i32 %i.0.reg2mem.0, 1 %indvar.next = add i32 %i.0.reg2mem.0, 1
%exitcond = icmp eq i32 %indvar.next, 1200 %exitcond = icmp eq i32 %indvar.next, 1200
br i1 %exitcond, label %bb2, label %bb1 br i1 %exitcond, label %bb2, label %bb1
bb2: ; preds = %bb1 bb2: ; preds = %bb1
ret i32 %3 ret i32 %3
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/heap-sra-4.ll

Show All 31 Linesbb1: ; preds = %bb1, %bb1.thread
%indvar.next = add i32 %i.0.reg2mem.0, 1 %indvar.next = add i32 %i.0.reg2mem.0, 1
%exitcond = icmp eq i32 %indvar.next, 1200 %exitcond = icmp eq i32 %indvar.next, 1200
br i1 %exitcond, label %bb2, label %bb1 br i1 %exitcond, label %bb2, label %bb1
bb2: ; preds = %bb1 bb2: ; preds = %bb1
ret i32 %3 ret i32 %3
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/heap-sra-phi.ll

Show All 36 Lines %indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
%tmpLD2 = load %struct.foo*, %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=1] %tmpLD2 = load %struct.foo*, %struct.foo** @X, align 4 ; <%struct.foo*> [#uses=1]
%exitcond = icmp eq i32 %indvar.next, 1200 ; <i1> [#uses=1] %exitcond = icmp eq i32 %indvar.next, 1200 ; <i1> [#uses=1]
br i1 %exitcond, label %bb2, label %bb1 br i1 %exitcond, label %bb2, label %bb1
bb2: ; preds = %bb1 bb2: ; preds = %bb1
ret i32 %tmp3 ret i32 %tmp3
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/malloc-promote-1.ll

Show All 16 Lines
define i32 @get() { define i32 @get() {
%GV = load i32*, i32** @G ; <i32*> [#uses=1] %GV = load i32*, i32** @G ; <i32*> [#uses=1]
%V = load i32, i32* %GV ; <i32> [#uses=1] %V = load i32, i32* %GV ; <i32> [#uses=1]
ret i32 %V ret i32 %V
; CHECK: ret i32 0 ; CHECK: ret i32 0
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/GlobalOpt/malloc-promote-2.ll

Show All 11 Lines; CHECK-NEXT: ret void
store i32* %P, i32** @G store i32* %P, i32** @G
%GV = load i32*, i32** @G %GV = load i32*, i32** @G
%GVe = getelementptr i32, i32* %GV, i32 40 %GVe = getelementptr i32, i32* %GV, i32 40
store i32 20, i32* %GVe store i32 20, i32* %GVe
ret void ret void
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InferFunctionAttrs/annotate.ll

Show First 20 Lines • Show All 871 Lines • ▼ Show 20 Lines
; memset_pattern16 isn't available everywhere. ; memset_pattern16 isn't available everywhere.
; CHECK-DARWIN: declare void @memset_pattern16(i8* nocapture, i8* nocapture readonly, i64) [[G2:#[0-9]+]] ; CHECK-DARWIN: declare void @memset_pattern16(i8* nocapture, i8* nocapture readonly, i64) [[G2:#[0-9]+]]
declare void @memset_pattern16(i8*, i8*, i64) declare void @memset_pattern16(i8*, i8*, i64)
; CHECK: attributes [[G0]] = { nounwind } ; CHECK: attributes [[G0]] = { nounwind }
; CHECK: attributes [[G1]] = { nounwind readonly } ; CHECK: attributes [[G1]] = { nounwind readonly }
; CHECK-DARWIN: attributes [[G2]] = { argmemonly } ; CHECK-DARWIN: attributes [[G2]] = { argmemonly }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/2010-05-30-memcpy-Struct.ll

Show All 12 Linesentry:
%call = call i32 (i8*, i8*, ...) @sprintf(i8* undef, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), %union.anon* %ev) nounwind %call = call i32 (i8*, i8*, ...) @sprintf(i8* undef, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), %union.anon* %ev) nounwind
; CHECK: bitcast %union.anon* %ev to i8* ; CHECK: bitcast %union.anon* %ev to i8*
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
ret void ret void
} }
declare i32 @sprintf(i8*, i8*, ...) declare i32 @sprintf(i8*, i8*, ...)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/ARM/strcmp.ll

Show First 20 Lines • Show All 145 Lines • ▼ Show 20 Lines
; strcmp(x,x) -> 0 ; strcmp(x,x) -> 0
define arm_aapcs_vfpcc i32 @test6_vfp(i8* %str) { define arm_aapcs_vfpcc i32 @test6_vfp(i8* %str) {
; CHECK-LABEL: @test6_vfp( ; CHECK-LABEL: @test6_vfp(
; CHECK: ret i32 0 ; CHECK: ret i32 0
%temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str, i8* %str) %temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str, i8* %str)
ret i32 %temp1 ret i32 %temp1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/ARM/strcpy.ll

Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines; CHECK-LABEL: @test_no_simplify1_vfp(
%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0 %dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
%src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0 %src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0
%ret = call arm_aapcs_vfpcc i8* @strcpy(i8* %dst, i8* %src) %ret = call arm_aapcs_vfpcc i8* @strcpy(i8* %dst, i8* %src)
; CHECK: call arm_aapcs_vfpcc i8* @strcpy ; CHECK: call arm_aapcs_vfpcc i8* @strcpy
ret i8* %ret ret i8* %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/abs-1.ll

Show All 33 Lines
; CHECK-LABEL: @test_simplify3( ; CHECK-LABEL: @test_simplify3(
%ret = call i64 @llabs(i64 %x) %ret = call i64 @llabs(i64 %x)
; CHECK-NEXT: [[ISPOS:%[a-z0-9]+]] = icmp sgt i64 %x, -1 ; CHECK-NEXT: [[ISPOS:%[a-z0-9]+]] = icmp sgt i64 %x, -1
; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub i64 0, %x ; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub i64 0, %x
; CHECK-NEXT: [[RET:%[a-z0-9]+]] = select i1 [[ISPOS]], i64 %x, i64 [[NEG]] ; CHECK-NEXT: [[RET:%[a-z0-9]+]] = select i1 [[ISPOS]], i64 %x, i64 [[NEG]]
ret i64 %ret ret i64 %ret
; CHECK-NEXT: ret i64 [[RET]] ; CHECK-NEXT: ret i64 [[RET]]
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/badmalloc.ll

Show All 33 Lines; CHECK: store
store i8 7, i8* %A store i8 7, i8* %A
br label %return br label %return
return: return:
; CHECK: phi ; CHECK: phi
%retval.0 = phi i8* [ %A, %if.end ], [ null, %entry ] %retval.0 = phi i8* [ %A, %if.end ], [ null, %entry ]
ret i8* %retval.0 ret i8* %retval.0
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/compare-unescaped.ll

Show First 20 Lines • Show All 156 Lines • ▼ Show 20 Linesdefine i1 @compare_distinct_pointer_escape() {
ret i1 %cmp ret i1 %cmp
; CHECK-LABEL: compare_distinct_pointer_escape ; CHECK-LABEL: compare_distinct_pointer_escape
; CHECK-NEXT: %m = call i8* @malloc(i64 4) ; CHECK-NEXT: %m = call i8* @malloc(i64 4)
; CHECK-NEXT: tail call void @f() [ "deopt"(i8* %m) ] ; CHECK-NEXT: tail call void @f() [ "deopt"(i8* %m) ]
; CHECK-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
} }
!0 = !{} !0 = !{}
!llvm.module.flags = !{!1}
!1 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/cos-1.ll

Show All 30 Lines
; NO-FLOAT-SHRINK-LABEL: @test_simplify3( ; NO-FLOAT-SHRINK-LABEL: @test_simplify3(
%conv1 = fpext float %f to double %conv1 = fpext float %f to double
%neg = fsub double -0.000000e+00, %conv1 %neg = fsub double -0.000000e+00, %conv1
%cos = call double @cos(double %neg) %cos = call double @cos(double %neg)
; NO-FLOAT-SHRINK: call double @cos(double %conv1) ; NO-FLOAT-SHRINK: call double @cos(double %conv1)
%conv2 = fptrunc double %cos to float %conv2 = fptrunc double %cos to float
ret float %conv2 ret float %conv2
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/debug-line.ll

; RUN: opt -instcombine -S < %s | FileCheck %s ; RUN: opt -instcombine -S < %s | FileCheck %s
@.str = private constant [3 x i8] c"%c\00" @.str = private constant [3 x i8] c"%c\00"
define void @foo() nounwind ssp !dbg !0 { define void @foo() nounwind ssp !dbg !0 {
;CHECK: call i32 @putchar{{.+}} !dbg ;CHECK: call i32 @putchar{{.+}} !dbg
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i32 0, i32 0), i32 97), !dbg !5 %1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i32 0, i32 0), i32 97), !dbg !5
ret void, !dbg !7 ret void, !dbg !7
} }
declare i32 @printf(i8*, ...) declare i32 @printf(i8*, ...)
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!10} !llvm.module.flags = !{!10, !11}
!0 = distinct !DISubprogram(name: "foo", line: 4, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: false, unit: !2, file: !8, scope: !1, type: !3) !0 = distinct !DISubprogram(name: "foo", line: 4, isLocal: false, isDefinition: true, virtualIndex: 6, isOptimized: false, unit: !2, file: !8, scope: !1, type: !3)
!1 = !DIFile(filename: "m.c", directory: "/private/tmp") !1 = !DIFile(filename: "m.c", directory: "/private/tmp")
!2 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang", isOptimized: true, emissionKind: FullDebug, file: !8, enums: !{}, retainedTypes: !{}) !2 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang", isOptimized: true, emissionKind: FullDebug, file: !8, enums: !{}, retainedTypes: !{})
!3 = !DISubroutineType(types: !4) !3 = !DISubroutineType(types: !4)
!4 = !{null} !4 = !{null}
!5 = !DILocation(line: 5, column: 2, scope: !6) !5 = !DILocation(line: 5, column: 2, scope: !6)
!6 = distinct !DILexicalBlock(line: 4, column: 12, file: !8, scope: !0) !6 = distinct !DILexicalBlock(line: 4, column: 12, file: !8, scope: !0)
!7 = !DILocation(line: 6, column: 1, scope: !6) !7 = !DILocation(line: 6, column: 1, scope: !6)
!8 = !DIFile(filename: "m.c", directory: "/private/tmp") !8 = !DIFile(filename: "m.c", directory: "/private/tmp")
!10 = !{i32 1, !"Debug Info Version", i32 3} !10 = !{i32 1, !"Debug Info Version", i32 3}
!11 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/double-float-shrink-1.ll

Show First 20 Lines • Show All 405 Lines • ▼ Show 20 Lines
declare double @cbrt(double) declare double @cbrt(double)
declare double @atanh(double) declare double @atanh(double)
declare double @atan(double) declare double @atan(double)
declare double @acos(double) declare double @acos(double)
declare double @acosh(double) declare double @acosh(double)
declare double @asin(double) declare double @asin(double)
declare double @asinh(double) declare double @asinh(double)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/double-float-shrink-2.ll

Show First 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
define float @test_fabs(float %C) { define float @test_fabs(float %C) {
%D = fpext float %C to double %D = fpext float %C to double
; --> fabsf ; --> fabsf
%E = call double @fabs(double %D) %E = call double @fabs(double %D)
%F = fptrunc double %E to float %F = fptrunc double %E to float
ret float %F ret float %F
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/err-rep-cold.ll

Show First 20 Lines • Show All 69 Lines • ▼ Show 20 Lines
} }
attributes #0 = { nounwind uwtable } attributes #0 = { nounwind uwtable }
attributes #1 = { nounwind } attributes #1 = { nounwind }
; CHECK: attributes #[[AT1]] = { cold nounwind } ; CHECK: attributes #[[AT1]] = { cold nounwind }
; CHECK: attributes #[[AT2]] = { cold } ; CHECK: attributes #[[AT2]] = { cold }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/exp2-1.ll

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
define float @test_simplify10(i8 zeroext %x) { define float @test_simplify10(i8 zeroext %x) {
; INTRINSIC-LABEL: @test_simplify10( ; INTRINSIC-LABEL: @test_simplify10(
%conv = uitofp i8 %x to float %conv = uitofp i8 %x to float
%ret = call float @llvm.exp2.f32(float %conv) %ret = call float @llvm.exp2.f32(float %conv)
; LDEXPF: call float @ldexpf ; LDEXPF: call float @ldexpf
; NOLDEXPF-NOT: call float @ldexpf ; NOLDEXPF-NOT: call float @ldexpf
ret float %ret ret float %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/fast-math.ll

Show First 20 Lines • Show All 825 Lines • ▼ Show 20 Linesdefine fp128 @min4(fp128 %a, fp128 %b) {
%c = call fast fp128 @fminl(fp128 %a, fp128 %b) %c = call fast fp128 @fminl(fp128 %a, fp128 %b)
ret fp128 %c ret fp128 %c
; CHECK-LABEL: min4( ; CHECK-LABEL: min4(
; CHECK-NEXT: fcmp fast olt fp128 %a, %b ; CHECK-NEXT: fcmp fast olt fp128 %a, %b
; CHECK-NEXT: select {{.*}} fp128 %a, fp128 %b ; CHECK-NEXT: select {{.*}} fp128 %a, fp128 %b
; CHECK-NEXT: ret ; CHECK-NEXT: ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/ffs-1.ll

Show First 20 Lines • Show All 129 Lines • ▼ Show 20 Lines
; CHECK-FFS-NEXT: [[CTTZ:%[a-z0-9]+]] = call i64 @llvm.cttz.i64(i64 %x, i1 true) ; CHECK-FFS-NEXT: [[CTTZ:%[a-z0-9]+]] = call i64 @llvm.cttz.i64(i64 %x, i1 true)
; CHECK-FFS-NEXT: [[INC:%[a-z0-9]+]] = add nuw nsw i64 [[CTTZ]], 1 ; CHECK-FFS-NEXT: [[INC:%[a-z0-9]+]] = add nuw nsw i64 [[CTTZ]], 1
; CHECK-FFS-NEXT: [[TRUNC:%[a-z0-9]+]] = trunc i64 [[INC]] to i32 ; CHECK-FFS-NEXT: [[TRUNC:%[a-z0-9]+]] = trunc i64 [[INC]] to i32
; CHECK-FFS-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i64 %x, 0 ; CHECK-FFS-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i64 %x, 0
; CHECK-FFS-NEXT: [[RET:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[TRUNC]], i32 0 ; CHECK-FFS-NEXT: [[RET:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[TRUNC]], i32 0
ret i32 %ret ret i32 %ret
; CHECK-FFS-NEXT: ret i32 [[RET]] ; CHECK-FFS-NEXT: ret i32 [[RET]]
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/float-shrink-compare.ll

Show First 20 Lines • Show All 263 Lines • ▼ Show 20 Lines
declare double @copysign(double, double) nounwind readnone declare double @copysign(double, double) nounwind readnone
declare double @floor(double) nounwind readnone declare double @floor(double) nounwind readnone
declare double @nearbyint(double) nounwind readnone declare double @nearbyint(double) nounwind readnone
declare double @rint(double) nounwind readnone declare double @rint(double) nounwind readnone
declare double @round(double) nounwind readnone declare double @round(double) nounwind readnone
declare double @trunc(double) nounwind readnone declare double @trunc(double) nounwind readnone
declare double @fmin(double, double) nounwind readnone declare double @fmin(double, double) nounwind readnone
declare double @fmax(double, double) nounwind readnone declare double @fmax(double, double) nounwind readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/fold-calls.ll

Show All 11 Lines
; CHECK-LABEL: @bar( ; CHECK-LABEL: @bar(
; CHECK: ret double 0.0 ; CHECK: ret double 0.0
define double @bar() { define double @bar() {
%t = call double @sin(double 0.0) %t = call double @sin(double 0.0)
ret double %t ret double %t
} }
declare double @sin(double) declare double @sin(double)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/fprintf-1.ll

Show First 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
define i32 @test_no_simplify3(%FILE* %fp) { define i32 @test_no_simplify3(%FILE* %fp) {
; CHECK-LABEL: @test_no_simplify3( ; CHECK-LABEL: @test_no_simplify3(
%fmt = getelementptr [13 x i8], [13 x i8]* @hello_world, i32 0, i32 0 %fmt = getelementptr [13 x i8], [13 x i8]* @hello_world, i32 0, i32 0
%1 = call i32 (%FILE*, i8*, ...) @fprintf(%FILE* %fp, i8* %fmt) %1 = call i32 (%FILE*, i8*, ...) @fprintf(%FILE* %fp, i8* %fmt)
; CHECK-NEXT: call i32 (%FILE*, i8*, ...) @fprintf(%FILE* %fp, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @hello_world, i32 0, i32 0)) ; CHECK-NEXT: call i32 (%FILE*, i8*, ...) @fprintf(%FILE* %fp, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @hello_world, i32 0, i32 0))
ret i32 %1 ret i32 %1
; CHECK-NEXT: ret i32 %1 ; CHECK-NEXT: ret i32 %1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/fputs-1.ll

Show All 35 Lines
define void @test_simplify3(%FILE* %fp) { define void @test_simplify3(%FILE* %fp) {
; CHECK-LABEL: @test_simplify3( ; CHECK-LABEL: @test_simplify3(
%str = getelementptr [7 x i8], [7 x i8]* @hello, i32 0, i32 0 %str = getelementptr [7 x i8], [7 x i8]* @hello, i32 0, i32 0
call i32 @fputs(i8* %str, %FILE* %fp) call i32 @fputs(i8* %str, %FILE* %fp)
; CHECK-NEXT: call i32 @fwrite(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @hello, i32 0, i32 0), i32 6, i32 1, %FILE* %fp) ; CHECK-NEXT: call i32 @fwrite(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @hello, i32 0, i32 0), i32 6, i32 1, %FILE* %fp)
ret void ret void
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/fwrite-1.ll

Show First 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
define void @test_no_simplify2(%FILE* %fp, i64 %size) { define void @test_no_simplify2(%FILE* %fp, i64 %size) {
; CHECK-LABEL: @test_no_simplify2( ; CHECK-LABEL: @test_no_simplify2(
%str = getelementptr inbounds [1 x i8], [1 x i8]* @str, i64 0, i64 0 %str = getelementptr inbounds [1 x i8], [1 x i8]* @str, i64 0, i64 0
call i64 @fwrite(i8* %str, i64 %size, i64 1, %FILE* %fp) call i64 @fwrite(i8* %str, i64 %size, i64 1, %FILE* %fp)
; CHECK-NEXT: call i64 @fwrite ; CHECK-NEXT: call i64 @fwrite
ret void ret void
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/inline-intrinsic-assert.ll

Show All 20 Lines
define float @sqr(float %f) { define float @sqr(float %f) {
%mul = fmul fast float %f, %f %mul = fmul fast float %f, %f
ret float %mul ret float %mul
} }
declare float @sqrtf(float) declare float @sqrtf(float)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/invoke.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
lpad: lpad:
%1 = landingpad { i8*, i32 } %1 = landingpad { i8*, i32 }
filter [0 x i8*] zeroinitializer filter [0 x i8*] zeroinitializer
%2 = extractvalue { i8*, i32 } %1, 0 %2 = extractvalue { i8*, i32 } %1, 0
tail call void @__cxa_call_unexpected(i8* %2) noreturn nounwind tail call void @__cxa_call_unexpected(i8* %2) noreturn nounwind
unreachable unreachable
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/isascii-1.ll

Show All 24 Lines
define i32 @test_simplify3(i32 %x) { define i32 @test_simplify3(i32 %x) {
; CHECK-LABEL: @test_simplify3( ; CHECK-LABEL: @test_simplify3(
%ret = call i32 @isascii(i32 %x) %ret = call i32 @isascii(i32 %x)
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %x, 128 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %x, 128
; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i1 [[CMP]] to i32 ; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i1 [[CMP]] to i32
ret i32 %ret ret i32 %ret
; CHECK-NEXT: ret i32 [[ZEXT]] ; CHECK-NEXT: ret i32 [[ZEXT]]
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/isdigit-1.ll

Show All 40 Lines; CHECK-LABEL: @test_simplify5(
%ret = call i32 @isdigit(i32 %x) %ret = call i32 @isdigit(i32 %x)
; CHECK-NEXT: [[ADD:%[a-z0-9]+]] = add i32 %x, -48 ; CHECK-NEXT: [[ADD:%[a-z0-9]+]] = add i32 %x, -48
; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 [[ADD]], 10 ; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 [[ADD]], 10
; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i1 [[CMP]] to i32 ; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i1 [[CMP]] to i32
ret i32 %ret ret i32 %ret
; CHECK-NEXT: ret i32 [[ZEXT]] ; CHECK-NEXT: ret i32 [[ZEXT]]
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/log-pow.ll

Show First 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %call3 = call fast double @log(double %call2) ; CHECK-NEXT: %call3 = call fast double @log(double %call2)
; CHECK-NEXT: ret double %call3 ; CHECK-NEXT: ret double %call3
declare double @log(double) #0 declare double @log(double) #0
declare double @exp2(double) declare double @exp2(double)
declare double @llvm.pow.f64(double, double) declare double @llvm.pow.f64(double, double)
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/malloc-free-delete.ll

Show First 20 Lines • Show All 191 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test9( ; CHECK-LABEL: @test9(
define void @test9() { define void @test9() {
; CHECK-NOT: call ; CHECK-NOT: call
%new_long_long = call noalias i8* @"\01??2@YAPEAX_K@Z"(i64 32) builtin %new_long_long = call noalias i8* @"\01??2@YAPEAX_K@Z"(i64 32) builtin
call void @"\01??3@YAXPEAX@Z"(i8* %new_long_long) builtin call void @"\01??3@YAXPEAX@Z"(i8* %new_long_long) builtin
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/memchr.ll

Show First 20 Lines • Show All 184 Lines • ▼ Show 20 Lines
; CHECK-NEXT: [[DST:%.*]] = call i8* @memchr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @negative, i32 0, i32 0), i32 %C, i32 3) ; CHECK-NEXT: [[DST:%.*]] = call i8* @memchr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @negative, i32 0, i32 0), i32 %C, i32 3)
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8* [[DST]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8* [[DST]], null
; CHECK-NEXT: ret i1 [[CMP]] ; CHECK-NEXT: ret i1 [[CMP]]
; ;
%dst = call i8* @memchr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @negative, i64 0, i64 0), i32 %C, i32 3) %dst = call i8* @memchr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @negative, i64 0, i64 0), i32 %C, i32 3)
%cmp = icmp ne i8* %dst, null %cmp = icmp ne i8* %dst, null
ret i1 %cmp ret i1 %cmp
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/memcmp-1.ll

Show First 20 Lines • Show All 115 Lines • ▼ Show 20 Lines; CHECK-LABEL: @test_simplify9(
%xptr = bitcast i16* %x.addr to i8* %xptr = bitcast i16* %x.addr to i8*
%yptr = bitcast i16* %y.addr to i8* %yptr = bitcast i16* %y.addr to i8*
%call = call i32 @memcmp(i8* %xptr, i8* %yptr, i32 2) %call = call i32 @memcmp(i8* %xptr, i8* %yptr, i32 2)
%cmp = icmp eq i32 %call, 0 %cmp = icmp eq i32 %call, 0
ret i1 %cmp ret i1 %cmp
; CHECK: %cmp = icmp eq i16 %x, %y ; CHECK: %cmp = icmp eq i16 %x, %y
; CHECK: ret i1 %cmp ; CHECK: ret i1 %cmp
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/memcpy-1.ll

Show All 9 Lines
define i8* @test_simplify1(i8* %mem1, i8* %mem2, i32 %size) { define i8* @test_simplify1(i8* %mem1, i8* %mem2, i32 %size) {
; CHECK-LABEL: @test_simplify1( ; CHECK-LABEL: @test_simplify1(
%ret = call i8* @memcpy(i8* %mem1, i8* %mem2, i32 %size) %ret = call i8* @memcpy(i8* %mem1, i8* %mem2, i32 %size)
; CHECK: call void @llvm.memcpy ; CHECK: call void @llvm.memcpy
ret i8* %ret ret i8* %ret
; CHECK: ret i8* %mem1 ; CHECK: ret i8* %mem1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/memmove-1.ll

Show All 9 Lines
define i8* @test_simplify1(i8* %mem1, i8* %mem2, i32 %size) { define i8* @test_simplify1(i8* %mem1, i8* %mem2, i32 %size) {
; CHECK-LABEL: @test_simplify1( ; CHECK-LABEL: @test_simplify1(
%ret = call i8* @memmove(i8* %mem1, i8* %mem2, i32 %size) %ret = call i8* @memmove(i8* %mem1, i8* %mem2, i32 %size)
; CHECK: call void @llvm.memmove ; CHECK: call void @llvm.memmove
ret i8* %ret ret i8* %ret
; CHECK: ret i8* %mem1 ; CHECK: ret i8* %mem1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/memset-1.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
declare noalias i8* @malloc(i32) #1 declare noalias i8* @malloc(i32) #1
declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) #2 declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) #2
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind } attributes #1 = { nounwind }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/memset_chk-1.ll

Show First 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
} }
declare noalias i8* @malloc(i64) #1 declare noalias i8* @malloc(i64) #1
attributes #0 = { nounwind ssp uwtable } attributes #0 = { nounwind ssp uwtable }
attributes #1 = { nounwind } attributes #1 = { nounwind }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/no_cgscc_assert.ll

Show All 10 Lines
; CHECK-LABEL: @bar( ; CHECK-LABEL: @bar(
; CHECK-NEXT: call fast float @llvm.fabs.f32 ; CHECK-NEXT: call fast float @llvm.fabs.f32
; CHECK-NEXT: ret float ; CHECK-NEXT: ret float
} }
declare float @sqrtf(float) declare float @sqrtf(float)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/objsize-64.ll

Show All 31 Lines
lpad: lpad:
%1 = landingpad { i8*, i32 } %1 = landingpad { i8*, i32 }
filter [0 x i8*] zeroinitializer filter [0 x i8*] zeroinitializer
%2 = extractvalue { i8*, i32 } %1, 0 %2 = extractvalue { i8*, i32 } %1, 0
tail call void @__cxa_call_unexpected(i8* %2) noreturn nounwind tail call void @__cxa_call_unexpected(i8* %2) noreturn nounwind
unreachable unreachable
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/objsize.ll

Show First 20 Lines • Show All 233 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test19( ; CHECK-LABEL: @test19(
; CHECK: llvm.objectsize ; CHECK: llvm.objectsize
define i32 @test19() { define i32 @test19() {
%bc = bitcast [60 x i8]* @globalalias2 to i8* %bc = bitcast [60 x i8]* @globalalias2 to i8*
%1 = call i32 @llvm.objectsize.i32.p0i8(i8* %bc, i1 false) %1 = call i32 @llvm.objectsize.i32.p0i8(i8* %bc, i1 false)
ret i32 %1 ret i32 %1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/osx-names.ll

Show All 22 Lines
define void @test2(%struct.__sFILE* %stream, i8* %str) nounwind ssp { define void @test2(%struct.__sFILE* %stream, i8* %str) nounwind ssp {
; CHECK-LABEL: define void @test2( ; CHECK-LABEL: define void @test2(
; CHECK: call i32 @"fputs$UNIX2003" ; CHECK: call i32 @"fputs$UNIX2003"
%call = tail call i32 (%struct.__sFILE*, i8*, ...) @fprintf(%struct.__sFILE* %stream, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str2, i32 0, i32 0), i8* %str) nounwind %call = tail call i32 (%struct.__sFILE*, i8*, ...) @fprintf(%struct.__sFILE* %stream, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str2, i32 0, i32 0), i8* %str) nounwind
ret void ret void
} }
declare i32 @fprintf(%struct.__sFILE*, i8*, ...) nounwind declare i32 @fprintf(%struct.__sFILE*, i8*, ...) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/pow-1.ll

Show First 20 Lines • Show All 186 Lines • ▼ Show 20 Lines
; CHECK-EXP10: [[EXP10:%[_a-z0-9]+]] = call double @__exp10(double %x) [[NUW_RO]] ; CHECK-EXP10: [[EXP10:%[_a-z0-9]+]] = call double @__exp10(double %x) [[NUW_RO]]
ret double %retval ret double %retval
; CHECK-EXP10: ret double [[EXP10]] ; CHECK-EXP10: ret double [[EXP10]]
; CHECK-NO-EXP10: call double @pow ; CHECK-NO-EXP10: call double @pow
} }
; CHECK: attributes [[NUW_RO]] = { nounwind readonly } ; CHECK: attributes [[NUW_RO]] = { nounwind readonly }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/pow-exp.ll

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @function_pointer ; CHECK-LABEL: @function_pointer
; CHECK-NEXT: %call1 = call fast double %fptr() ; CHECK-NEXT: %call1 = call fast double %fptr()
; CHECK-NEXT: %pow = call fast double @llvm.pow.f64(double %call1, double %p1) ; CHECK-NEXT: %pow = call fast double @llvm.pow.f64(double %call1, double %p1)
declare double @exp(double) declare double @exp(double)
declare double @exp2(double) declare double @exp2(double)
declare double @llvm.pow.f64(double, double) declare double @llvm.pow.f64(double, double)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/pow-sqrt.ll

; RUN: opt < %s -instcombine -S | FileCheck %s ; RUN: opt < %s -instcombine -S | FileCheck %s
define double @pow_half(double %x) { define double @pow_half(double %x) {
%pow = call fast double @llvm.pow.f64(double %x, double 5.000000e-01) %pow = call fast double @llvm.pow.f64(double %x, double 5.000000e-01)
ret double %pow ret double %pow
} }
; CHECK-LABEL: define double @pow_half( ; CHECK-LABEL: define double @pow_half(
; CHECK-NEXT: %sqrt = call fast double @sqrt(double %x) ; CHECK-NEXT: %sqrt = call fast double @sqrt(double %x)
; CHECK-NEXT: ret double %sqrt ; CHECK-NEXT: ret double %sqrt
declare double @llvm.pow.f64(double, double) declare double @llvm.pow.f64(double, double)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/printf-1.ll

Show First 20 Lines • Show All 123 Lines • ▼ Show 20 Lines
define i32 @test_no_simplify3() { define i32 @test_no_simplify3() {
; CHECK-LABEL: @test_no_simplify3( ; CHECK-LABEL: @test_no_simplify3(
%fmt = getelementptr [2 x i8], [2 x i8]* @h, i32 0, i32 0 %fmt = getelementptr [2 x i8], [2 x i8]* @h, i32 0, i32 0
%ret = call i32 (i8*, ...) @printf(i8* %fmt) %ret = call i32 (i8*, ...) @printf(i8* %fmt)
; CHECK-NEXT: call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @h, i32 0, i32 0)) ; CHECK-NEXT: call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @h, i32 0, i32 0))
ret i32 %ret ret i32 %ret
; CHECK-NEXT: ret i32 %ret ; CHECK-NEXT: ret i32 %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/printf-2.ll

Show First 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test_simplify7( ; CHECK-LABEL: @test_simplify7(
%fmt = getelementptr [3 x i8], [3 x i8]* @format_str, i32 0, i32 0 %fmt = getelementptr [3 x i8], [3 x i8]* @format_str, i32 0, i32 0
%str = getelementptr [2 x i8], [2 x i8]* @charstr, i32 0, i32 0 %str = getelementptr [2 x i8], [2 x i8]* @charstr, i32 0, i32 0
call void (i8*, ...) @printf(i8* %fmt, i8* %str) call void (i8*, ...) @printf(i8* %fmt, i8* %str)
; CHECK-NEXT: call i32 @putchar(i32 97) ; CHECK-NEXT: call i32 @putchar(i32 97)
ret void ret void
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/printf-3.ll

Show All 31 Lines
; CHECK: %[[CP:.*]] = catchpad within %[[CS]] [i8* null, i32 64, i8* null] ; CHECK: %[[CP:.*]] = catchpad within %[[CS]] [i8* null, i32 64, i8* null]
; CHECK: call i32 @putchar(i32 10) [ "funclet"(token %[[CP]]) ] ; CHECK: call i32 @putchar(i32 10) [ "funclet"(token %[[CP]]) ]
declare void @_CxxThrowException(i8*, i8*) declare void @_CxxThrowException(i8*, i8*)
declare i32 @__CxxFrameHandler3(...) declare i32 @__CxxFrameHandler3(...)
declare i32 @printf(i8*, ...) declare i32 @printf(i8*, ...)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/puts-1.ll

Show All 23 Lines
define i32 @test_no_simplify1() { define i32 @test_no_simplify1() {
; CHECK-LABEL: @test_no_simplify1( ; CHECK-LABEL: @test_no_simplify1(
%str = getelementptr [1 x i8], [1 x i8]* @empty, i32 0, i32 0 %str = getelementptr [1 x i8], [1 x i8]* @empty, i32 0, i32 0
%ret = call i32 @puts(i8* %str) %ret = call i32 @puts(i8* %str)
; CHECK-NEXT: call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @empty, i32 0, i32 0)) ; CHECK-NEXT: call i32 @puts(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @empty, i32 0, i32 0))
ret i32 %ret ret i32 %ret
; CHECK-NEXT: ret i32 %ret ; CHECK-NEXT: ret i32 %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/simplify-libcalls.ll

Show First 20 Lines • Show All 172 Lines • ▼ Show 20 Lines
; ;
%y = call i32 @toascii(i8 %x) %y = call i32 @toascii(i8 %x)
ret i32 %y ret i32 %y
} }
attributes #0 = { nobuiltin } attributes #0 = { nobuiltin }
attributes #1 = { builtin } attributes #1 = { builtin }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/sincospi.ll

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Lines
define double @test_fptr(double (double)* %fptr, double %p1) { define double @test_fptr(double (double)* %fptr, double %p1) {
%sin = call double @__sinpi(double %p1) #0 %sin = call double @__sinpi(double %p1) #0
%cos = call double %fptr(double %p1) %cos = call double %fptr(double %p1)
%res = fadd double %sin, %cos %res = fadd double %sin, %cos
ret double %res ret double %res
; CHECK-LABEL: @test_fptr ; CHECK-LABEL: @test_fptr
; CHECK: __sinpi ; CHECK: __sinpi
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/sprintf-1.ll

Show First 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
define void @test_no_simplify2(i8* %dst, i8* %fmt, double %d) { define void @test_no_simplify2(i8* %dst, i8* %fmt, double %d) {
; CHECK-LABEL: @test_no_simplify2( ; CHECK-LABEL: @test_no_simplify2(
call i32 (i8*, i8*, ...) @sprintf(i8* %dst, i8* %fmt, double %d) call i32 (i8*, i8*, ...) @sprintf(i8* %dst, i8* %fmt, double %d)
; CHECK-NEXT: call i32 (i8*, i8*, ...) @sprintf(i8* %dst, i8* %fmt, double %d) ; CHECK-NEXT: call i32 (i8*, i8*, ...) @sprintf(i8* %dst, i8* %fmt, double %d)
ret void ret void
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/sqrt.ll

Show First 20 Lines • Show All 46 Lines • ▼ Show 20 Lines; CHECK: fptrunc
%call36 = call i32 (double) @foo(double %call34) nounwind %call36 = call i32 (double) @foo(double %call34) nounwind
%conv38 = fptrunc double %call34 to float %conv38 = fptrunc double %call34 to float
ret float %conv38 ret float %conv38
} }
declare i32 @foo(double) declare i32 @foo(double)
declare double @sqrt(double) readnone declare double @sqrt(double) readnone
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/stpcpy-1.ll

Show All 38 Lines; CHECK-LABEL: @test_no_simplify1(
%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0 %dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
%src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0 %src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0
%ret = call i8* @stpcpy(i8* %dst, i8* %src) %ret = call i8* @stpcpy(i8* %dst, i8* %src)
; CHECK: call i8* @stpcpy ; CHECK: call i8* @stpcpy
ret i8* %ret ret i8* %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll

Show First 20 Lines • Show All 95 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %ret = call i8* @__stpcpy_chk(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @b, i32 0, i32 0), i32 8) ; CHECK-NEXT: %ret = call i8* @__stpcpy_chk(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @b, i32 0, i32 0), i32 8)
; CHECK-NEXT: ret i8* %ret ; CHECK-NEXT: ret i8* %ret
%ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 8) %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 8)
ret i8* %ret ret i8* %ret
} }
declare i8* @__stpcpy_chk(i8*, i8*, i32) nounwind declare i8* @__stpcpy_chk(i8*, i8*, i32) nounwind
declare i32 @llvm.objectsize.i32.p0i8(i8*, i1) nounwind readonly declare i32 @llvm.objectsize.i32.p0i8(i8*, i1) nounwind readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strcat-1.ll

Show All 30 Lines; CHECK: call i32 @puts
; rslt3 = strcat(rslt2, "\00hello\00") ; rslt3 = strcat(rslt2, "\00hello\00")
%arg4 = getelementptr [7 x i8], [7 x i8]* @null_hello, i32 0, i32 0 %arg4 = getelementptr [7 x i8], [7 x i8]* @null_hello, i32 0, i32 0
%rslt3 = call i8* @strcat(i8* %rslt2, i8* %arg4) %rslt3 = call i8* @strcat(i8* %rslt2, i8* %arg4)
call i32 @puts( i8* %rslt3 ) call i32 @puts( i8* %rslt3 )
ret i32 0 ret i32 0
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strcat-2.ll

Show All 24 Lines
; CHECK-LABEL: @test_simplify2( ; CHECK-LABEL: @test_simplify2(
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0 %dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
%src = getelementptr [1 x i8], [1 x i8]* @empty, i32 0, i32 0 %src = getelementptr [1 x i8], [1 x i8]* @empty, i32 0, i32 0
call i8* @strcat(i8* %dst, i8* %src) call i8* @strcat(i8* %dst, i8* %src)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strchr-1.ll

Show First 20 Lines • Show All 87 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %memchr.bits = icmp ne i16 [[AND]], 0 ; CHECK-NEXT: %memchr.bits = icmp ne i16 [[AND]], 0
; CHECK-NEXT: %memchr1 = and i1 %memchr.bounds, %memchr.bits ; CHECK-NEXT: %memchr1 = and i1 %memchr.bounds, %memchr.bits
; CHECK-NEXT: ret i1 %memchr1 ; CHECK-NEXT: ret i1 %memchr1
%dst = call i8* @strchr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @newlines, i64 0, i64 0), i32 %C) %dst = call i8* @strchr(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @newlines, i64 0, i64 0), i32 %C)
%cmp = icmp ne i8* %dst, null %cmp = icmp ne i8* %dst, null
ret i1 %cmp ret i1 %cmp
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strcmp-1.ll

Show First 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; strcmp(x,x) -> 0 ; strcmp(x,x) -> 0
define i32 @test6(i8* %str) { define i32 @test6(i8* %str) {
; CHECK-LABEL: @test6( ; CHECK-LABEL: @test6(
; CHECK: ret i32 0 ; CHECK: ret i32 0
%temp1 = call i32 @strcmp(i8* %str, i8* %str) %temp1 = call i32 @strcmp(i8* %str, i8* %str)
ret i32 %temp1 ret i32 %temp1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strcpy-1.ll

Show All 37 Lines; CHECK-LABEL: @test_no_simplify1(
%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0 %dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
%src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0 %src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0
%ret = call i8* @strcpy(i8* %dst, i8* %src) %ret = call i8* @strcpy(i8* %dst, i8* %src)
; CHECK: call i8* @strcpy ; CHECK: call i8* @strcpy
ret i8* %ret ret i8* %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strcpy_chk-1.ll

Show First 20 Lines • Show All 95 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %ret = call i8* @__strcpy_chk(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @b, i32 0, i32 0), i32 8) ; CHECK-NEXT: %ret = call i8* @__strcpy_chk(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @b, i32 0, i32 0), i32 8)
; CHECK-NEXT: ret i8* %ret ; CHECK-NEXT: ret i8* %ret
%ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 8) %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 8)
ret i8* %ret ret i8* %ret
} }
declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind
declare i32 @llvm.objectsize.i32.p0i8(i8*, i1) nounwind readonly declare i32 @llvm.objectsize.i32.p0i8(i8*, i1) nounwind readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strcspn-1.ll

Show First 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
define i64 @test_no_simplify1(i8* %str, i8* %pat) { define i64 @test_no_simplify1(i8* %str, i8* %pat) {
; CHECK-LABEL: @test_no_simplify1( ; CHECK-LABEL: @test_no_simplify1(
%ret = call i64 @strcspn(i8* %str, i8* %pat) %ret = call i64 @strcspn(i8* %str, i8* %pat)
; CHECK-NEXT: %ret = call i64 @strcspn(i8* %str, i8* %pat) ; CHECK-NEXT: %ret = call i64 @strcspn(i8* %str, i8* %pat)
ret i64 %ret ret i64 %ret
; CHECK-NEXT: ret i64 %ret ; CHECK-NEXT: ret i64 %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strlen-1.ll

Show First 20 Lines • Show All 169 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i32 [[HELLO_L]] ; CHECK-NEXT: ret i32 [[HELLO_L]]
; ;
%and = and i32 %x, 15 %and = and i32 %x, 15
%hello_p = getelementptr inbounds [13 x i8], [13 x i8]* @null_hello_mid, i32 0, i32 %and %hello_p = getelementptr inbounds [13 x i8], [13 x i8]* @null_hello_mid, i32 0, i32 %and
%hello_l = call i32 @strlen(i8* %hello_p) %hello_l = call i32 @strlen(i8* %hello_p)
ret i32 %hello_l ret i32 %hello_l
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strncat-1.ll

Show All 29 Lines; CHECK: call i32 @puts
; rslt3 = strncat(rslt2, "\00hello\00") ; rslt3 = strncat(rslt2, "\00hello\00")
%arg4 = getelementptr [7 x i8], [7 x i8]* @null_hello, i32 0, i32 0 %arg4 = getelementptr [7 x i8], [7 x i8]* @null_hello, i32 0, i32 0
%rslt3 = call i8* @strncat(i8* %rslt2, i8* %arg4, i32 42) %rslt3 = call i8* @strncat(i8* %rslt2, i8* %arg4, i32 42)
call i32 @puts(i8* %rslt3) call i32 @puts(i8* %rslt3)
ret i32 0 ret i32 0
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strncat-2.ll

Show First 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; CHECK: call i8* @strncat ; CHECK: call i8* @strncat
; CHECK: ret void ; CHECK: ret void
%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0 %dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
%src = getelementptr [6 x i8], [6 x i8]* @hello, i32 0, i32 0 %src = getelementptr [6 x i8], [6 x i8]* @hello, i32 0, i32 0
call i8* @strncat(i8* %dst, i8* %src, i32 1) call i8* @strncat(i8* %dst, i8* %src, i32 1)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strncmp-1.ll

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; strncmp(x,x,n) -> 0 ; strncmp(x,x,n) -> 0
define i32 @test8(i8* %str, i32 %n) { define i32 @test8(i8* %str, i32 %n) {
; CHECK-LABEL: @test8( ; CHECK-LABEL: @test8(
; CHECK: ret i32 0 ; CHECK: ret i32 0
%temp1 = call i32 @strncmp(i8* %str, i8* %str, i32 %n) %temp1 = call i32 @strncmp(i8* %str, i8* %str, i32 %n)
ret i32 %temp1 ret i32 %temp1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strncpy-1.ll

Show First 20 Lines • Show All 87 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test_no_simplify2( ; CHECK-LABEL: @test_no_simplify2(
%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0 %dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
%src = getelementptr [6 x i8], [6 x i8]* @hello, i32 0, i32 0 %src = getelementptr [6 x i8], [6 x i8]* @hello, i32 0, i32 0
call i8* @strncpy(i8* %dst, i8* %src, i32 8) call i8* @strncpy(i8* %dst, i8* %src, i32 8)
; CHECK: call i8* @strncpy ; CHECK: call i8* @strncpy
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strncpy_chk-1.ll

Show First 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %ret = call i8* @__strncpy_chk(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @b, i32 0, i32 0), i32 8, i32 0) ; CHECK-NEXT: %ret = call i8* @__strncpy_chk(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @b, i32 0, i32 0), i32 8, i32 0)
; CHECK-NEXT: ret i8* %ret ; CHECK-NEXT: ret i8* %ret
%ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 8, i32 0) %ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 8, i32 0)
ret i8* %ret ret i8* %ret
} }
declare i8* @__strncpy_chk(i8*, i8*, i32, i32) declare i8* @__strncpy_chk(i8*, i8*, i32, i32)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strpbrk-1.ll

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
define i8* @test_no_simplify1(i8* %str, i8* %pat) { define i8* @test_no_simplify1(i8* %str, i8* %pat) {
; CHECK-LABEL: @test_no_simplify1( ; CHECK-LABEL: @test_no_simplify1(
%ret = call i8* @strpbrk(i8* %str, i8* %pat) %ret = call i8* @strpbrk(i8* %str, i8* %pat)
; CHECK-NEXT: %ret = call i8* @strpbrk(i8* %str, i8* %pat) ; CHECK-NEXT: %ret = call i8* @strpbrk(i8* %str, i8* %pat)
ret i8* %ret ret i8* %ret
; CHECK-NEXT: ret i8* %ret ; CHECK-NEXT: ret i8* %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strrchr-1.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; CHECK: call i8* @strrchr ; CHECK: call i8* @strrchr
; CHECK: ret void ; CHECK: ret void
%src = getelementptr [14 x i8], [14 x i8]* @hello, i32 0, i32 0 %src = getelementptr [14 x i8], [14 x i8]* @hello, i32 0, i32 0
%dst = call i8* @strrchr(i8* %src, i32 %chr) %dst = call i8* @strrchr(i8* %src, i32 %chr)
store i8* %dst, i8** @chp store i8* %dst, i8** @chp
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strspn-1.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
define i64 @test_no_simplify1(i8* %str, i8* %pat) { define i64 @test_no_simplify1(i8* %str, i8* %pat) {
; CHECK-LABEL: @test_no_simplify1( ; CHECK-LABEL: @test_no_simplify1(
%ret = call i64 @strspn(i8* %str, i8* %pat) %ret = call i64 @strspn(i8* %str, i8* %pat)
; CHECK-NEXT: %ret = call i64 @strspn(i8* %str, i8* %pat) ; CHECK-NEXT: %ret = call i64 @strspn(i8* %str, i8* %pat)
ret i64 %ret ret i64 %ret
; CHECK-NEXT: ret i64 %ret ; CHECK-NEXT: ret i64 %ret
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strstr-1.ll

Show First 20 Lines • Show All 57 Lines • ▼ Show 20 Lines; CHECK-LABEL: @test_simplify5(
%ret = call i8* @strstr(i8* %str, i8* %pat) %ret = call i8* @strstr(i8* %str, i8* %pat)
%cmp = icmp eq i8* %ret, %str %cmp = icmp eq i8* %ret, %str
ret i1 %cmp ret i1 %cmp
; CHECK: [[LEN:%[a-z]+]] = call {{i[0-9]+}} @strlen(i8* %pat) ; CHECK: [[LEN:%[a-z]+]] = call {{i[0-9]+}} @strlen(i8* %pat)
; CHECK: [[NCMP:%[a-z]+]] = call {{i[0-9]+}} @strncmp(i8* %str, i8* %pat, {{i[0-9]+}} [[LEN]]) ; CHECK: [[NCMP:%[a-z]+]] = call {{i[0-9]+}} @strncmp(i8* %str, i8* %pat, {{i[0-9]+}} [[LEN]])
; CHECK: icmp eq {{i[0-9]+}} [[NCMP]], 0 ; CHECK: icmp eq {{i[0-9]+}} [[NCMP]], 0
; CHECK: ret i1 ; CHECK: ret i1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/strto-1.ll

Show First 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
} }
define void @test_no_simplify1(i8* %x, i8** %endptr) { define void @test_no_simplify1(i8* %x, i8** %endptr) {
; CHECK-LABEL: @test_no_simplify1( ; CHECK-LABEL: @test_no_simplify1(
call i64 @strtol(i8* %x, i8** %endptr, i32 10) call i64 @strtol(i8* %x, i8** %endptr, i32 10)
; CHECK-NEXT: call i64 @strtol(i8* %x, i8** %endptr, i32 10) ; CHECK-NEXT: call i64 @strtol(i8* %x, i8** %endptr, i32 10)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/tan.ll

Show All 15 Lines
} }
; CHECK-LABEL: @test2 ; CHECK-LABEL: @test2
; CHECK: tanf ; CHECK: tanf
declare float @tanf(float) declare float @tanf(float)
declare float @atanf(float) declare float @atanf(float)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/toascii-1.ll

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
define i32 @test_simplify7(i32 %x) { define i32 @test_simplify7(i32 %x) {
; CHECK-LABEL: @test_simplify7( ; CHECK-LABEL: @test_simplify7(
%ret = call i32 @toascii(i32 %x) %ret = call i32 @toascii(i32 %x)
; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 127 ; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 127
ret i32 %ret ret i32 %ret
; CHECK-NEXT: ret i32 [[AND]] ; CHECK-NEXT: ret i32 [[AND]]
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/weak-symbols.ll

Show All 25 Lines
entry: entry:
%str1 = getelementptr inbounds [2 x i8], [2 x i8]* @real_init, i64 0, i64 0 %str1 = getelementptr inbounds [2 x i8], [2 x i8]* @real_init, i64 0, i64 0
%str2 = getelementptr inbounds [2 x i8], [2 x i8]* @.str, i64 0, i64 0 %str2 = getelementptr inbounds [2 x i8], [2 x i8]* @.str, i64 0, i64 0
%temp1 = call i32 @strcmp(i8* %str1, i8* %str2) nounwind readonly %temp1 = call i32 @strcmp(i8* %str1, i8* %str2) nounwind readonly
ret i32 %temp1 ret i32 %temp1
} }
declare i32 @strcmp(i8*, i8*) nounwind readonly declare i32 @strcmp(i8*, i8*) nounwind readonly
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstCombine/win-math.ll

Show First 20 Lines • Show All 287 Lines • ▼ Show 20 Lines
; MINGW32-NOT: float @powf ; MINGW32-NOT: float @powf
; MINGW64-LABEL: @float_powsqrt( ; MINGW64-LABEL: @float_powsqrt(
; MINGW64: float @sqrtf ; MINGW64: float @sqrtf
; MINGW64: float @fabsf ; MINGW64: float @fabsf
; MINGW64-NOT: float @powf ; MINGW64-NOT: float @powf
%1 = call float @powf(float %x, float 0.5) %1 = call float @powf(float %x, float 0.5)
ret float %1 ret float %1
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstMerge/st_sink_bugfix_22613.ll

Show First 20 Lines • Show All 98 Lines • ▼ Show 20 Linesif.then: ; preds = %entry
unreachable unreachable
if.end: ; preds = %entry if.end: ; preds = %entry
ret i32 0 ret i32 0
} }
; Function Attrs: noreturn nounwind ; Function Attrs: noreturn nounwind
declare void @abort() declare void @abort()
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstSimplify/call-callconv.ll

Show All 40 Lines; CHECK: _strlen2
%call = tail call arm_aapcscc i32 @strlen(i8* %str) %call = tail call arm_aapcscc i32 @strlen(i8* %str)
%cmp = icmp ne i32 %call, 0 %cmp = icmp ne i32 %call, 0
ret i1 %cmp ret i1 %cmp
; CHECK: %[[STRLENFIRST:.*]] = load i8, i8* %str ; CHECK: %[[STRLENFIRST:.*]] = load i8, i8* %str
; CHECK: %[[CMP:.*]] = icmp ne i8 %[[STRLENFIRST]], 0 ; CHECK: %[[CMP:.*]] = icmp ne i8 %[[STRLENFIRST]], 0
; CHECK: ret i1 %[[CMP]] ; CHECK: ret i1 %[[CMP]]
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/InstSimplify/call.ll

Show First 20 Lines • Show All 217 Lines • ▼ Show 20 Lines
; CHECK: ret <8 x i32> <i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0> ; CHECK: ret <8 x i32> <i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0>
%masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>* %V, i32 4, <8 x i1> undef, <8 x i32> <i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0>) %masked.load = call <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>* %V, i32 4, <8 x i1> undef, <8 x i32> <i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0>)
ret <8 x i32> %masked.load ret <8 x i32> %masked.load
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
declare <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>*, i32, <8 x i1>, <8 x i32>) declare <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>*, i32, <8 x i1>, <8 x i32>)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/basic-address-space.ll

Show First 20 Lines • Show All 83 Lines • ▼ Show 20 Linesfor.body: ; preds = %for.inc, %for.body.lr.ph
%cmp = icmp slt i32 %inc, 2 %cmp = icmp slt i32 %inc, 2
br i1 %cmp, label %for.body, label %for.end br i1 %cmp, label %for.body, label %for.end
for.end: ; preds = %for.inc for.end: ; preds = %for.inc
%tmp8 = load i32, i32 addrspace(2)* getelementptr inbounds ([7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 6), align 4 %tmp8 = load i32, i32 addrspace(2)* getelementptr inbounds ([7 x i32], [7 x i32] addrspace(2)* @g_50, i32 0, i64 6), align 4
ret i32 %tmp8 ret i32 %tmp8
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/basic.ll

Show First 20 Lines • Show All 560 Lines • ▼ Show 20 Lines
; CHECK: entry: ; CHECK: entry:
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %X, i8 0, i64 10000, i32 1, i1 false) ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %X, i8 0, i64 10000, i32 1, i1 false)
; CHECK: ret void ; CHECK: ret void
} }
; Validate that "memset_pattern" has the proper attributes. ; Validate that "memset_pattern" has the proper attributes.
; CHECK: declare void @memset_pattern16(i8* nocapture, i8* nocapture readonly, i64) [[ATTRS:#[0-9]+]] ; CHECK: declare void @memset_pattern16(i8* nocapture, i8* nocapture readonly, i64) [[ATTRS:#[0-9]+]]
; CHECK: [[ATTRS]] = { argmemonly } ; CHECK: [[ATTRS]] = { argmemonly }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/debug-line.ll

Show All 21 Linesfor.end: ; preds = %for.body
tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !10, metadata !DIExpression()), !dbg !16 tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !10, metadata !DIExpression()), !dbg !16
ret void, !dbg !17 ret void, !dbg !17
} }
declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone
!llvm.module.flags = !{!19} !llvm.module.flags = !{!19, !20}
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!0 = distinct !DISubprogram(name: "foo", line: 2, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !2, file: !18, scope: !1, type: !3) !0 = distinct !DISubprogram(name: "foo", line: 2, isLocal: false, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !2, file: !18, scope: !1, type: !3)
!1 = !DIFile(filename: "li.c", directory: "/private/tmp") !1 = !DIFile(filename: "li.c", directory: "/private/tmp")
!2 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang version 2.9 (trunk 127165:127174)", isOptimized: true, emissionKind: FullDebug, file: !18, enums: !9, retainedTypes: !9) !2 = distinct !DICompileUnit(language: DW_LANG_C99, producer: "clang version 2.9 (trunk 127165:127174)", isOptimized: true, emissionKind: FullDebug, file: !18, enums: !9, retainedTypes: !9)
!3 = !DISubroutineType(types: !4) !3 = !DISubroutineType(types: !4)
!4 = !{null} !4 = !{null}
!5 = !DILocalVariable(name: "a", line: 2, arg: 1, scope: !0, file: !1, type: !6) !5 = !DILocalVariable(name: "a", line: 2, arg: 1, scope: !0, file: !1, type: !6)
!6 = !DIDerivedType(tag: DW_TAG_pointer_type, size: 64, align: 64, scope: !2, baseType: !7) !6 = !DIDerivedType(tag: DW_TAG_pointer_type, size: 64, align: 64, scope: !2, baseType: !7)
!7 = !DIBasicType(tag: DW_TAG_base_type, name: "double", size: 64, align: 64, encoding: DW_ATE_float) !7 = !DIBasicType(tag: DW_TAG_base_type, name: "double", size: 64, align: 64, encoding: DW_ATE_float)
!8 = !DILocation(line: 2, column: 18, scope: !0) !8 = !DILocation(line: 2, column: 18, scope: !0)
!9 = !{} !9 = !{}
!10 = !DILocalVariable(name: "i", line: 3, scope: !11, file: !1, type: !13) !10 = !DILocalVariable(name: "i", line: 3, scope: !11, file: !1, type: !13)
!11 = distinct !DILexicalBlock(line: 3, column: 3, file: !18, scope: !12) !11 = distinct !DILexicalBlock(line: 3, column: 3, file: !18, scope: !12)
!12 = distinct !DILexicalBlock(line: 2, column: 21, file: !18, scope: !0) !12 = distinct !DILexicalBlock(line: 2, column: 21, file: !18, scope: !0)
!13 = !DIBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed) !13 = !DIBasicType(tag: DW_TAG_base_type, name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
!14 = !DILocation(line: 3, column: 3, scope: !12) !14 = !DILocation(line: 3, column: 3, scope: !12)
!15 = !DILocation(line: 4, column: 5, scope: !11) !15 = !DILocation(line: 4, column: 5, scope: !11)
!16 = !DILocation(line: 3, column: 29, scope: !11) !16 = !DILocation(line: 3, column: 29, scope: !11)
!17 = !DILocation(line: 5, column: 1, scope: !12) !17 = !DILocation(line: 5, column: 1, scope: !12)
!18 = !DIFile(filename: "li.c", directory: "/private/tmp") !18 = !DIFile(filename: "li.c", directory: "/private/tmp")
!19 = !{i32 1, !"Debug Info Version", i32 3} !19 = !{i32 1, !"Debug Info Version", i32 3}
!20 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/lir-heurs-multi-block-loop.ll

Show First 20 Lines • Show All 174 Lines • ▼ Show 20 Linesfor.end.loopexit: ; preds = %for.inc
%BASKET.1.lcssa = phi i32 [ %BASKET.1, %for.inc ] %BASKET.1.lcssa = phi i32 [ %BASKET.1, %for.inc ]
br label %for.end br label %for.end
for.end: ; preds = %for.end.loopexit, %entry for.end: ; preds = %for.end.loopexit, %entry
%BASKET.0.lcssa = phi i32 [ 0, %entry ], [ %BASKET.1.lcssa, %for.end.loopexit ] %BASKET.0.lcssa = phi i32 [ 0, %entry ], [ %BASKET.1.lcssa, %for.end.loopexit ]
ret i32 %BASKET.0.lcssa ret i32 %BASKET.0.lcssa
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/pr28196.ll

Show All 18 Linesfor.body: ; preds = %for.body, %for.body.preheader
%indvars.iv.next = add nsw i32 %indvars.iv, 1 %indvars.iv.next = add nsw i32 %indvars.iv, 1
%exitcond = icmp ne i32 %indvars.iv.next, 6 %exitcond = icmp ne i32 %indvars.iv.next, 6
br i1 %exitcond, label %for.body, label %for.body.preheader br i1 %exitcond, label %for.body, label %for.body.preheader
} }
; CHECK-LABEL: define void @test1( ; CHECK-LABEL: define void @test1(
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* null, i8* inttoptr (i64 4 to i8*), i64 24, i32 4, i1 false) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* null, i8* inttoptr (i64 4 to i8*), i64 24, i32 4, i1 false)
; CHECK-NOT: store ; CHECK-NOT: store
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/struct.ll

Show First 20 Lines • Show All 213 Lines • ▼ Show 20 Linesfor.end.loopexit: ; preds = %for.body
br label %for.end br label %for.end
for.end: ; preds = %for.end.loopexit, %entry for.end: ; preds = %for.end.loopexit, %entry
ret void ret void
; CHECK-LABEL: @bar6( ; CHECK-LABEL: @bar6(
; CHECK: call void @llvm.memset ; CHECK: call void @llvm.memset
; CHECK-NOT: store ; CHECK-NOT: store
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/struct_pattern.ll

Show First 20 Lines • Show All 178 Lines • ▼ Show 20 Lines
for.end.loopexit: ; preds = %for.body for.end.loopexit: ; preds = %for.body
br label %for.end br label %for.end
for.end: ; preds = %for.end.loopexit, %entry for.end: ; preds = %for.end.loopexit, %entry
ret void ret void
; CHECK-LABEL: @bar5( ; CHECK-LABEL: @bar5(
; CHECK-NOT: call void @memset_pattern16 ; CHECK-NOT: call void @memset_pattern16
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopIdiom/unroll.ll

Show First 20 Lines • Show All 72 Lines • ▼ Show 20 Linesfor.end.loopexit: ; preds = %for.body
br label %for.end br label %for.end
for.end: ; preds = %for.end.loopexit, %entry for.end: ; preds = %for.end.loopexit, %entry
ret void ret void
; CHECK-LABEL: @test_pattern( ; CHECK-LABEL: @test_pattern(
; CHECK: call void @memset_pattern16 ; CHECK: call void @memset_pattern16
; CHECK-NOT: store ; CHECK-NOT: store
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll

Show First 20 Lines • Show All 177 Lines • ▼ Show 20 Linesfor.body: ; preds = %for.body, %entry
%exitcond = icmp eq i64 %indvars.iv.next, 1000 %exitcond = icmp eq i64 %indvars.iv.next, 1000
br i1 %exitcond, label %for.end, label %for.body br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body for.end: ; preds = %for.body
ret void ret void
} }
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll

Show First 20 Lines • Show All 624 Lines • ▼ Show 20 Linesfor.body: ; preds = %entry, %for.body
%indvars.iv.next = add i64 %indvars.iv, 1 %indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp eq i32 %lftr.wideiv, %n %exitcond = icmp eq i32 %lftr.wideiv, %n
br i1 %exitcond, label %for.end, label %for.body br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry for.end: ; preds = %for.body, %entry
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/2008-02-24-MultipleUseofSRet.ll

Show All 28 Linesentry:
%z3 = bitcast %0* %z to i8* %z3 = bitcast %0* %z to i8*
%tmp4 = bitcast %0* %tmp to i8* %tmp4 = bitcast %0* %tmp to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %z3, i8* %tmp4, i32 24, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %z3, i8* %tmp4, i32 24, i32 8, i1 false)
%tmp5 = call fastcc x86_fp80 @passed_uninitialized(%0* %z) %tmp5 = call fastcc x86_fp80 @passed_uninitialized(%0* %z)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/2008-03-13-ReturnSlotBitcast.ll

Show All 14 Linesentry:
%b_i8 = bitcast %b* %b_var to i8* %b_i8 = bitcast %b* %b_var to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %b_i8, i8* %a_i8, i32 4, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %b_i8, i8* %a_i8, i32 4, i32 1, i1 false)
%tmp1 = getelementptr %b, %b* %b_var, i32 0, i32 0 %tmp1 = getelementptr %b, %b* %b_var, i32 0, i32 0
%tmp2 = load float, float* %tmp1 %tmp2 = load float, float* %tmp1
ret float %tmp2 ret float %tmp2
} }
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/align.ll

Show All 29 Lines; CHECK-NOT: memcpy
%a4 = alloca i32, align 4 %a4 = alloca i32, align 4
%a8 = alloca i32, align 8 %a8 = alloca i32, align 8
%a8.cast = bitcast i32* %a8 to i8* %a8.cast = bitcast i32* %a8 to i8*
%a4.cast = bitcast i32* %a4 to i8* %a4.cast = bitcast i32* %a4 to i8*
call void @llvm.memset.p0i8.i64(i8* %a8.cast, i8 0, i64 4, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* %a8.cast, i8 0, i64 4, i32 8, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a4.cast, i8* %a8.cast, i64 4, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a4.cast, i8* %a8.cast, i64 4, i32 4, i1 false)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/atomic.ll

Show All 33 Lines; CHECK-NEXT: call
call void @otherf(i32* nocapture %old) call void @otherf(i32* nocapture %old)
store atomic i32 0, i32* @x unordered, align 4 store atomic i32 0, i32* @x unordered, align 4
%v = load i32, i32* %old %v = load i32, i32* %old
store i32 %v, i32* %new store i32 %v, i32* %new
call void @otherf(i32* nocapture %new) call void @otherf(i32* nocapture %new)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/callslot_aa.ll

Show All 14 Lines
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1)
; Check that the noalias for "dst" was removed by checking that the metadata is gone ; Check that the noalias for "dst" was removed by checking that the metadata is gone
; CHECK-NOT: "dst" ; CHECK-NOT: "dst"
!0 = !{!0} !0 = !{!0}
!1 = distinct !{!1, !0, !"dst"} !1 = distinct !{!1, !0, !"dst"}
!2 = distinct !{!1} !2 = distinct !{!1}
!llvm.module.flags = !{!3}
!3 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/callslot_deref.ll

Show All 22 Lines
; CHECK: call void @llvm.memset.p0i8.i64 ; CHECK: call void @llvm.memset.p0i8.i64
; CHECK: call void @llvm.memset.p0i8.i64 ; CHECK: call void @llvm.memset.p0i8.i64
%src = alloca [4096 x i8], align 1 %src = alloca [4096 x i8], align 1
%p = getelementptr inbounds [4096 x i8], [4096 x i8]* %src, i64 0, i64 0 %p = getelementptr inbounds [4096 x i8], [4096 x i8]* %src, i64 0, i64 0
call void @llvm.memset.p0i8.i64(i8* %p, i8 0, i64 4096, i32 1, i1 false) call void @llvm.memset.p0i8.i64(i8* %p, i8 0, i64 4096, i32 1, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %p, i64 4096, i32 1, i1 false) #2 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst, i8* %p, i64 4096, i32 1, i1 false) #2
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/fca2memcpy.ll

Show First 20 Lines • Show All 102 Lines • ▼ Show 20 Lines; CHECK-LABEL: noaliasaddrproducer
%1 = load %S, %S* %src %1 = load %S, %S* %src
store %S undef, %S* %src store %S undef, %S* %src
%2 = load i32, i32* %dstidptr %2 = load i32, i32* %dstidptr
%dstindex = or i32 %2, 1 %dstindex = or i32 %2, 1
%dst2 = getelementptr %S , %S* %dst, i32 %dstindex %dst2 = getelementptr %S , %S* %dst, i32 %dstindex
store %S %1, %S* %dst2 store %S %1, %S* %dst2
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/form-memset.ll

Show First 20 Lines • Show All 293 Lines • ▼ Show 20 Linesentry:
%arrayidx = getelementptr inbounds i32, i32* %P, i64 0 %arrayidx = getelementptr inbounds i32, i32* %P, i64 0
%arrayidx.cast = bitcast i32* %arrayidx to i96* %arrayidx.cast = bitcast i32* %arrayidx to i96*
store i96 310698676526526814092329217, i96* %arrayidx.cast, align 4 store i96 310698676526526814092329217, i96* %arrayidx.cast, align 4
ret void ret void
; CHECK-LABEL: @test11( ; CHECK-LABEL: @test11(
; CHECK-NOT: store ; CHECK-NOT: store
; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 1, i64 23, i32 4, i1 false) ; CHECK: call void @llvm.memset.p0i8.i64(i8* %1, i8 1, i64 23, i32 4, i1 false)
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/invariant.start.ll

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; CHECK-NEXT: %i = call {}* @llvm.invariant.start.p0i8(i64 32, i8* %dst1) ; CHECK-NEXT: %i = call {}* @llvm.invariant.start.p0i8(i64 32, i8* %dst1)
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %dst2, i8 %c, i64 128, i32 8, i1 false) ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* %dst2, i8 %c, i64 128, i32 8, i1 false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
call void @llvm.memset.p0i8.i64(i8* %dst1, i8 %c, i64 128, i32 1, i1 false) call void @llvm.memset.p0i8.i64(i8* %dst1, i8 %c, i64 128, i32 1, i1 false)
%i = call {}* @llvm.invariant.start.p0i8(i64 32, i8* %dst1) %i = call {}* @llvm.invariant.start.p0i8(i64 32, i8* %dst1)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst2, i8* %dst1, i64 128, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst2, i8* %dst1, i64 128, i32 8, i1 false)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/lifetime.ll

Show All 17 Lines; CHECK: ret void
%tmp10 = getelementptr inbounds i8, i8* %tmp5, i64 7 %tmp10 = getelementptr inbounds i8, i8* %tmp5, i64 7
store i8 0, i8* %tmp10, align 1 store i8 0, i8* %tmp10, align 1
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %arg1, i8* %tmp5, i64 16, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %arg1, i8* %tmp5, i64 16, i32 8, i1 false)
call void @llvm.lifetime.end(i64 16, i8* %tmp5) call void @llvm.lifetime.end(i64 16, i8* %tmp5)
ret void ret void
} }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/loadstore-sret.ll

Show All 17 Lines; CHECK-NOT: load
%tmp.i.i4 = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* %agg.result, i64 0, i32 0 %tmp.i.i4 = getelementptr inbounds %"class.std::auto_ptr", %"class.std::auto_ptr"* %agg.result, i64 0, i32 0
; CHECK-NOT: store ; CHECK-NOT: store
store i32* %tmp2.i.i, i32** %tmp.i.i4, align 8 store i32* %tmp2.i.i, i32** %tmp.i.i4, align 8
; CHECK: ret void ; CHECK: ret void
ret void ret void
} }
declare void @_Z3barv(%"class.std::auto_ptr"* nocapture sret) nounwind declare void @_Z3barv(%"class.std::auto_ptr"* nocapture sret) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memcpy-to-memset-with-lifetimes.ll

Show First 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; CHECK: ret void ; CHECK: ret void
} }
declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memcpy-to-memset.ll

Show All 11 Linesdefine void @test1() nounwind {
%arraydecay = getelementptr inbounds [3 x i32], [3 x i32]* %arr, i64 0, i64 0 %arraydecay = getelementptr inbounds [3 x i32], [3 x i32]* %arr, i64 0, i64 0
call void @foo(i32* %arraydecay) nounwind call void @foo(i32* %arraydecay) nounwind
ret void ret void
; CHECK-LABEL: @test1( ; CHECK-LABEL: @test1(
; CHECK: call void @llvm.memset ; CHECK: call void @llvm.memset
; CHECK-NOT: call void @llvm.memcpy ; CHECK-NOT: call void @llvm.memcpy
; CHECK: ret void ; CHECK: ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memcpy-undef.ll

Show All 38 Lines
; Check that the memcpy is not removed. ; Check that the memcpy is not removed.
; CHECK-LABEL: @test3( ; CHECK-LABEL: @test3(
; CHECK: call void @llvm.memcpy ; CHECK: call void @llvm.memcpy
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memcpy.ll

Show First 20 Lines • Show All 203 Lines • ▼ Show 20 Lines
declare void @f1(%struct.big* nocapture sret) declare void @f1(%struct.big* nocapture sret)
declare void @f2(%struct.big*) declare void @f2(%struct.big*)
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }
; CHECK: attributes #1 = { argmemonly nounwind } ; CHECK: attributes #1 = { argmemonly nounwind }
; CHECK: attributes #2 = { nounwind ssp } ; CHECK: attributes #2 = { nounwind ssp }
; CHECK: attributes #3 = { nounwind ssp uwtable } ; CHECK: attributes #3 = { nounwind ssp uwtable }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memmove.ll

Show All 32 Lines
define void @test3(i8* %P) nounwind { define void @test3(i8* %P) nounwind {
entry: entry:
; CHECK-LABEL: @test3( ; CHECK-LABEL: @test3(
; CHECK: call void @llvm.memmove ; CHECK: call void @llvm.memmove
%add.ptr = getelementptr i8, i8* %P, i64 16 %add.ptr = getelementptr i8, i8* %P, i64 16
tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %P, i8* %add.ptr, i64 17, i32 1, i1 false) tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %P, i8* %add.ptr, i64 17, i32 1, i1 false)
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memset-memcpy-redundant-memset.ll

Show First 20 Lines • Show All 160 Lines • ▼ Show 20 Lines
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1)
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
declare void @llvm.memset.p0i8.i128(i8* nocapture, i8, i128, i32, i1) declare void @llvm.memset.p0i8.i128(i8* nocapture, i8, i128, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i128(i8* nocapture, i8* nocapture readonly, i128, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i128(i8* nocapture, i8* nocapture readonly, i128, i32, i1)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/memset-memcpy-to-2x-memset.ll

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Linesdefine void @test_variable_size_2(i8* %dst1, i8* %dst2, i64 %dst2_size, i8 %c) {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst2, i8* %dst1, i64 %dst2_size, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %dst2, i8* %dst1, i64 %dst2_size, i32 1, i1 false)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1)
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/pr29105.ll

Show All 31 Lines
declare void @llvm.lifetime.end(i64, i8* nocapture) #1 declare void @llvm.lifetime.end(i64, i8* nocapture) #1
declare void @bar(%Foo* noalias nocapture readonly dereferenceable(16384)) unnamed_addr #0 declare void @bar(%Foo* noalias nocapture readonly dereferenceable(16384)) unnamed_addr #0
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1) #1 declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i32, i1) #1
attributes #0 = { uwtable } attributes #0 = { uwtable }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/profitable-memset.ll

Show All 12 Linesentry:
%1 = bitcast i16* %arrayidx to i32* %1 = bitcast i16* %arrayidx to i32*
%arrayidx1 = getelementptr inbounds i16, i16* %0, i64 3 %arrayidx1 = getelementptr inbounds i16, i16* %0, i64 3
store i16 0, i16* %0, align 2 store i16 0, i16* %0, align 2
store i32 0, i32* %1, align 4 store i32 0, i32* %1, align 4
store i16 0, i16* %arrayidx1, align 2 store i16 0, i16* %arrayidx1, align 2
ret void ret void
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/MemCpyOpt/sret.ll

Show All 22 Linesentry:
%agg.result15 = bitcast %0* %agg.result to i8* %agg.result15 = bitcast %0* %agg.result to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %agg.result15, i8* %memtmp14, i32 32, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %agg.result15, i8* %memtmp14, i32 32, i32 16, i1 false)
ret void ret void
} }
declare void @ccoshl(%0* noalias nocapture sret, %0* byval) nounwind declare void @ccoshl(%0* noalias nocapture sret, %0* byval) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/PhaseOrdering/basic.ll

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Linesentry:
%sub = sub i32 %0, %mul %sub = sub i32 %0, %mul
ret i32 %sub ret i32 %sub
; CHECK-LABEL: @test2( ; CHECK-LABEL: @test2(
; CHECK: %div = lshr i32 %a, 2 ; CHECK: %div = lshr i32 %a, 2
; CHECK: %add = shl nuw nsw i32 %div, 1 ; CHECK: %add = shl nuw nsw i32 %div, 1
; CHECK: ret i32 0 ; CHECK: ret i32 0
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/SCCP/calltest.ll

Show All 23 Lines
} }
define i32 @test_1() { define i32 @test_1() {
; CHECK-LABEL: @test_1( ; CHECK-LABEL: @test_1(
; CHECK: call %empty @has_side_effects() ; CHECK: call %empty @has_side_effects()
%1 = call %empty @has_side_effects() %1 = call %empty @has_side_effects()
ret i32 0 ret i32 0
} }
!llvm.module.flags = !{!0}
!0 = !{i32 4, !"hosted", i32 1}

llvm/test/Transforms/Util/combine-alias-scope-metadata.ll

Show All 16 Lines
!0 = !{!0} !0 = !{!0}
!1 = distinct !{!1, !0, !"in"} !1 = distinct !{!1, !0, !"in"}
!2 = distinct !{!2, !0, !"tmp"} !2 = distinct !{!2, !0, !"tmp"}
!3 = distinct !{!3, !0, !"tmp2"} !3 = distinct !{!3, !0, !"tmp2"}
!4 = distinct !{!1, !2} !4 = distinct !{!1, !2}
!5 = distinct !{!2, !3} !5 = distinct !{!2, !3}
!6 = distinct !{!1, !2} !6 = distinct !{!1, !2}
!llvm.module.flags = !{!7}
!7 = !{i32 4, !"hosted", i32 1}

llvm/tools/llc/llc.cpp

Show First 20 Lines • Show All 421 Lines • ▼ Show 20 Linesstatic int compileModule(char **argv, LLVMContext &Context) {
std::unique_ptr<tool_output_file> Out = std::unique_ptr<tool_output_file> Out =
GetOutputStream(TheTarget->getName(), TheTriple.getOS(), argv[0]); GetOutputStream(TheTarget->getName(), TheTriple.getOS(), argv[0]);
if (!Out) return 1; if (!Out) return 1;
// Build up all of the passes that we want to do to the module. // Build up all of the passes that we want to do to the module.
legacy::PassManager PM; legacy::PassManager PM;
// Add an appropriate TargetLibraryInfo pass for the module's triple. // Add an appropriate TargetLibraryInfo pass for the module's triple.
TargetLibraryInfoImpl TLII(Triple(M->getTargetTriple())); TargetLibraryInfoImpl TLII(*M);
// The -disable-simplify-libcalls flag actually disables all builtin optzns. // The -disable-simplify-libcalls flag actually disables all builtin optzns.
if (DisableSimplifyLibCalls) if (DisableSimplifyLibCalls)
TLII.disableAllFunctions(); TLII.disableAllFunctions();
PM.add(new TargetLibraryInfoWrapperPass(TLII)); PM.add(new TargetLibraryInfoWrapperPass(TLII));
// Add the target data from the target machine, if it exists, or the module. // Add the target data from the target machine, if it exists, or the module.
M->setDataLayout(Target->createDataLayout()); M->setDataLayout(Target->createDataLayout());
▲ Show 20 Lines • Show All 121 Lines • Show Last 20 Lines

llvm/tools/opt/opt.cpp

Show First 20 Lines • Show All 522 Lines • ▼ Show 20 Lines#endif
} }
// Create a PassManager to hold and optimize the collection of passes we are // Create a PassManager to hold and optimize the collection of passes we are
// about to build. // about to build.
// //
legacy::PassManager Passes; legacy::PassManager Passes;
// Add an appropriate TargetLibraryInfo pass for the module's triple. // Add an appropriate TargetLibraryInfo pass for the module's triple.
TargetLibraryInfoImpl TLII(ModuleTriple); TargetLibraryInfoImpl TLII(*M);
// The -disable-simplify-libcalls flag actually disables all builtin optzns. // The -disable-simplify-libcalls flag actually disables all builtin optzns.
if (DisableSimplifyLibCalls) if (DisableSimplifyLibCalls)
TLII.disableAllFunctions(); TLII.disableAllFunctions();
Passes.add(new TargetLibraryInfoWrapperPass(TLII)); Passes.add(new TargetLibraryInfoWrapperPass(TLII));
// Add an appropriate DataLayout instance for this module. // Add an appropriate DataLayout instance for this module.
const DataLayout &DL = M->getDataLayout(); const DataLayout &DL = M->getDataLayout();
▲ Show 20 Lines • Show All 221 Lines • Show Last 20 Lines