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tstellarAMD (Tom Stellard)Disabled
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Dec 3 2014, 1:14 PM (245 w, 5 d)
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Feb 3 2017

tstellarAMD added a comment to D24930: libclc: Remove code that is not licensed under either the UIUC or MIT license.

Why is this necessary? is the explicit mention of "merge ... sublicense and/or sell" the dealbraker?

The license is not an approved license for LLVM projects. If we want to add it back, we need to ask for an exception for this license from the LLVM foundation.

Is there a description how to do that? has the process been started?
Is there an alternative implementation with compatible license?

Feb 3 2017, 11:53 AM
tstellarAMD added inline comments to D29473: [AMDGPU] Unroll preferences improvements.
Feb 3 2017, 8:33 AM
tstellarAMD added inline comments to D29473: [AMDGPU] Unroll preferences improvements.
Feb 3 2017, 6:39 AM
tstellarAMD added a comment to D24930: libclc: Remove code that is not licensed under either the UIUC or MIT license.

Why is this necessary? is the explicit mention of "merge ... sublicense and/or sell" the dealbraker?

Feb 3 2017, 6:07 AM

Feb 2 2017

tstellarAMD added a comment to D20116: Add speculatable function attribute.

LGTM. But let's wait a little to give a change to @sanjoy or @chandlerc to comment if they feel the need.

I repeat here one of the important earlier comment from @tstellarAMD , since it is not in the description and easy to miss:

I added two new Intrinsic attributes IntrNoSideEffects and IntrHasSideEffects,
which make it possible to specify all the possible memory interaction / side effect
combinations. With these properties in place, it should be possible in the future
to drop the 'no side effect' portion of the intrinsic memory properties once targets
have been updated to use these new properties.
Feb 2 2017, 12:19 PM
tstellarAMD updated the diff for D24929: libclc: Remove copyright headers from top of files.

Add some build fixes from awatry.

Feb 2 2017, 9:53 AM
tstellarAMD updated the diff for D24930: libclc: Remove code that is not licensed under either the UIUC or MIT license.

Also remove tgamma which calls lgamma.

Feb 2 2017, 9:51 AM
tstellarAMD updated the diff for D29452: AMDGPU/SI: DAGMutation for removing deps between CSEs.

Correctly remove predecessors and clean up some of the loops.

Feb 2 2017, 9:15 AM
tstellarAMD created D29452: AMDGPU/SI: DAGMutation for removing deps between CSEs.
Feb 2 2017, 7:07 AM

Feb 1 2017

tstellarAMD accepted D20552: AMDGPU: Allow clustering flat memory operations.
Feb 1 2017, 10:59 AM
tstellarAMD added a comment to D28993: AMDGPU: Try to select SMEM opcodes for llvm.amdgcn.buffer.load.

Another possible issue is that SMEM instructions ignore bits of the resource descriptor. So you would need some way to tell the compiler that it wouldn't be ignoring some relevant resource bits by selecting to SMEM.

Feb 1 2017, 10:16 AM
tstellarAMD added a comment to D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.

Would you please describe the purpose of this patch? It's not obvious why it's useful.

Feb 1 2017, 9:59 AM
tstellarAMD updated the diff for D20116: Add speculatable function attribute.

Update definition in LangReg.

Feb 1 2017, 9:35 AM
tstellarAMD added a comment to D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.

I haven't looked in too much detail yet. I assume getelementptr doesn't work with these pointers, so it would be good to have a negative test which ensures that GEP use fails.

Feb 1 2017, 3:56 AM

Jan 31 2017

tstellarAMD added a comment to D28993: AMDGPU: Try to select SMEM opcodes for llvm.amdgcn.buffer.load.

What if something else has written to the buffer in the same shader? That would make using smem instructions illegal.

Jan 31 2017, 5:37 PM
tstellarAMD abandoned D6820: Add LLVMSetTargetMachineMCOption() to the C API.
Jan 31 2017, 5:36 PM
tstellarAMD added a comment to D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.

How is this different from using amdgcn.buffer.load if D28993 lands (which is not certain)?

I don't think it's legal to select amdgcn.buffer.load to SMRD unless you can prove that it is uniform. llvm.amdgcn.s.buffer.load is known to always be uniform.

Jan 31 2017, 4:54 PM
tstellarAMD added a comment to D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.

How is this different from using amdgcn.buffer.load if D28993 lands (which is not certain)?

Jan 31 2017, 4:34 PM
tstellarAMD created D29342: TableGen: Add support for intrinsic patterns with vAny.
Jan 31 2017, 11:49 AM
tstellarAMD added inline comments to D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.
Jan 31 2017, 11:46 AM
tstellarAMD updated the diff for D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.

More test cases and rebase on top of latest master.

Jan 31 2017, 11:44 AM
tstellarAMD accepted D28784: AMDGPU: Check users in fneg/fabs select combine.
Jan 31 2017, 10:51 AM
tstellarAMD accepted D28783: AMDGPU: Check if users of fneg can fold mods.
Jan 31 2017, 10:50 AM
tstellarAMD created D29325: AMDGPU/SI: Attempt to fix inst-select-load-smrd.mir on some builds.
Jan 31 2017, 6:20 AM
tstellarAMD updated the diff for D24929: libclc: Remove copyright headers from top of files.

Fix gen_convert.py and add LLVM file headers to all files.

Jan 31 2017, 5:01 AM
tstellarAMD updated the diff for D24930: libclc: Remove code that is not licensed under either the UIUC or MIT license.

Remove lgamma functions too.

Jan 31 2017, 2:21 AM

Jan 30 2017

tstellarAMD accepted D29302: AMDGPU: Allow sinking of addressing modes for atomic_inc/dec.

LGTM.

Jan 30 2017, 3:23 PM
tstellarAMD abandoned D13808: ELF: Add AMDGPU relocation types.
Jan 30 2017, 3:20 PM
tstellarAMD accepted D28936: AMDGPU: Always allocate emergency stack slot at offset 0.

LGTM.

Jan 30 2017, 3:18 PM
tstellarAMD accepted D28833: AMDGPU: Generalize matching of v_med3_f32.

LGTM.

Jan 30 2017, 3:16 PM
tstellarAMD accepted D28886: AMDGPU: Use source mods with fcanonicalize.

LGTM.

Jan 30 2017, 3:15 PM
tstellarAMD accepted D28912: AMDGPU: Fold fneg into fmin/fmax_legacy.

LGTM.

Jan 30 2017, 4:19 AM
tstellarAMD accepted D28063: AMDGPU: Make i32 uaddo/usubo legal.

LGTM.

Jan 30 2017, 4:18 AM
tstellarAMD accepted D29187: AMDGPU: Implement hook for InferAddressSpaces.

LGTM.

Jan 30 2017, 4:01 AM
tstellarAMD accepted D29070: AMDGPU: Run AMDGPUCodeGenPrepare after inlining.

LGTM.

Jan 30 2017, 4:00 AM
tstellarAMD accepted D29210: AMDGPU: Fix atomic_inc/atomic_dec + ds_swizzle not being divergent.

LGTM.

Jan 30 2017, 4:00 AM

Jan 27 2017

tstellarAMD updated the diff for D29049: TableGen: Fix infinite recursion in RegisterBankEmitter.

Keep track of visited register class and make sure that equivalent register
classes are both added to the CoverageData.

Jan 27 2017, 1:44 PM

Jan 24 2017

tstellarAMD added inline comments to D29068: AMDGPU/SI: Move some ISel helpers into utils so they can be shared with GISel.
Jan 24 2017, 6:56 PM
tstellarAMD added reviewers for D29105: Fix regalloc assignment of overlapping registers: MatzeB, qcolombet.
Jan 24 2017, 5:10 PM
tstellarAMD updated the diff for D26730: AMDGPU/GlobalISel: Add support for simple shaders.

Rebase on top of master.

Jan 24 2017, 7:03 AM

Jan 23 2017

tstellarAMD created D29068: AMDGPU/SI: Move some ISel helpers into utils so they can be shared with GISel.
Jan 23 2017, 7:06 PM
tstellarAMD created D29049: TableGen: Fix infinite recursion in RegisterBankEmitter.
Jan 23 2017, 2:24 PM
tstellarAMD accepted D28787: AMDGPU: Propagate fast math flags in fneg combines.

LGTM.

Jan 23 2017, 9:18 AM
tstellarAMD accepted D28995: AMDGPU: Remove a useless VI SMRD pattern.
Jan 23 2017, 8:10 AM

Dec 22 2016

tstellarAMD accepted D27822: AMDGPU: Constant fold when immediate is materialized.

LGTM.

Dec 22 2016, 8:33 AM
tstellarAMD accepted D27881: AMDGPU: Custom lower more vector operations.

LGTM.

Dec 22 2016, 8:31 AM
tstellarAMD accepted D27882: AMDGPU: Use i16 for i16 shift amount.

LGTM.

Dec 22 2016, 8:29 AM
tstellarAMD accepted D27886: AMDGPU: Fix missing 16-bit cmpx instructions.

LGTM.

Dec 22 2016, 8:27 AM

Dec 21 2016

tstellarAMD added a comment to D27964: AMDGPU/R600: Serialize vector trunc stores to private AS.

Why are all the test changes for local memory read/write, when the code changes behavior for private memory stores?

Dec 21 2016, 7:26 PM
tstellarAMD accepted D27884: AMDGPU: Use i16 comparison instructions.

LGTM.

Dec 21 2016, 6:56 PM
tstellarAMD accepted D27887: AMDGPU: Fix missing commute table entries for cmpx.

LGTM.

Dec 21 2016, 6:55 PM
tstellarAMD accepted D27888: AMDGPU: Implement isFMAFasterThanFMulAndFAdd for f16.

LGTM.

Dec 21 2016, 6:54 PM
tstellarAMD accepted D27889: AMDGPU: Enable some f32 fadd/fsub combines for f16.

LGTM.

Dec 21 2016, 6:52 PM
tstellarAMD accepted D27891: AMDGPU: Implement f16 fcanonicalize.

LGTM.

Dec 21 2016, 6:52 PM
tstellarAMD accepted D27892: AMDGPU: Update isFPImmLegal for f16.

LGTM.

Dec 21 2016, 6:51 PM
tstellarAMD accepted D27895: AMDGPU: Move combines into separate functions.

LGTM.

Dec 21 2016, 6:50 PM
tstellarAMD accepted D27903: AMDGPU: Form more FMAs if fusion is allowed.

LGTM.

Dec 21 2016, 6:49 PM
tstellarAMD accepted D27904: AMDGPU: Check fast math flags in fadd/fsub combines .

LGTM.

Dec 21 2016, 6:47 PM
tstellarAMD accepted D27914: AMDGPU: Custom lower f16 fdiv.

LGTM.

Dec 21 2016, 6:46 PM
tstellarAMD accepted D27989: AMDGPU: split ret/noret patterns for global atomics.

LGTM.

Dec 21 2016, 6:44 PM
tstellarAMD accepted D28004: AMDGPU: Invert cmp + select with constant.

LGTM.

Dec 21 2016, 6:40 PM
tstellarAMD added inline comments to D26730: AMDGPU/GlobalISel: Add support for simple shaders.
Dec 21 2016, 3:34 PM
tstellarAMD updated the diff for D26730: AMDGPU/GlobalISel: Add support for simple shaders.

Address review comments.

Dec 21 2016, 3:34 PM

Dec 20 2016

tstellarAMD accepted D27864: AMDGPU: Don't add same instruction multiple times to worklist.

LGTM.

Dec 20 2016, 10:30 AM
tstellarAMD accepted D27890: AMDGPU: Run fp combine tests on VI.

LGTM.

Dec 20 2016, 10:17 AM
tstellarAMD added inline comments to D27834: AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.*.
Dec 20 2016, 8:36 AM

Dec 19 2016

tstellarAMD accepted D27905: AMDGPU: Swap order of operands in fadd/fsub combine .

LGTM.

Dec 19 2016, 2:21 PM
tstellarAMD accepted D27927: AMDGPU: Allow rcp and rsq usage with f16.

LGTM.

Dec 19 2016, 2:20 PM
tstellarAMD accepted D27929: AMDGPU: Allow 16-bit types in inline asm constraints.

LGTM.

Dec 19 2016, 2:20 PM

Dec 15 2016

tstellarAMD accepted D27708: AMDGPU: Fix name for v_ashrrev_i16.

LGTM.

Dec 15 2016, 5:08 PM
tstellarAMD retitled D27834: AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.* from to AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.*.
Dec 15 2016, 5:04 PM
tstellarAMD added a reviewer for D27725: [AMDGPU] When unifying metadata, add operands to named metadata individually: rampitec.
Dec 15 2016, 4:04 PM
tstellarAMD accepted D27702: AMDGPU: Fix asserting on returned tail calls.

LGTM.

Dec 15 2016, 12:23 PM
tstellarAMD accepted D27665: AMDGPU: Assembler support for vintrp instructions.

LGTM.

Dec 15 2016, 12:21 PM

Dec 14 2016

tstellarAMD added inline comments to D27750: Fix for regression after Global Load Scalarization patch.
Dec 14 2016, 7:55 AM
tstellarAMD accepted D27262: Add front() method to SetVector..

LGTM.

Dec 14 2016, 7:53 AM
tstellarAMD accepted D27663: AMDGPU: Change vintrp printing.

LGTM.

Dec 14 2016, 7:48 AM
tstellarAMD accepted D27732: [AMDGPU] Do not emit .AMDGPU.config section for amdhsa.

LGTM.

Dec 14 2016, 7:47 AM
tstellarAMD added reviewers for D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic: mareko, nhaehnle.
Dec 14 2016, 7:29 AM
tstellarAMD added inline comments to D27750: Fix for regression after Global Load Scalarization patch.
Dec 14 2016, 6:58 AM

Dec 13 2016

tstellarAMD added a comment to D26730: AMDGPU/GlobalISel: Add support for simple shaders.

Ping.

Dec 13 2016, 8:12 AM

Dec 9 2016

tstellarAMD accepted D27623: AMDGPU: Change vintrp printing to better match sc.

LGTM.

Dec 9 2016, 4:18 PM
tstellarAMD accepted D27626: AMDGPU: Fix vintrp disassembly.

LGTM.

Dec 9 2016, 4:18 PM
tstellarAMD accepted D27639: AMDGPU: Fix AMDGPUPromoteAlloca breaking addrspacecasts.

LGTM.

Dec 9 2016, 4:17 PM
tstellarAMD added a comment to D27536: AMDGPU/SI: Add a MachineMemOperand to MIMG instructions.

I thought we needed D13575 for this

Dec 9 2016, 12:55 PM
tstellarAMD updated the diff for D27536: AMDGPU/SI: Add a MachineMemOperand to MIMG instructions.

Add test and address other comment.

Dec 9 2016, 12:54 PM
tstellarAMD accepted D27487: AMDGPU: Allow TBA, TMA, TTMP* registers with SMEM instructions.

LGTM.

Dec 9 2016, 8:11 AM
tstellarAMD accepted D27505: AMDGPU: Clean up instruction bits.

LGTM.

Dec 9 2016, 8:10 AM
tstellarAMD accepted D27588: AMDGPU: Fix i128 mul.

LGTM.

Dec 9 2016, 8:08 AM
tstellarAMD accepted D27601: AMDGPU: Fix isTypeDesirableForOp for i16.

LGTM.

Dec 9 2016, 8:08 AM
tstellarAMD added a comment to D27593: AMDGPU/SI: Don't mark VINTRP instructions as mayLoad.

what about adding a readonly mem operand?

Dec 9 2016, 3:59 AM

Dec 8 2016

tstellarAMD retitled D27593: AMDGPU/SI: Don't mark VINTRP instructions as mayLoad from to AMDGPU/SI: Don't mark VINTRP instructions as mayLoad.
Dec 8 2016, 2:04 PM
tstellarAMD retitled D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic from to AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic.
Dec 8 2016, 11:49 AM
tstellarAMD accepted D27150: AMDGPU/SI: Don't reserve FLAT_SCRATCH on non-HSA targets.

LGTM.

Dec 8 2016, 10:30 AM
tstellarAMD accepted D27572: AMDGPU: llvm.amdgcn.interp.mov is a source of divergence.

Thanks for catching this. LGTM.

Dec 8 2016, 7:11 AM

Dec 7 2016

tstellarAMD retitled D27563: TTI: Add comment clarifying the meaning of MemIntrinsicInfo::PtrVal from to TTI: Add comment clarifying the meaning of MemIntrinsicInfo::PtrVal.
Dec 7 2016, 7:48 PM
tstellarAMD accepted D27532: Remove a special handling of AMDGPU entry points..

LGTM.

Dec 7 2016, 7:14 PM
tstellarAMD accepted D27533: AMDGPU: Make AllocationPriority of SGPRs higher than VGPRs.

LGTM.

Dec 7 2016, 1:23 PM
tstellarAMD retitled D27536: AMDGPU/SI: Add a MachineMemOperand to MIMG instructions from to AMDGPU/SI: Add a MachineMemOperand to MIMG instructions.
Dec 7 2016, 1:14 PM

Dec 6 2016

tstellarAMD accepted D27379: AMDGPU: Fix crash on i16 constant expression.

LGTM.

Dec 6 2016, 3:21 PM