This is an archive of the discontinued LLVM Phabricator instance.

Differential D157630

[LoopVectorize] Pre-commit tests for D157631
ClosedPublic

Authored by igor.kirillov on Aug 10 2023, 9:08 AM.

Details

Reviewers
huntergr
david-arm
fhahn
Commits
rG2df9ed11c51e: [LoopVectorize] Pre-commit tests for D157631

Diff Detail

Event Timeline

igor.kirillov created this revision.Aug 10 2023, 9:08 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 10 2023, 9:08 AM
Herald added subscribers: artagnon, mgabka, shiva0217. · View Herald Transcript
igor.kirillov requested review of this revision.Aug 10 2023, 9:08 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 10 2023, 9:08 AM
Herald added subscribers: llvm-commits, wangpc. · View Herald Transcript
igor.kirillov added a child revision: D157631: [LoopVectorize] Fix incorrect order of invariant stores when there are multiple reductions..Aug 10 2023, 9:10 AM
Harbormaster completed remote builds in B251714: Diff 549069.Aug 10 2023, 2:29 PM
igor.kirillov added reviewers: huntergr, david-arm.Aug 11 2023, 1:47 AM
fhahn accepted this revision.Aug 11 2023, 7:05 AM
fhahn added a subscriber: fhahn.

LGTM, thanks!

This revision is now accepted and ready to land.Aug 11 2023, 7:05 AM
Herald added a subscriber: StephenFan. · View Herald TranscriptAug 11 2023, 7:05 AM
fhahn added inline comments.Aug 11 2023, 7:11 AM
llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
562

It would be good to include a reference to https://github.com/llvm/llvm-project/issues/64047 here

igor.kirillov updated this revision to Diff 550242.Aug 15 2023, 3:42 AM
igor.kirillov marked an inline comment as done.

Added reference to the github issue

Harbormaster completed remote builds in B252573: Diff 550242.Aug 15 2023, 4:09 AM
igor.kirillov updated this revision to Diff 554322.Aug 29 2023, 7:19 AM
igor.kirillov retitled this revision from [LoopVectorize] Pre-commit tests for the fix of incorrect order of invariant stores. to [LoopVectorize] Pre-commit tests for D157631.

Add tests with different store pointers

Herald added a subscriber: sunshaoce. · View Herald TranscriptAug 29 2023, 7:19 AM
Harbormaster completed remote builds in B255517: Diff 554322.Aug 29 2023, 10:21 AM
Closed by commit rG2df9ed11c51e: [LoopVectorize] Pre-commit tests for D157631 (authored by igor.kirillov). · Explain WhyAug 31 2023, 2:51 AM
This revision was automatically updated to reflect the committed changes.
igor.kirillov added a commit: rG2df9ed11c51e: [LoopVectorize] Pre-commit tests for D157631.

Revision Contents

PathSize
llvm/
test/
Transforms/
LoopVectorize/
121 lines

Diff 554953

llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll

Show First 20 Lines • Show All 550 Lines • ▼ Show 20 Linesfor.body: ; preds = %for.body, %entry
%iv.next = add nuw nsw i64 %iv, 1 %iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000 %exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %exit, label %for.body br i1 %exitcond, label %exit, label %for.body
exit: ; preds = %for.body exit: ; preds = %for.body
%add.lcssa = phi i32 [ %add, %for.body ] %add.lcssa = phi i32 [ %add, %for.body ]
ret i32 %add.lcssa ret i32 %add.lcssa
} }
; Make sure that if there are several reductions in the loop, the order of invariant stores sank outside of the loop is preserved
; FIXME: This tests currently shows incorrect behavior and it will fixed in the following patch
; See https://github.com/llvm/llvm-project/issues/64047
fhahnUnsubmitted
Done
ReplyInline Actions

It would be good to include a reference to https://github.com/llvm/llvm-project/issues/64047 here

fhahn: It would be good to include a reference to https://github.com/llvm/llvm-project/issues/64047…
define void @reduc_add_mul_store_same_ptr(ptr %dst, ptr readonly %src) {
; CHECK-LABEL: define void @reduc_add_mul_store_same_ptr
; CHECK: middle.block:
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[TMP1:%.*]])
; CHECK-NEXT: store i32 [[TMP2]], ptr %dst, align 4
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP3:%.*]])
; CHECK-NEXT: store i32 [[TMP4]], ptr %dst, align 4
;
entry:
br label %for.body
for.body:
%sum = phi i32 [ 0, %entry ], [ %sum.next, %for.body ]
%mul = phi i32 [ 1, %entry ], [ %mul.next, %for.body ]
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
%gep.src = getelementptr inbounds i32, ptr %src, i64 %iv
%0 = load i32, ptr %gep.src, align 4
%sum.next = add nsw i32 %sum, %0
store i32 %sum.next, ptr %dst, align 4
%mul.next = mul nsw i32 %mul, %0
store i32 %mul.next, ptr %dst, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %exit, label %for.body
exit:
ret void
}
define void @reduc_mul_add_store_same_ptr(ptr %dst, ptr readonly %src) {
; CHECK-LABEL: define void @reduc_mul_add_store_same_ptr
; CHECK: middle.block:
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[TMP1:%.*]])
; CHECK-NEXT: store i32 [[TMP2]], ptr %dst, align 4
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP3:%.*]])
; CHECK-NEXT: store i32 [[TMP4]], ptr %dst, align 4
;
entry:
br label %for.body
for.body:
%sum = phi i32 [ 0, %entry ], [ %sum.next, %for.body ]
%mul = phi i32 [ 1, %entry ], [ %mul.next, %for.body ]
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
%gep.src = getelementptr inbounds i32, ptr %src, i64 %iv
%0 = load i32, ptr %gep.src, align 4
%mul.next = mul nsw i32 %mul, %0
store i32 %mul.next, ptr %dst, align 4
%sum.next = add nsw i32 %sum, %0
store i32 %sum.next, ptr %dst, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %exit, label %for.body
exit:
ret void
}
; Same as above but storing is done to two different pointers and they can be aliased
; FIXME: This tests currently shows incorrect behavior and it will fixed in the following patch
define void @reduc_add_mul_store_different_ptr(ptr %dst1, ptr %dst2, ptr readonly %src) {
; CHECK-LABEL: define void @reduc_add_mul_store_different_ptr
; CHECK: middle.block:
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[TMP1:%.*]])
; CHECK-NEXT: store i32 [[TMP2]], ptr %dst2, align 4
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP3:%.*]])
; CHECK-NEXT: store i32 [[TMP4]], ptr %dst1, align 4
;
entry:
br label %for.body
for.body:
%sum = phi i32 [ 0, %entry ], [ %sum.next, %for.body ]
%mul = phi i32 [ 1, %entry ], [ %mul.next, %for.body ]
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
%gep.src = getelementptr inbounds i32, ptr %src, i64 %iv
%0 = load i32, ptr %gep.src, align 4
%sum.next = add nsw i32 %sum, %0
store i32 %sum.next, ptr %dst1, align 4
%mul.next = mul nsw i32 %mul, %0
store i32 %mul.next, ptr %dst2, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %exit, label %for.body
exit:
ret void
}
define void @reduc_mul_add_store_different_ptr(ptr %dst1, ptr %dst2, ptr readonly %src) {
; CHECK-LABEL: define void @reduc_mul_add_store_different_ptr
; CHECK: middle.block:
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> [[TMP1:%.*]])
; CHECK-NEXT: store i32 [[TMP2]], ptr %dst1, align 4
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[TMP3:%.*]])
; CHECK-NEXT: store i32 [[TMP4]], ptr %dst2, align 4
;
entry:
br label %for.body
for.body:
%sum = phi i32 [ 0, %entry ], [ %sum.next, %for.body ]
%mul = phi i32 [ 1, %entry ], [ %mul.next, %for.body ]
%iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
%gep.src = getelementptr inbounds i32, ptr %src, i64 %iv
%0 = load i32, ptr %gep.src, align 4
%mul.next = mul nsw i32 %mul, %0
store i32 %mul.next, ptr %dst1, align 4
%sum.next = add nsw i32 %sum, %0
store i32 %sum.next, ptr %dst2, align 4
%iv.next = add nuw nsw i64 %iv, 1
%exitcond = icmp eq i64 %iv.next, 1000
br i1 %exitcond, label %exit, label %for.body
exit:
ret void
}