[SVE] Expand scalable vector ISD::BITCASTs when targeting big-endian.

[paulwalker-arm]

Summary

Whilst sub-optimial, it's better than the current selection failure.

Fixes: #64406

[efriedma]

Ideally, we want to turn this into a vector shuffle, but this seems fine as a stopgap.

[dmgreen]

Have you considered the rest of big endian for SVE? My understanding was that it has been mostly ignored up to this point, and that there might be other combines that are making little endian assumptions. Anything that uses a bitcast could be wrong if it changes the element size.

[paulwalker-arm]

In D157406#4574581, @dmgreen wrote:

Have you considered the rest of big endian for SVE? My understanding was that it has been mostly ignored up to this point, and that there might be other combines that are making little endian assumptions. Anything that uses a bitcast could be wrong if it changes the element size.

During initial SVE bring up we did attempt to make the implementation either big endian clean or a user visible error. However, without any real testing I can imagine there are places where this has regressed. I've no plans to actively pipe clean full big endian support, I just spotted the bug report and figured I'd reduce the barrier to others and perhaps that'll prompt more testing and reporting.

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

for (auto VT : {MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64}) {
       setOperationAction(ISD::SREM, VT, Expand);
       setOperationAction(ISD::SDIVREM, VT, Expand);
       setOperationAction(ISD::UDIVREM, VT, Expand);
 
       setOperationAction(ISD::AVGFLOORS, VT, Custom);
       setOperationAction(ISD::AVGFLOORU, VT, Custom);
       setOperationAction(ISD::AVGCEILS, VT, Custom);
       setOperationAction(ISD::AVGCEILU, VT, Custom);
+
+      if (!Subtarget->isLittleEndian())
+        setOperationAction(ISD::BITCAST, VT, Expand);
     }
 
     // Illegal unpacked integer vector types.
     for (auto VT : {MVT::nxv8i8, MVT::nxv4i16, MVT::nxv2i32}) {
       setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);
       setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom);
     }
 
for (auto VT : {MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv2f32,
       setCondCodeAction(ISD::SETOLE, VT, Expand);
       setCondCodeAction(ISD::SETLE, VT, Expand);
       setCondCodeAction(ISD::SETULT, VT, Expand);
       setCondCodeAction(ISD::SETULE, VT, Expand);
       setCondCodeAction(ISD::SETUGE, VT, Expand);
       setCondCodeAction(ISD::SETUGT, VT, Expand);
       setCondCodeAction(ISD::SETUEQ, VT, Expand);
       setCondCodeAction(ISD::SETONE, VT, Expand);
+
+      if (!Subtarget->isLittleEndian())
+        setOperationAction(ISD::BITCAST, VT, Expand);
     }
 
     for (auto VT : {MVT::nxv2bf16, MVT::nxv4bf16, MVT::nxv8bf16}) {
       setOperationAction(ISD::CONCAT_VECTORS, VT, Custom);
       setOperationAction(ISD::MGATHER, VT, Custom);
       setOperationAction(ISD::MSCATTER, VT, Custom);
       setOperationAction(ISD::MLOAD, VT, Custom);
       setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom);
       setOperationAction(ISD::SPLAT_VECTOR, VT, Legal);
+
+      if (!Subtarget->isLittleEndian())
+        setOperationAction(ISD::BITCAST, VT, Expand);
     }
 
     setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i8, Custom);
     setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i16, Custom);
 
     // NEON doesn't support integer divides, but SVE does
     for (auto VT : {MVT::v8i8, MVT::v16i8, MVT::v4i16, MVT::v8i16, MVT::v2i32,
                     MVT::v4i32, MVT::v1i64, MVT::v2i64}) {

llvm/test/CodeGen/AArch64/sve-bitcast.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=aarch64-linux-gnu < %s | FileCheck %s
-; RUN: not --crash llc -mtriple=aarch64_be < %s
+; RUN: llc -mtriple=aarch64_be < %s | FileCheck %s --check-prefix=CHECK_BE
 
 ;
 ; bitcast to nxv16i8
 ;
 
 define <vscale x 16 x i8> @bitcast_nxv8i16_to_nxv16i8(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 define <vscale x 16 x i8> @bitcast_nxv4i32_to_nxv16i8(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 define <vscale x 16 x i8> @bitcast_nxv2i64_to_nxv16i8(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 define <vscale x 16 x i8> @bitcast_nxv8f16_to_nxv16i8(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 define <vscale x 16 x i8> @bitcast_nxv4f32_to_nxv16i8(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 define <vscale x 16 x i8> @bitcast_nxv2f64_to_nxv16i8(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 define <vscale x 16 x i8> @bitcast_nxv8bf16_to_nxv16i8(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv16i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv16i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 16 x i8>
   ret <vscale x 16 x i8> %bc
 }
 
 ;
 ; bitcast to nxv8i16
 ;
 
 define <vscale x 8 x i16> @bitcast_nxv16i8_to_nxv8i16(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 define <vscale x 8 x i16> @bitcast_nxv4i32_to_nxv8i16(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 define <vscale x 8 x i16> @bitcast_nxv2i64_to_nxv8i16(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 define <vscale x 8 x i16> @bitcast_nxv8f16_to_nxv8i16(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 define <vscale x 8 x i16> @bitcast_nxv4f32_to_nxv8i16(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 define <vscale x 8 x i16> @bitcast_nxv2f64_to_nxv8i16(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 define <vscale x 8 x i16> @bitcast_nxv8bf16_to_nxv8i16(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv8i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv8i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 8 x i16>
   ret <vscale x 8 x i16> %bc
 }
 
 ;
 ; bitcast to nxv4i32
 ;
 
 define <vscale x 4 x i32> @bitcast_nxv16i8_to_nxv4i32(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 define <vscale x 4 x i32> @bitcast_nxv8i16_to_nxv4i32(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 define <vscale x 4 x i32> @bitcast_nxv2i64_to_nxv4i32(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 define <vscale x 4 x i32> @bitcast_nxv8f16_to_nxv4i32(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 define <vscale x 4 x i32> @bitcast_nxv4f32_to_nxv4i32(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 define <vscale x 4 x i32> @bitcast_nxv2f64_to_nxv4i32(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 define <vscale x 4 x i32> @bitcast_nxv8bf16_to_nxv4i32(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv4i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv4i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 4 x i32>
   ret <vscale x 4 x i32> %bc
 }
 
 ;
 ; bitcast to nxv2i64
 ;
 
 define <vscale x 2 x i64> @bitcast_nxv16i8_to_nxv2i64(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 define <vscale x 2 x i64> @bitcast_nxv8i16_to_nxv2i64(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 define <vscale x 2 x i64> @bitcast_nxv4i32_to_nxv2i64(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 define <vscale x 2 x i64> @bitcast_nxv8f16_to_nxv2i64(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 define <vscale x 2 x i64> @bitcast_nxv4f32_to_nxv2i64(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 define <vscale x 2 x i64> @bitcast_nxv2f64_to_nxv2i64(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 define <vscale x 2 x i64> @bitcast_nxv8bf16_to_nxv2i64(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv2i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv2i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 2 x i64>
   ret <vscale x 2 x i64> %bc
 }
 
 ;
 ; bitcast to nxv8f16
 ;
 
 define <vscale x 8 x half> @bitcast_nxv16i8_to_nxv8f16(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 define <vscale x 8 x half> @bitcast_nxv8i16_to_nxv8f16(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 define <vscale x 8 x half> @bitcast_nxv4i32_to_nxv8f16(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 define <vscale x 8 x half> @bitcast_nxv2i64_to_nxv8f16(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 define <vscale x 8 x half> @bitcast_nxv4f32_to_nxv8f16(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 define <vscale x 8 x half> @bitcast_nxv2f64_to_nxv8f16(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 define <vscale x 8 x half> @bitcast_nxv8bf16_to_nxv8f16(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv8f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv8f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 8 x half>
   ret <vscale x 8 x half> %bc
 }
 
 ;
 ; bitcast to nxv4f32
 ;
 
 define <vscale x 4 x float> @bitcast_nxv16i8_to_nxv4f32(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 define <vscale x 4 x float> @bitcast_nxv8i16_to_nxv4f32(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 define <vscale x 4 x float> @bitcast_nxv4i32_to_nxv4f32(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 define <vscale x 4 x float> @bitcast_nxv2i64_to_nxv4f32(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 define <vscale x 4 x float> @bitcast_nxv8f16_to_nxv4f32(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 define <vscale x 4 x float> @bitcast_nxv2f64_to_nxv4f32(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 define <vscale x 4 x float> @bitcast_nxv8bf16_to_nxv4f32(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv4f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv4f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 4 x float>
   ret <vscale x 4 x float> %bc
 }
 
 ;
 ; bitcast to nxv2f64
 ;
 
 define <vscale x 2 x double> @bitcast_nxv16i8_to_nxv2f64(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 define <vscale x 2 x double> @bitcast_nxv8i16_to_nxv2f64(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 define <vscale x 2 x double> @bitcast_nxv4i32_to_nxv2f64(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 define <vscale x 2 x double> @bitcast_nxv2i64_to_nxv2f64(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 define <vscale x 2 x double> @bitcast_nxv8f16_to_nxv2f64(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 define <vscale x 2 x double> @bitcast_nxv4f32_to_nxv2f64(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 define <vscale x 2 x double> @bitcast_nxv8bf16_to_nxv2f64(<vscale x 8 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8bf16_to_nxv2f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8bf16_to_nxv2f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x bfloat> %v to <vscale x 2 x double>
   ret <vscale x 2 x double> %bc
 }
 
 ;
 ; bitcast to nxv8bf16
 ;
 
 define <vscale x 8 x bfloat> @bitcast_nxv16i8_to_nxv8bf16(<vscale x 16 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv16i8_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv16i8_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 16 x i8> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 define <vscale x 8 x bfloat> @bitcast_nxv8i16_to_nxv8bf16(<vscale x 8 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i16_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i16_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i16> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 define <vscale x 8 x bfloat> @bitcast_nxv4i32_to_nxv8bf16(<vscale x 4 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i32_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i32_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i32> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 define <vscale x 8 x bfloat> @bitcast_nxv2i64_to_nxv8bf16(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i64_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i64_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i64> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 define <vscale x 8 x bfloat> @bitcast_nxv8f16_to_nxv8bf16(<vscale x 8 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8f16_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8f16_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x half> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 define <vscale x 8 x bfloat> @bitcast_nxv4f32_to_nxv8bf16(<vscale x 4 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f32_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f32_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x float> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 define <vscale x 8 x bfloat> @bitcast_nxv2f64_to_nxv8bf16(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f64_to_nxv8bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f64_to_nxv8bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x double> %v to <vscale x 8 x bfloat>
   ret <vscale x 8 x bfloat> %bc
 }
 
 ;
 ; bitcast to nxv8i8
 ;
 
 define <vscale x 8 x i8> @bitcast_nxv4i16_to_nxv8i8(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 define <vscale x 8 x i8> @bitcast_nxv2i32_to_nxv8i8(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 define <vscale x 8 x i8> @bitcast_nxv1i64_to_nxv8i8(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.h, z0.b
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.h, z0.b
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 define <vscale x 8 x i8> @bitcast_nxv4f16_to_nxv8i8(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 define <vscale x 8 x i8> @bitcast_nxv2f32_to_nxv8i8(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 define <vscale x 8 x i8> @bitcast_nxv1f64_to_nxv8i8(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.h, z0.b
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.h, z0.b
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 define <vscale x 8 x i8> @bitcast_nxv4bf16_to_nxv8i8(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv8i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv8i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1b { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 8 x i8>
   ret <vscale x 8 x i8> %bc
 }
 
 ;
 ; bitcast to nxv4i16
 ;
 
 define <vscale x 4 x i16> @bitcast_nxv8i8_to_nxv4i16(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 define <vscale x 4 x i16> @bitcast_nxv2i32_to_nxv4i16(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 define <vscale x 4 x i16> @bitcast_nxv1i64_to_nxv4i16(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 define <vscale x 4 x i16> @bitcast_nxv4f16_to_nxv4i16(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 define <vscale x 4 x i16> @bitcast_nxv2f32_to_nxv4i16(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 define <vscale x 4 x i16> @bitcast_nxv1f64_to_nxv4i16(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 define <vscale x 4 x i16> @bitcast_nxv4bf16_to_nxv4i16(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv4i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv4i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 4 x i16>
   ret <vscale x 4 x i16> %bc
 }
 
 ;
 ; bitcast to nxv2i32
 ;
 
 define <vscale x 2 x i32> @bitcast_nxv8i8_to_nxv2i32(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 define <vscale x 2 x i32> @bitcast_nxv4i16_to_nxv2i32(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 define <vscale x 2 x i32> @bitcast_nxv1i64_to_nxv2i32(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.d, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.d, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 define <vscale x 2 x i32> @bitcast_nxv4f16_to_nxv2i32(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 define <vscale x 2 x i32> @bitcast_nxv2f32_to_nxv2i32(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 define <vscale x 2 x i32> @bitcast_nxv1f64_to_nxv2i32(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.d, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.d, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 define <vscale x 2 x i32> @bitcast_nxv4bf16_to_nxv2i32(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv2i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv2i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bc
 }
 
 ;
 ; bitcast to nxv1i64
 ;
 
 define <vscale x 1 x i64> @bitcast_nxv8i8_to_nxv1i64(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.b, z0.b, z0.b
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    uzp1 z0.b, z0.b, z0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 define <vscale x 1 x i64> @bitcast_nxv4i16_to_nxv1i64(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 define <vscale x 1 x i64> @bitcast_nxv2i32_to_nxv1i64(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.s, z0.s, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    uzp1 z0.s, z0.s, z0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 define <vscale x 1 x i64> @bitcast_nxv4f16_to_nxv1i64(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-3
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ptrue p1.s
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p1/z, [sp]
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #3
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 define <vscale x 1 x i64> @bitcast_nxv2f32_to_nxv1i64(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.s, z0.s, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-3
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ptrue p1.d
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p1/z, [sp]
+; CHECK_BE-NEXT:    uzp1 z0.s, z0.s, z0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p1/z, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #3
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 define <vscale x 1 x i64> @bitcast_nxv1f64_to_nxv1i64(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 define <vscale x 1 x i64> @bitcast_nxv4bf16_to_nxv1i64(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv1i64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv1i64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-3
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ptrue p1.s
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p1/z, [sp]
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #3
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 1 x i64>
   ret <vscale x 1 x i64> %bc
 }
 
 ;
 ; bitcast to nxv4f16
 ;
 
 define <vscale x 4 x half> @bitcast_nxv8i8_to_nxv4f16(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 define <vscale x 4 x half> @bitcast_nxv4i16_to_nxv4f16(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 define <vscale x 4 x half> @bitcast_nxv2i32_to_nxv4f16(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 define <vscale x 4 x half> @bitcast_nxv1i64_to_nxv4f16(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 define <vscale x 4 x half> @bitcast_nxv2f32_to_nxv4f16(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 define <vscale x 4 x half> @bitcast_nxv1f64_to_nxv4f16(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 define <vscale x 4 x half> @bitcast_nxv4bf16_to_nxv4f16(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv4f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv4f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 4 x half>
   ret <vscale x 4 x half> %bc
 }
 
 ;
 ; bitcast to nxv2f32
 ;
 
 define <vscale x 2 x float> @bitcast_nxv8i8_to_nxv2f32(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 define <vscale x 2 x float> @bitcast_nxv4i16_to_nxv2f32(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 define <vscale x 2 x float> @bitcast_nxv2i32_to_nxv2f32(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 define <vscale x 2 x float> @bitcast_nxv1i64_to_nxv2f32(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.d, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.d, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 define <vscale x 2 x float> @bitcast_nxv4f16_to_nxv2f32(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 define <vscale x 2 x float> @bitcast_nxv1f64_to_nxv2f32(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.d, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.d, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 define <vscale x 2 x float> @bitcast_nxv4bf16_to_nxv2f32(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv2f32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv2f32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 2 x float>
   ret <vscale x 2 x float> %bc
 }
 
 ;
 ; bitcast to nxv1f64
 ;
 
 define <vscale x 1 x double> @bitcast_nxv8i8_to_nxv1f64(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.b, z0.b, z0.b
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    uzp1 z0.b, z0.b, z0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 define <vscale x 1 x double> @bitcast_nxv4i16_to_nxv1f64(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 define <vscale x 1 x double> @bitcast_nxv2i32_to_nxv1f64(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.s, z0.s, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    uzp1 z0.s, z0.s, z0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 define <vscale x 1 x double> @bitcast_nxv1i64_to_nxv1f64(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 define <vscale x 1 x double> @bitcast_nxv4f16_to_nxv1f64(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-3
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ptrue p1.s
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p1/z, [sp]
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #3
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 define <vscale x 1 x double> @bitcast_nxv2f32_to_nxv1f64(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.s, z0.s, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-3
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ptrue p1.d
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p1/z, [sp]
+; CHECK_BE-NEXT:    uzp1 z0.s, z0.s, z0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p1/z, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #3
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 define <vscale x 1 x double> @bitcast_nxv4bf16_to_nxv1f64(<vscale x 4 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4bf16_to_nxv1f64:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4bf16_to_nxv1f64:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-3
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ptrue p1.s
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p1/z, [sp]
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp, #2, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #3
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x bfloat> %v to <vscale x 1 x double>
   ret <vscale x 1 x double> %bc
 }
 
 ;
 ; bitcast to nxv4bf16
 ;
 
 define <vscale x 4 x bfloat> @bitcast_nxv8i8_to_nxv4bf16(<vscale x 8 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv8i8_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.h
 ; CHECK-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv8i8_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1b { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 8 x i8> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 define <vscale x 4 x bfloat> @bitcast_nxv4i16_to_nxv4bf16(<vscale x 4 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i16_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i16_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i16> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 define <vscale x 4 x bfloat> @bitcast_nxv2i32_to_nxv4bf16(<vscale x 2 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i32_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i32_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i32> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 define <vscale x 4 x bfloat> @bitcast_nxv1i64_to_nxv4bf16(<vscale x 1 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i64_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i64_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i64> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 define <vscale x 4 x bfloat> @bitcast_nxv4f16_to_nxv4bf16(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4f16_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4f16_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x half> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 define <vscale x 4 x bfloat> @bitcast_nxv2f32_to_nxv4bf16(<vscale x 2 x float> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f32_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f32_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1w { z0.d }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1h { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x float> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 define <vscale x 4 x bfloat> @bitcast_nxv1f64_to_nxv4bf16(<vscale x 1 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1f64_to_nxv4bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1f64_to_nxv4bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x double> %v to <vscale x 4 x bfloat>
   ret <vscale x 4 x bfloat> %bc
 }
 
 ;
 ; bitcast to nxv4i8
 ;
 
 define <vscale x 4 x i8> @bitcast_nxv2i16_to_nxv4i8(<vscale x 2 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i16_to_nxv4i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1b { z0.s }, p0/z, [sp, #3, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i16_to_nxv4i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1b { z0.s }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i16> %v to <vscale x 4 x i8>
   ret <vscale x 4 x i8> %bc
 }
 
 define <vscale x 4 x i8> @bitcast_nxv1i32_to_nxv4i8(<vscale x 1 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i32_to_nxv4i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.h, z0.b
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i32_to_nxv4i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.h, z0.b
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i32> %v to <vscale x 4 x i8>
   ret <vscale x 4 x i8> %bc
 }
 
 define <vscale x 4 x i8> @bitcast_nxv2f16_to_nxv4i8(<vscale x 2 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f16_to_nxv4i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1b { z0.s }, p0/z, [sp, #3, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f16_to_nxv4i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1b { z0.s }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x half> %v to <vscale x 4 x i8>
   ret <vscale x 4 x i8> %bc
 }
 
 ; @bitcast_nxv1f32_to_nxv4i8 is missing
 
 define <vscale x 4 x i8> @bitcast_nxv2bf16_to_nxv4i8(<vscale x 2 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2bf16_to_nxv4i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1b { z0.s }, p0/z, [sp, #3, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2bf16_to_nxv4i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1b { z0.s }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x bfloat> %v to <vscale x 4 x i8>
   ret <vscale x 4 x i8> %bc
 }
 
 ;
 ; bitcast to nxv2i16
 ;
 
 define <vscale x 2 x i16> @bitcast_nxv4i8_to_nxv2i16(<vscale x 4 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i8_to_nxv2i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1b { z0.s }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i8_to_nxv2i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1b { z0.s }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i8> %v to <vscale x 2 x i16>
   ret <vscale x 2 x i16> %bc
 }
 
 define <vscale x 2 x i16> @bitcast_nxv1i32_to_nxv2i16(<vscale x 1 x i32> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i32_to_nxv2i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    uunpklo z0.d, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i32_to_nxv2i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1w { z0.s }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    uunpklo z0.d, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i32> %v to <vscale x 2 x i16>
   ret <vscale x 2 x i16> %bc
 }
 
 define <vscale x 2 x i16> @bitcast_nxv2f16_to_nxv2i16(<vscale x 2 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f16_to_nxv2i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f16_to_nxv2i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x half> %v to <vscale x 2 x i16>
   ret <vscale x 2 x i16> %bc
 }
 
 ; @bitcast_nxv1f32_to_nxv2i16 is missing
 
 define <vscale x 2 x i16> @bitcast_nxv2bf16_to_nxv2i16(<vscale x 2 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2bf16_to_nxv2i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2bf16_to_nxv2i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x bfloat> %v to <vscale x 2 x i16>
   ret <vscale x 2 x i16> %bc
 }
 
 ;
 ; bitcast to nxv1i32
 ;
 
 define <vscale x 1 x i32> @bitcast_nxv4i8_to_nxv1i32(<vscale x 4 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i8_to_nxv1i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    uzp1 z0.b, z0.b, z0.b
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i8_to_nxv1i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    uzp1 z0.b, z0.b, z0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i8> %v to <vscale x 1 x i32>
   ret <vscale x 1 x i32> %bc
 }
 
 define <vscale x 1 x i32> @bitcast_nxv2i16_to_nxv1i32(<vscale x 2 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i16_to_nxv1i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.s, z0.s, z0.s
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i16_to_nxv1i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    uzp1 z0.s, z0.s, z0.s
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i16> %v to <vscale x 1 x i32>
   ret <vscale x 1 x i32> %bc
 }
 
 define <vscale x 1 x i32> @bitcast_nxv2f16_to_nxv1i32(<vscale x 2 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f16_to_nxv1i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1h { z0.d }, p0, [sp]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1w { z0.s }, p0/z, [sp]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f16_to_nxv1i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-2
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #2
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x half> %v to <vscale x 1 x i32>
   ret <vscale x 1 x i32> %bc
 }
 
 ; @bitcast_nxv1f32_to_nxv1i32 is missing
 
 define <vscale x 1 x i32> @bitcast_nxv2bf16_to_nxv1i32(<vscale x 2 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2bf16_to_nxv1i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    st1h { z0.d }, p0, [sp]
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    ld1w { z0.s }, p0/z, [sp]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2bf16_to_nxv1i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-2
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    ld1w { z0.s }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #2
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x bfloat> %v to <vscale x 1 x i32>
   ret <vscale x 1 x i32> %bc
 }
 
 ;
 ; bitcast to nxv2f16
 ;
 
 define <vscale x 2 x half> @bitcast_nxv4i8_to_nxv2f16(<vscale x 4 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv4i8_to_nxv2f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1b { z0.s }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i8_to_nxv2f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1b { z0.s }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i8> %v to <vscale x 2 x half>
   ret <vscale x 2 x half> %bc
 }
 
 define <vscale x 2 x half> @bitcast_nxv2i16_to_nxv2f16(<vscale x 2 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i16_to_nxv2f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i16_to_nxv2f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i16> %v to <vscale x 2 x half>
   ret <vscale x 2 x half> %bc
 }
 
 ; @bitcast_nxv1i32_to_nxv2f16 is missing
 ; @bitcast_nxv1f32_to_nxv2f16 is missing
 
 define <vscale x 2 x half> @bitcast_nxv2bf16_to_nxv2f16(<vscale x 2 x bfloat> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2bf16_to_nxv2f16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2bf16_to_nxv2f16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x bfloat> %v to <vscale x 2 x half>
   ret <vscale x 2 x half> %bc
 }
 
 ;
 ; bitcast to nxv1f32
 ;
 

 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    st1b { z0.s }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv4i8_to_nxv2bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    st1b { z0.s }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 4 x i8> %v to <vscale x 2 x bfloat>
   ret <vscale x 2 x bfloat> %bc
 }
 
 define <vscale x 2 x bfloat> @bitcast_nxv2i16_to_nxv2bf16(<vscale x 2 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i16_to_nxv2bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i16_to_nxv2bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i16> %v to <vscale x 2 x bfloat>
   ret <vscale x 2 x bfloat> %bc
 }
 
 ; @bitcast_nxv1i32_to_nxv2bf16 is missing
 
 define <vscale x 2 x bfloat> @bitcast_nxv2f16_to_nxv2bf16(<vscale x 2 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2f16_to_nxv2bf16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2f16_to_nxv2bf16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    st1h { z0.d }, p0, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    ld1h { z0.d }, p0/z, [sp, #3, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x half> %v to <vscale x 2 x bfloat>
   ret <vscale x 2 x bfloat> %bc
 }
 
 ; @bitcast_nxv1f32_to_nxv2bf16 is missing
 
 ;
 ; bitcast to nxv2i8
 ;
 
 define <vscale x 2 x i8> @bitcast_nxv1i16_to_nxv2i8(<vscale x 1 x i16> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv1i16_to_nxv2i8:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uunpklo z0.h, z0.b
 ; CHECK-NEXT:    uunpklo z0.s, z0.h
 ; CHECK-NEXT:    uunpklo z0.d, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv1i16_to_nxv2i8:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    st1h { z0.h }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    ld1b { z0.b }, p0/z, [sp]
+; CHECK_BE-NEXT:    uunpklo z0.h, z0.b
+; CHECK_BE-NEXT:    uunpklo z0.s, z0.h
+; CHECK_BE-NEXT:    uunpklo z0.d, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 1 x i16> %v to <vscale x 2 x i8>
   ret <vscale x 2 x i8> %bc
 }
 
 ; @bitcast_nxv1f16_to_nxv2i8 is missing
 ; @bitcast_nxv1bf16_to_nxv2i8 is missing
 
 ;
 ; bitcast to nxv1i16
 ;
 
 define <vscale x 1 x i16> @bitcast_nxv2i8_to_nxv1i16(<vscale x 2 x i8> %v) #0 {
 ; CHECK-LABEL: bitcast_nxv2i8_to_nxv1i16:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    uzp1 z0.s, z0.s, z0.s
 ; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
 ; CHECK-NEXT:    uzp1 z0.b, z0.b, z0.b
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_nxv2i8_to_nxv1i16:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    uzp1 z0.s, z0.s, z0.s
+; CHECK_BE-NEXT:    ptrue p0.b
+; CHECK_BE-NEXT:    uzp1 z0.h, z0.h, z0.h
+; CHECK_BE-NEXT:    uzp1 z0.b, z0.b, z0.b
+; CHECK_BE-NEXT:    st1b { z0.b }, p0, [sp]
+; CHECK_BE-NEXT:    ptrue p0.h
+; CHECK_BE-NEXT:    ld1h { z0.h }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %bc = bitcast <vscale x 2 x i8> %v to <vscale x 1 x i16>
   ret <vscale x 1 x i16> %bc
 }
 
 ; @bitcast_nxv1f16_to_nxv1i16 is missing
 ; @bitcast_nxv1bf16_to_nxv1i16 is missing
 
 ;

 ;
 
 define <vscale x 2 x i32> @bitcast_short_float_to_i32(<vscale x 2 x double> %v) #0 {
 ; CHECK-LABEL: bitcast_short_float_to_i32:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    fcvt z0.s, p0/m, z0.d
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_short_float_to_i32:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ptrue p1.s
+; CHECK_BE-NEXT:    fcvt z0.s, p0/m, z0.d
+; CHECK_BE-NEXT:    st1w { z0.s }, p1, [sp]
+; CHECK_BE-NEXT:    ld1d { z0.d }, p0/z, [sp]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %trunc = fptrunc <vscale x 2 x double> %v to <vscale x 2 x float>
   %bitcast = bitcast <vscale x 2 x float> %trunc to <vscale x 2 x i32>
   ret <vscale x 2 x i32> %bitcast
 }
 
 define <vscale x 2 x double> @bitcast_short_i32_to_float(<vscale x 2 x i64> %v) #0 {
 ; CHECK-LABEL: bitcast_short_i32_to_float:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    fcvt z0.d, p0/m, z0.s
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_short_i32_to_float:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ptrue p1.s
+; CHECK_BE-NEXT:    st1d { z0.d }, p0, [sp]
+; CHECK_BE-NEXT:    ld1w { z0.s }, p1/z, [sp]
+; CHECK_BE-NEXT:    fcvt z0.d, p0/m, z0.s
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %trunc = trunc <vscale x 2 x i64> %v to <vscale x 2 x i32>
   %bitcast = bitcast <vscale x 2 x i32> %trunc to <vscale x 2 x float>
   %extended = fpext <vscale x 2 x float> %bitcast to <vscale x 2 x double>
   ret <vscale x 2 x double> %extended
 }
 
 define <vscale x 2 x float> @bitcast_short_half_to_float(<vscale x 4 x half> %v) #0 {
 ; CHECK-LABEL: bitcast_short_half_to_float:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
 ; CHECK-NEXT:    addvl sp, sp, #-1
 ; CHECK-NEXT:    ptrue p0.s
 ; CHECK-NEXT:    fadd z0.h, p0/m, z0.h, z0.h
 ; CHECK-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:    ptrue p0.d
 ; CHECK-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:    addvl sp, sp, #1
 ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
+;
+; CHECK_BE-LABEL: bitcast_short_half_to_float:
+; CHECK_BE:       // %bb.0:
+; CHECK_BE-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+; CHECK_BE-NEXT:    addvl sp, sp, #-1
+; CHECK_BE-NEXT:    ptrue p0.s
+; CHECK_BE-NEXT:    fadd z0.h, p0/m, z0.h, z0.h
+; CHECK_BE-NEXT:    st1h { z0.s }, p0, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    ptrue p0.d
+; CHECK_BE-NEXT:    ld1w { z0.d }, p0/z, [sp, #1, mul vl]
+; CHECK_BE-NEXT:    addvl sp, sp, #1
+; CHECK_BE-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+; CHECK_BE-NEXT:    ret
   %add = fadd <vscale x 4 x half> %v, %v
   %bitcast = bitcast <vscale x 4 x half> %add to <vscale x 2 x float>
   ret <vscale x 2 x float> %bitcast
 }
 
 ; +bf16 is required for the bfloat version.
 attributes #0 = { nounwind "target-features"="+sve,+bf16" }