[RISCV][Clang] Add bf16-type vector support for RVV

[joshua-arch1]

Summary

New RVV types using bfloat16 like vbfloat16m1_t are being introduced (https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/229). Now we need to provide clang support in order for RVV intrinsics using bfloat16 to work..

[craig.topper]

No tests showing IR output?

[joshua-arch1]

In D152498#4407714, @craig.topper wrote:

No tests showing IR output?

No specific bf16 intrinsics have been landed right now. This patch in only to add bf16 type to RVV.

[craig.topper]

In D152498#4407716, @joshua-arch1 wrote:

In D152498#4407714, @craig.topper wrote:

No tests showing IR output?

No specific bf16 intrinsics have been landed right now. This patch in only to add bf16 type to RVV.

Adding the type means it can be loaded, stored, returned, and passed to functions. Those all need to be tested and must not crash the backend.

[joshua-arch1]

1. Add argument IsBF to RVV_VECTOR_TYPE()
2. Add test for bf16 vectors in rvv-intrinsic-datatypes.cpp

[joshua-arch1]

Ping.

[craig.topper]

I don’t see tests for load or store or function arguments or returns.

Do the IR types need to be made legal in the backend.

clang/utils/TableGen/RISCVVEmitter.cpp

383

Does this line exceed 80 characters?

[craig.topper]

I think we need to check the extension in Sema::checkTypeSupport. See the existing code there

// RISC-V vector builtin types (RISCVVTypes.def)                             
if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ false) &&                 
    !TI.hasFeature("zve64x"))                                                
  Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve64x";  
if (Ty->isRVVType(/* Bitwidth */ 16, /* IsFloat */ true) &&                  
    !TI.hasFeature("experimental-zvfh"))                                     
  Diag(Loc, diag::err_riscv_type_requires_extension, FD)                     
      << Ty << "zvfh";                                                       
if (Ty->isRVVType(/* Bitwidth */ 32, /* IsFloat */ true) &&                  
    !TI.hasFeature("zve32f"))                                                
  Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve32f";  
if (Ty->isRVVType(/* Bitwidth */ 64, /* IsFloat */ true) &&                  
    !TI.hasFeature("zve64d"))                                                
  Diag(Loc, diag::err_riscv_type_requires_extension, FD) << Ty << "zve64d";

[joshua-arch1]

In D152498#4437085, @craig.topper wrote:

I don’t see tests for load or store or function arguments or returns.

Do the IR types need to be made legal in the backend.

Right now we do not have rvv api with bfloat16 type. It will be difficult to create load/store functions using bfloat16-type vectors. Maybe we can wait until these intrinsics get ratified (https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/229/files).

[craig.topper]

In D152498#4446899, @joshua-arch1 wrote:

In D152498#4437085, @craig.topper wrote:

I don’t see tests for load or store or function arguments or returns.

Do the IR types need to be made legal in the backend.

Right now we do not have rvv api with bfloat16 type. It will be difficult to create load/store functions using bfloat16-type vectors. Maybe we can wait until these intrinsics get ratified (https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/229/files).

It’s not hard to create a load or store. You just need a vbfloat16m1_t pointer and a dereference.

[craig.topper]

In D152498#4446905, @craig.topper wrote:

In D152498#4446899, @joshua-arch1 wrote:

In D152498#4437085, @craig.topper wrote:

I don’t see tests for load or store or function arguments or returns.

Do the IR types need to be made legal in the backend.

Right now we do not have rvv api with bfloat16 type. It will be difficult to create load/store functions using bfloat16-type vectors. Maybe we can wait until these intrinsics get ratified (https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/229/files).

It’s not hard to create a load or store. You just need a vbfloat16m1_t pointer and a dereference.

-O0 probably creates loads and stores without really doing much.

[sunshaoce]

clang/include/clang/Basic/riscv_vector_common.td

44

https://github.com/llvm/llvm-project/blob/578b0bd4e621304a1ce367e87a53e59e404dec9b/clang/include/clang/Basic/arm_sve_sme_incl.td#L52

I noticed that ARM uses the b, is it better than Y?

[eopXD]

clang/include/clang/Basic/riscv_vector_common.td

44

Yes indeed, @joshua-arch1 do you mind reopening a pull request in Github? If not, I will be willing to pick up the rest of the work.

[sunshaoce]

Yes indeed, @joshua-arch1 do you mind reopening a pull request in Github? If not, I will be willing to pick up the rest of the work.

It has been a long time, and bf16 is quite important. @eopXD, can you continue the development? And then add @joshua-arch1 the author?

clang/include/clang/AST/Type.h

 #include "clang/Basic/RISCVVTypes.def"
     false; // end of boolean or operation.
 }
 
 inline bool Type::isRVVType(unsigned Bitwidth, bool IsFloat) const {
   bool Ret = false;
 #define RVV_TYPE(Name, Id, SingletonId)
 #define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned,   \
-                        IsFP)                                                  \
+                        IsFP, isBF)                                            \
   if (ElBits == Bitwidth && IsFloat == IsFP)                                   \
     Ret |= isSpecificBuiltinType(BuiltinType::Id);
 #include "clang/Basic/RISCVVTypes.def"
   return Ret;
 }
 
 inline bool Type::isTemplateTypeParmType() const {
   return isa<TemplateTypeParmType>(CanonicalType);

clang/include/clang/Basic/RISCVVTypes.def

 //===-- RISCVVTypes.def - Metadata for the RISC-V V types ------*- C++ -*--===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines various RISC-V V builtin types.  The macros are:
 //
 // - RVV_TYPE(Name, Id, SingletonId)
 //   A builtin type that has not been covered by any other #define
 //   Defining this macro covers all the builtins.
 //
-// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP)
+// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP, IsBF)
 //   A RISC-V V scalable vector.
 //
 // - RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)
 //   An RISC-V V scalable mask.
 //
 // where:
 //
 // - Name is the name of the builtin type.

 //
 //===----------------------------------------------------------------------===//
 
 #ifndef RVV_TYPE
 #define RVV_TYPE(Name, Id, SingletonId)
 #endif
 
 #ifndef RVV_VECTOR_TYPE
-#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP)\
+#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP, IsBF)\
   RVV_TYPE(Name, Id, SingletonId)
 #endif
 
 #ifndef RVV_PREDICATE_TYPE
 #define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)\
   RVV_TYPE(Name, Id, SingletonId)
 #endif
 
 #ifndef RVV_VECTOR_TYPE_INT
 #define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned) \
-  RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false)
+  RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false, false)
 #endif
 
 #ifndef RVV_VECTOR_TYPE_FLOAT
 #define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \
-  RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true)
+  RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true, false)
+#endif
+
+#ifndef RVV_VECTOR_TYPE_BFLOAT
+#define RVV_VECTOR_TYPE_BFLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \
+  RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, false, true)
 #endif
 
 //===- Vector types -------------------------------------------------------===//
 
 RVV_VECTOR_TYPE_INT("__rvv_int8mf8_t", RvvInt8mf8, RvvInt8mf8Ty, 1,   8, 1, true)
 RVV_VECTOR_TYPE_INT("__rvv_int8mf4_t", RvvInt8mf4, RvvInt8mf4Ty, 2,   8, 1, true)
 RVV_VECTOR_TYPE_INT("__rvv_int8mf2_t", RvvInt8mf2, RvvInt8mf2Ty, 4,   8, 1, true)
 RVV_VECTOR_TYPE_INT("__rvv_int8m1_t",  RvvInt8m1,  RvvInt8m1Ty,  8,   8, 1, true)

 
 RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf4_t",RvvFloat16mf4,RvvFloat16mf4Ty,1,  16, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float16mf2_t",RvvFloat16mf2,RvvFloat16mf2Ty,2,  16, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float16m1_t", RvvFloat16m1, RvvFloat16m1Ty, 4,  16, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2_t", RvvFloat16m2, RvvFloat16m2Ty, 8,  16, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float16m4_t", RvvFloat16m4, RvvFloat16m4Ty, 16, 16, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float16m8_t", RvvFloat16m8, RvvFloat16m8Ty, 32, 16, 1)
 
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4_t",RvvBFloat16mf4,RvvBFloat16mf4Ty,1,  16, 1)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2_t",RvvBFloat16mf2,RvvBFloat16mf2Ty,2,  16, 1)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1_t", RvvBFloat16m1, RvvBFloat16m1Ty, 4,  16, 1)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2_t", RvvBFloat16m2, RvvBFloat16m2Ty, 8,  16, 1)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m4_t", RvvBFloat16m4, RvvBFloat16m4Ty, 16, 16, 1)
+RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m8_t", RvvBFloat16m8, RvvBFloat16m8Ty, 32, 16, 1)
+
 RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2_t",RvvFloat32mf2,RvvFloat32mf2Ty,1,  32, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1_t", RvvFloat32m1, RvvFloat32m1Ty, 2,  32, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2_t", RvvFloat32m2, RvvFloat32m2Ty, 4,  32, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float32m4_t", RvvFloat32m4, RvvFloat32m4Ty, 8,  32, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float32m8_t", RvvFloat32m8, RvvFloat32m8Ty, 16, 32, 1)
 
 RVV_VECTOR_TYPE_FLOAT("__rvv_float64m1_t", RvvFloat64m1, RvvFloat64m1Ty, 1,  64, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2_t", RvvFloat64m2, RvvFloat64m2Ty, 2,  64, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float64m4_t", RvvFloat64m4, RvvFloat64m4Ty, 4,  64, 1)
 RVV_VECTOR_TYPE_FLOAT("__rvv_float64m8_t", RvvFloat64m8, RvvFloat64m8Ty, 8,  64, 1)
 
 RVV_PREDICATE_TYPE("__rvv_bool1_t",  RvvBool1,  RvvBool1Ty,  64)
 RVV_PREDICATE_TYPE("__rvv_bool2_t",  RvvBool2,  RvvBool2Ty,  32)
 RVV_PREDICATE_TYPE("__rvv_bool4_t",  RvvBool4,  RvvBool4Ty,  16)
 RVV_PREDICATE_TYPE("__rvv_bool8_t",  RvvBool8,  RvvBool8Ty,  8)
 RVV_PREDICATE_TYPE("__rvv_bool16_t", RvvBool16, RvvBool16Ty, 4)
 RVV_PREDICATE_TYPE("__rvv_bool32_t", RvvBool32, RvvBool32Ty, 2)
 RVV_PREDICATE_TYPE("__rvv_bool64_t", RvvBool64, RvvBool64Ty, 1)
 
 //===- Tuple vector types -------------------------------------------------===//
 
 RVV_VECTOR_TYPE_INT("__rvv_int32m1x2_t", RvvInt32m1x2, RvvInt32m1x2Ty, 2,  32, 2, true)
 
+#undef RVV_VECTOR_TYPE_BFLOAT
 #undef RVV_VECTOR_TYPE_FLOAT
 #undef RVV_VECTOR_TYPE_INT
 #undef RVV_VECTOR_TYPE
 #undef RVV_PREDICATE_TYPE
 #undef RVV_TYPE

clang/include/clang/Basic/riscv_vector_common.td

 //
 //   c: int8_t (i8)
 //   s: int16_t (i16)
 //   i: int32_t (i32)
 //   l: int64_t (i64)
 //   x: float16_t (half)
 //   f: float32_t (float)
 //   d: float64_t (double)
+//   y: bfloat16_t (bfloat16)
 //
 // This way, given an LMUL, a record with a TypeRange "sil" will cause the
 // definition of 3 builtins. Each type "t" in the TypeRange (in this example
 // they are int16_t, int32_t, int64_t) is used as a parameter that drives the
 // definition of that particular builtin (for the given LMUL).
 //
 // During the instantiation, types can be transformed or modified using type
 // transformers. Given a type "t" the following primitive type transformers can

clang/include/clang/Support/RISCVVIntrinsicUtils.h

 
 // Basic type of vector type.
 enum class BasicType : uint8_t {
   Unknown = 0,
   Int8 = 1 << 0,
   Int16 = 1 << 1,
   Int32 = 1 << 2,
   Int64 = 1 << 3,
-  Float16 = 1 << 4,
-  Float32 = 1 << 5,
-  Float64 = 1 << 6,
-  MaxOffset = 6,
+  BFloat16 = 1 << 4,
+  Float16 = 1 << 5,
+  Float32 = 1 << 6,
+  Float64 = 1 << 7,
+  MaxOffset = 7,
   LLVM_MARK_AS_BITMASK_ENUM(Float64),
 };
 
 // Type of vector type.
 enum ScalarTypeKind : uint8_t {
   Void,
   Size_t,
   Ptrdiff_t,
   UnsignedLong,
   SignedLong,
   Boolean,
   SignedInteger,
   UnsignedInteger,
   Float,
+  BFloat,
   Invalid,
 };
 
 // Exponential LMUL
 struct LMULType {
   int Log2LMUL;
   LMULType(int Log2LMUL);
   // Return the C/C++ string representation of LMUL
public:
 
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale && *Scale == 0; }
   bool isVector() const { return Scale && *Scale != 0; }
   bool isVector(unsigned Width) const {
     return isVector() && ElementBitwidth == Width;
   }
   bool isFloat() const { return ScalarType == ScalarTypeKind::Float; }
+  bool isBFloat() const { return ScalarType == ScalarTypeKind::BFloat; }
   bool isSignedInteger() const {
     return ScalarType == ScalarTypeKind::SignedInteger;
   }
   bool isFloatVector(unsigned Width) const {
     return isVector() && isFloat() && ElementBitwidth == Width;
   }
   bool isFloat(unsigned Width) const {
     return isFloat() && ElementBitwidth == Width;

clang/lib/AST/ASTContext.cpp

 #include "clang/Basic/AArch64SVEACLETypes.def"
 #define PPC_VECTOR_TYPE(Name, Id, Size)                                        \
   case BuiltinType::Id:                                                        \
     Width = Size;                                                              \
     Align = Size;                                                              \
     break;
 #include "clang/Basic/PPCTypes.def"
 #define RVV_VECTOR_TYPE(Name, Id, SingletonId, ElKind, ElBits, NF, IsSigned,   \
-                        IsFP)                                                  \
+                        IsFP, IsBF)                                            \
   case BuiltinType::Id:                                                        \
     Width = 0;                                                                 \
     Align = ElBits;                                                            \
     break;
 #define RVV_PREDICATE_TYPE(Name, Id, SingletonId, ElKind)                      \
   case BuiltinType::Id:                                                        \
     Width = 0;                                                                 \
     Align = 8;                                                                 \
#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF,         \
                             IsSigned)                                          \
   case BuiltinType::Id:                                                        \
     return {getIntTypeForBitwidth(ElBits, IsSigned),                           \
             llvm::ElementCount::getScalable(NumEls), NF};
 #define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF)       \
   case BuiltinType::Id:                                                        \
     return {ElBits == 16 ? Float16Ty : (ElBits == 32 ? FloatTy : DoubleTy),    \
             llvm::ElementCount::getScalable(NumEls), NF};
+#define RVV_VECTOR_TYPE_BFLOAT(Name, Id, SingletonId, NumEls, ElBits, NF)      \
+  case BuiltinType::Id:                                                        \
+    return {BFloat16Ty, llvm::ElementCount::getScalable(NumEls), NF};
 #define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)                      \
   case BuiltinType::Id:                                                        \
     return {BoolTy, llvm::ElementCount::getScalable(NumEls), 1};
 #include "clang/Basic/RISCVVTypes.def"
   }
 }
 
 /// getExternrefType - Return a WebAssembly externref type, which represents an

 #define SVE_PREDICATE_TYPE(Name, MangledName, Id, SingletonId, NumEls)         \
   if (EltTy->isBooleanType() && NumElts == NumEls)                             \
     return SingletonId;
 #define SVE_OPAQUE_TYPE(Name, MangledName, Id, SingleTonId)
 #include "clang/Basic/AArch64SVEACLETypes.def"
   } else if (Target->hasRISCVVTypes()) {
     uint64_t EltTySize = getTypeSize(EltTy);
 #define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned,   \
-                        IsFP)                                                  \
+                        IsFP, IsBF)                                            \
   if (!EltTy->isBooleanType() &&                                               \
       ((EltTy->hasIntegerRepresentation() &&                                   \
         EltTy->hasSignedIntegerRepresentation() == IsSigned) ||                \
-       (EltTy->hasFloatingRepresentation() && IsFP)) &&                        \
+       (EltTy->hasFloatingRepresentation() && !EltTy->isBFloat16Type() &&      \
+        IsFP && !IsBF) ||                                                      \
+       (EltTy->hasFloatingRepresentation() && EltTy->isBFloat16Type() &&       \
+        IsBF && !IsFP)) &&                                                     \
       EltTySize == ElBits && NumElts == NumEls && NumFields == NF)             \
     return SingletonId;
 #define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)                      \
   if (EltTy->isBooleanType() && NumElts == NumEls)                             \
     return SingletonId;
 #include "clang/Basic/RISCVVTypes.def"
   }
   return QualType();

clang/lib/AST/Type.cpp

QualType Type::getSveEltType(const ASTContext &Ctx) const {
   else
     return Ctx.getBuiltinVectorTypeInfo(BTy).ElementType;
 }
 
 bool Type::isRVVVLSBuiltinType() const {
   if (const BuiltinType *BT = getAs<BuiltinType>()) {
     switch (BT->getKind()) {
     // FIXME: Support more than LMUL 1.
-#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP) \
+#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP, IsBF) \
     case BuiltinType::Id: \
       return NF == 1 && (NumEls * ElBits) == llvm::RISCV::RVVBitsPerBlock;
 #include "clang/Basic/RISCVVTypes.def"
     default:
       return false;
     }
   }
   return false;

clang/lib/Sema/SemaRISCVVectorLookup.cpp

case ScalarTypeKind::Boolean:
     QT = Context.BoolTy;
     break;
   case ScalarTypeKind::SignedInteger:
     QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), true);
     break;
   case ScalarTypeKind::UnsignedInteger:
     QT = Context.getIntTypeForBitwidth(Type->getElementBitwidth(), false);
     break;
+  case ScalarTypeKind::BFloat:
+    QT = Context.BFloat16Ty;
+    break;
   case ScalarTypeKind::Float:
     switch (Type->getElementBitwidth()) {
     case 64:
       QT = Context.DoubleTy;
       break;
     case 32:
       QT = Context.FloatTy;
       break;

clang/lib/Support/RISCVVIntrinsicUtils.cpp

 // --------  |------  | -------- | ------- | ------- | -------- | -------- | --------
 // i64       | N/A    | N/A      | N/A     | nxv1i64 | nxv2i64  | nxv4i64  | nxv8i64
 // i32       | N/A    | N/A      | nxv1i32 | nxv2i32 | nxv4i32  | nxv8i32  | nxv16i32
 // i16       | N/A    | nxv1i16  | nxv2i16 | nxv4i16 | nxv8i16  | nxv16i16 | nxv32i16
 // i8        | nxv1i8 | nxv2i8   | nxv4i8  | nxv8i8  | nxv16i8  | nxv32i8  | nxv64i8
 // double    | N/A    | N/A      | N/A     | nxv1f64 | nxv2f64  | nxv4f64  | nxv8f64
 // float     | N/A    | N/A      | nxv1f32 | nxv2f32 | nxv4f32  | nxv8f32  | nxv16f32
 // half      | N/A    | nxv1f16  | nxv2f16 | nxv4f16 | nxv8f16  | nxv16f16 | nxv32f16
+// bfloat16  | N/A    | nxv1bf16 | nxv2bf16| nxv4bf16| nxv8bf16 | nxv16bf16| nxv32bf16
 // clang-format on
 
 bool RVVType::verifyType() const {
   if (ScalarType == Invalid)
     return false;
   if (isScalar())
     return true;
   if (!Scale)
     return false;
   if (isFloat() && ElementBitwidth == 8)
     return false;
+  if (isBFloat() && ElementBitwidth != 16)
+    return false;
   if (IsTuple && (NF == 1 || NF > 8))
     return false;
   unsigned V = *Scale;
   switch (ElementBitwidth) {
   case 1:
   case 8:
     // Check Scale is 1,2,4,8,16,32,64
     return (V <= 64 && isPowerOf2_32(V));
case 32:
       break;
     case 64:
       BuiltinStr += "d";
       break;
     default:
       llvm_unreachable("Unhandled ElementBitwidth!");
     }
     break;
+  case ScalarTypeKind::BFloat:
+    BuiltinStr += "y";
+    break;
   default:
     llvm_unreachable("ScalarType is invalid!");
   }
   if (IsImmediate)
     BuiltinStr = "I" + BuiltinStr;
   if (isScalar()) {
     if (IsConstant)
       BuiltinStr += "C";
void RVVType::initClangBuiltinStr() {
   ClangBuiltinStr = "__rvv_";
   switch (ScalarType) {
   case ScalarTypeKind::Boolean:
     ClangBuiltinStr += "bool" + utostr(64 / *Scale) + "_t";
     return;
   case ScalarTypeKind::Float:
     ClangBuiltinStr += "float";
     break;
+  case ScalarTypeKind::BFloat:
+    ClangBuiltinStr += "bfloat";
+    break;
   case ScalarTypeKind::SignedInteger:
     ClangBuiltinStr += "int";
     break;
   case ScalarTypeKind::UnsignedInteger:
     ClangBuiltinStr += "uint";
     break;
   default:
     llvm_unreachable("ScalarTypeKind is invalid");
if (isScalar()) {
         Str += "float";
       else if (ElementBitwidth == 16)
         Str += "_Float16";
       else
         llvm_unreachable("Unhandled floating type.");
     } else
       Str += getTypeString("float");
     break;
+  case ScalarTypeKind::BFloat:
+    if (isScalar()) {
+      if (ElementBitwidth == 16)
+        Str += "__bf16";
+      else
+        llvm_unreachable("Unhandled floating type.");
+    } else
+      Str += getTypeString("bfloat");
+    break;
   case ScalarTypeKind::SignedInteger:
     Str += getTypeString("int");
     break;
   case ScalarTypeKind::UnsignedInteger:
     Str += getTypeString("uint");
     break;
   default:
     llvm_unreachable("ScalarType is invalid!");
   }
   if (IsPointer)
     Str += " *";
 }
 
 void RVVType::initShortStr() {
   switch (ScalarType) {
   case ScalarTypeKind::Boolean:
     assert(isVector());
     ShortStr = "b" + utostr(64 / *Scale);
     return;
   case ScalarTypeKind::Float:
     ShortStr = "f" + utostr(ElementBitwidth);
     break;
+  case ScalarTypeKind::BFloat:
+    ShortStr = "bf" + utostr(ElementBitwidth);
+    break;
   case ScalarTypeKind::SignedInteger:
     ShortStr = "i" + utostr(ElementBitwidth);
     break;
   case ScalarTypeKind::UnsignedInteger:
     ShortStr = "u" + utostr(ElementBitwidth);
     break;
   default:
     llvm_unreachable("Unhandled case!");
void RVVType::applyBasicType() {
   case BasicType::Float32:
     ElementBitwidth = 32;
     ScalarType = ScalarTypeKind::Float;
     break;
   case BasicType::Float64:
     ElementBitwidth = 64;
     ScalarType = ScalarTypeKind::Float;
     break;
+  case BasicType::BFloat16:
+    ElementBitwidth = 16;
+    ScalarType = ScalarTypeKind::BFloat;
+    break;
   default:
     llvm_unreachable("Unhandled type code!");
   }
   assert(ElementBitwidth != 0 && "Bad element bitwidth!");
 }
 
 std::optional<PrototypeDescriptor>
 PrototypeDescriptor::parsePrototypeDescriptor(

clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp

 // CHECK-NEXT:    [[U64M4:%.*]] = alloca <vscale x 4 x i64>, align 8
 // CHECK-NEXT:    [[U64M8:%.*]] = alloca <vscale x 8 x i64>, align 8
 // CHECK-NEXT:    [[F16MF4:%.*]] = alloca <vscale x 1 x half>, align 2
 // CHECK-NEXT:    [[F16MF2:%.*]] = alloca <vscale x 2 x half>, align 2
 // CHECK-NEXT:    [[F16M1:%.*]] = alloca <vscale x 4 x half>, align 2
 // CHECK-NEXT:    [[F16M2:%.*]] = alloca <vscale x 8 x half>, align 2
 // CHECK-NEXT:    [[F16M4:%.*]] = alloca <vscale x 16 x half>, align 2
 // CHECK-NEXT:    [[F16M8:%.*]] = alloca <vscale x 32 x half>, align 2
+// CHECK-NEXT:    [[BF16MF4:%.*]] = alloca <vscale x 1 x bfloat>, align 2
+// CHECK-NEXT:    [[BF16MF2:%.*]] = alloca <vscale x 2 x bfloat>, align 2
+// CHECK-NEXT:    [[BF16M1:%.*]] = alloca <vscale x 4 x bfloat>, align 2
+// CHECK-NEXT:    [[BF16M2:%.*]] = alloca <vscale x 8 x bfloat>, align 2
+// CHECK-NEXT:    [[BF16M4:%.*]] = alloca <vscale x 16 x bfloat>, align 2
+// CHECK-NEXT:    [[BF16M8:%.*]] = alloca <vscale x 32 x bfloat>, align 2
 // CHECK-NEXT:    [[F32MF2:%.*]] = alloca <vscale x 1 x float>, align 4
 // CHECK-NEXT:    [[F32M1:%.*]] = alloca <vscale x 2 x float>, align 4
 // CHECK-NEXT:    [[F32M2:%.*]] = alloca <vscale x 4 x float>, align 4
 // CHECK-NEXT:    [[F32M4:%.*]] = alloca <vscale x 8 x float>, align 4
 // CHECK-NEXT:    [[F32M8:%.*]] = alloca <vscale x 16 x float>, align 4
 // CHECK-NEXT:    [[F64M1:%.*]] = alloca <vscale x 1 x double>, align 8
 // CHECK-NEXT:    [[F64M2:%.*]] = alloca <vscale x 2 x double>, align 8
 // CHECK-NEXT:    [[F64M4:%.*]] = alloca <vscale x 4 x double>, align 8
void foo () {
 
   vfloat16mf4_t f16mf4;
   vfloat16mf2_t f16mf2;
   vfloat16m1_t f16m1;
   vfloat16m2_t f16m2;
   vfloat16m4_t f16m4;
   vfloat16m8_t f16m8;
 
+  vbfloat16mf4_t bf16mf4;
+  vbfloat16mf2_t bf16mf2;
+  vbfloat16m1_t bf16m1;
+  vbfloat16m2_t bf16m2;
+  vbfloat16m4_t bf16m4;
+  vbfloat16m8_t bf16m8;
+
   vfloat32mf2_t f32mf2;
   vfloat32m1_t f32m1;
   vfloat32m2_t f32m2;
   vfloat32m4_t f32m4;
   vfloat32m8_t f32m8;
 
   vfloat64m1_t f64m1;
   vfloat64m2_t f64m2;
   vfloat64m4_t f64m4;
   vfloat64m8_t f64m8;
 
   vint32m1x2_t i32m1x2;
 }

clang/test/Sema/riscv-types.c

void bar(void) {
   // CHECK: __rvv_int8mf4_t x42;
   __rvv_int8mf4_t x42;
 
   // CHECK: __rvv_int8mf2_t x43;
   __rvv_int8mf2_t x43;
 
   // CHECK: __rvv_int32m1x2_t x44;
   __rvv_int32m1x2_t x44;
+
+  // CHECK: __rvv_bfloat16m1_t x45;
+  __rvv_bfloat16m1_t x45;
+
+  // CHECK: __rvv_bfloat16m2_t x46;
+  __rvv_bfloat16m2_t x46;
+
+  // CHECK: __rvv_bfloat16m4_t x47;
+  __rvv_bfloat16m4_t x47;
+
+  // CHECK: __rvv_bfloat16m8_t x48;
+  __rvv_bfloat16m8_t x48;
+
+  // CHECK: __rvv_bfloat16mf4_t x49;
+  __rvv_bfloat16mf4_t x49;
+
+  // CHECK: __rvv_bfloat16mf2_t x50;
+  __rvv_bfloat16mf2_t x50;
+
 }
 
 typedef __rvv_bool4_t vbool4_t;
 __rvv_bool4_t get_rvv_bool4(void);
 vbool4_t get_vbool4_t(void);
 
 void func1(int sel) {
   // CHECK: vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
   vbool4_t t0 = sel ? get_rvv_bool4() : get_vbool4_t();
 }

clang/utils/TableGen/RISCVVEmitter.cpp

case 'x':
     return BasicType::Float16;
     break;
   case 'f':
     return BasicType::Float32;
     break;
   case 'd':
     return BasicType::Float64;
     break;
-
+  case 'y':
+    return BasicType::BFloat16;
+    break;
   default:
     return BasicType::Unknown;
   }
 }
 
 void emitCodeGenSwitchBody(const RVVIntrinsic *RVVI, raw_ostream &OS) {
   if (!RVVI->getIRName().empty())
     OS << "  ID = Intrinsic::riscv_" + RVVI->getIRName() + ";\n";
for (int Log2LMUL : Log2LMULs) {
                                 TypeModifier::SignedInteger));
         if (TupleT)
           printType(*TupleT);
       }
     }
   }
 
   for (BasicType BT :
-       {BasicType::Float16, BasicType::Float32, BasicType::Float64}) {
+       {BasicType::Float16, BasicType::Float32, BasicType::Float64, BasicType::BFloat16}) {
     for (int Log2LMUL : Log2LMULs) {
       auto T = TypeCache.computeType(BT, Log2LMUL, PrototypeDescriptor::Vector);
       if (T)
         printType(*T);
     }
   }
 
   OS << "#define __riscv_v_intrinsic_overloading 1\n";