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Differential D150770

[RISCV] Add tests for store merging with unaligned scalar access
ClosedPublic

Authored by luke on May 17 2023, 5:12 AM.

Details

Reviewers
asb
craig.topper
reames
frasercrmck
kito-cheng
Commits
rG5ab13332fb36: [RISCV] Add tests for store merging with unaligned scalar access

Diff Detail

Event Timeline

luke created this revision.May 17 2023, 5:12 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 17 2023, 5:12 AM
Herald added subscribers: jobnoorman, pmatos, VincentWu and 24 others. · View Herald Transcript
luke requested review of this revision.May 17 2023, 5:12 AM
Herald added a project: Restricted Project. · View Herald TranscriptMay 17 2023, 5:12 AM
Herald added subscribers: llvm-commits, • pcwang-thead, eopXD, MaskRay. · View Herald Transcript
Harbormaster completed remote builds in B232577: Diff 523005.May 17 2023, 5:32 AM
luke added a child revision: D150771: [RISCV] Set Fast flag for unaligned memory accesses.May 17 2023, 7:49 AM
reames accepted this revision.May 17 2023, 11:03 AM

LGTM

This revision is now accepted and ready to land.May 17 2023, 11:03 AM
This revision was landed with ongoing or failed builds.May 19 2023, 6:44 AM
Closed by commit rG5ab13332fb36: [RISCV] Add tests for store merging with unaligned scalar access (authored by luke). · Explain Why
This revision was automatically updated to reflect the committed changes.
luke added a commit: rG5ab13332fb36: [RISCV] Add tests for store merging with unaligned scalar access.

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
100 lines

Diff 523005

llvm/test/CodeGen/RISCV/unaligned-load-store.ll

Show First 20 Lines • Show All 260 Lines • ▼ Show 20 Lines
; MISALIGN-RV64I-LABEL: store_i64: ; MISALIGN-RV64I-LABEL: store_i64:
; MISALIGN-RV64I: # %bb.0: ; MISALIGN-RV64I: # %bb.0:
; MISALIGN-RV64I-NEXT: sd a1, 0(a0) ; MISALIGN-RV64I-NEXT: sd a1, 0(a0)
; MISALIGN-RV64I-NEXT: ret ; MISALIGN-RV64I-NEXT: ret
store i64 %v, ptr %p, align 1 store i64 %v, ptr %p, align 1
ret void ret void
} }
define void @merge_stores_i8_i16(ptr %p) {
; ALL-LABEL: merge_stores_i8_i16:
; ALL: # %bb.0:
; ALL-NEXT: sb zero, 0(a0)
; ALL-NEXT: sb zero, 1(a0)
; ALL-NEXT: ret
store i8 0, ptr %p
%p2 = getelementptr i8, ptr %p, i32 1
store i8 0, ptr %p2
ret void
}
define void @merge_stores_i8_i32(ptr %p) {
; ALL-LABEL: merge_stores_i8_i32:
; ALL: # %bb.0:
; ALL-NEXT: sb zero, 0(a0)
; ALL-NEXT: sb zero, 1(a0)
; ALL-NEXT: sb zero, 2(a0)
; ALL-NEXT: sb zero, 3(a0)
; ALL-NEXT: ret
store i8 0, ptr %p
%p2 = getelementptr i8, ptr %p, i32 1
store i8 0, ptr %p2
%p3 = getelementptr i8, ptr %p, i32 2
store i8 0, ptr %p3
%p4 = getelementptr i8, ptr %p, i32 3
store i8 0, ptr %p4
ret void
}
define void @merge_stores_i8_i64(ptr %p) {
; ALL-LABEL: merge_stores_i8_i64:
; ALL: # %bb.0:
; ALL-NEXT: sb zero, 0(a0)
; ALL-NEXT: sb zero, 1(a0)
; ALL-NEXT: sb zero, 2(a0)
; ALL-NEXT: sb zero, 3(a0)
; ALL-NEXT: sb zero, 4(a0)
; ALL-NEXT: sb zero, 5(a0)
; ALL-NEXT: sb zero, 6(a0)
; ALL-NEXT: sb zero, 7(a0)
; ALL-NEXT: ret
store i8 0, ptr %p
%p2 = getelementptr i8, ptr %p, i32 1
store i8 0, ptr %p2
%p3 = getelementptr i8, ptr %p, i32 2
store i8 0, ptr %p3
%p4 = getelementptr i8, ptr %p, i32 3
store i8 0, ptr %p4
%p5 = getelementptr i8, ptr %p, i32 4
store i8 0, ptr %p5
%p6 = getelementptr i8, ptr %p, i32 5
store i8 0, ptr %p6
%p7 = getelementptr i8, ptr %p, i32 6
store i8 0, ptr %p7
%p8 = getelementptr i8, ptr %p, i32 7
store i8 0, ptr %p8
ret void
}
define void @merge_stores_i16_i32(ptr %p) {
; ALL-LABEL: merge_stores_i16_i32:
; ALL: # %bb.0:
; ALL-NEXT: sh zero, 0(a0)
; ALL-NEXT: sh zero, 2(a0)
; ALL-NEXT: ret
store i16 0, ptr %p
%p2 = getelementptr i16, ptr %p, i32 1
store i16 0, ptr %p2
ret void
}
define void @merge_stores_i16_i64(ptr %p) {
; ALL-LABEL: merge_stores_i16_i64:
; ALL: # %bb.0:
; ALL-NEXT: sh zero, 0(a0)
; ALL-NEXT: sh zero, 2(a0)
; ALL-NEXT: sh zero, 4(a0)
; ALL-NEXT: sh zero, 6(a0)
; ALL-NEXT: ret
store i16 0, ptr %p
%p2 = getelementptr i16, ptr %p, i32 1
store i16 0, ptr %p2
%p3 = getelementptr i16, ptr %p, i32 2
store i16 0, ptr %p3
%p4 = getelementptr i16, ptr %p, i32 3
store i16 0, ptr %p4
ret void
}
define void @merge_stores_i32_i64(ptr %p) {
; ALL-LABEL: merge_stores_i32_i64:
; ALL: # %bb.0:
; ALL-NEXT: sw zero, 0(a0)
; ALL-NEXT: sw zero, 4(a0)
; ALL-NEXT: ret
store i32 0, ptr %p
%p2 = getelementptr i32, ptr %p, i32 1
store i32 0, ptr %p2
ret void
}