[RISCV] Store fli min/nan/inf in index form in RISCVOperand.

[craig.topper]

Summary

Instead of converting to FP value, store them as Index using an
immediate operand.

Do the same for the explicit index form.

This avoids using the FP32 version of these special values as the
representation for fli.h and fli.d. inf/nan aren't so bad, but
"min" is problematic as the current implementation allows fli.d and
fli.h to accept the decimal version of the fp32 minimum value. I
will submit another patch to fix that.

[craig.topper]

Add an assert to getFPImm now that we no longer use it for min/inf/nan. Since it
isn't type aware its dangerous to use for those values.

[asb]

LGTM.

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

 //===-- RISCVAsmParser.cpp - Parse RISCV assembly to MCInst instructions --===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
public:
   bool isFenceArg() const { return Kind == KindTy::Fence; }
 
   /// Return true if the operand is a valid floating point rounding mode.
   bool isFRMArg() const { return Kind == KindTy::FRM; }
   bool isRTZArg() const { return isFRMArg() && FRM.FRM == RISCVFPRndMode::RTZ; }
 
   /// Return true if the operand is a valid fli.s floating-point immediate.
   bool isLoadFPImm() const {
+    if (isImm())
+      return isUImm5();
     return Kind == KindTy::FPImmediate &&
            RISCVLoadFPImm::getLoadFP32Imm(APInt(32, getFPConst())) != -1;
   }
 
   bool isImmXLenLI() const {
     int64_t Imm;
     RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
     if (!isImm())
public:
 
   void addImmOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
     addExpr(Inst, getImm(), isRV64Imm());
   }
 
   void addFPImmOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
+    if (isImm()) {
+      addExpr(Inst, getImm(), isRV64Imm());
+      return;
+    }
+
     int Imm = RISCVLoadFPImm::getLoadFP32Imm(APInt(32, getFPConst()));
     Inst.addOperand(MCOperand::createImm(Imm));
   }
 
   void addFenceArgOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
     Inst.addOperand(MCOperand::createImm(Fence.Val));
   }

 
 OperandMatchResultTy RISCVAsmParser::parseFPImm(OperandVector &Operands) {
   SMLoc S = getLoc();
 
   // Parse special floats (inf/nan/min) representation.
   if (getTok().is(AsmToken::Identifier)) {
     StringRef Identifier = getTok().getIdentifier();
     if (Identifier.compare_insensitive("inf") == 0) {
-      APFloat SpecialVal = APFloat::getInf(APFloat::IEEEsingle());
-      Operands.push_back(RISCVOperand::createFPImm(
-          SpecialVal.bitcastToAPInt().getZExtValue(), S));
+      Operands.push_back(
+          RISCVOperand::createImm(MCConstantExpr::create(30, getContext()), S,
+                                  getTok().getEndLoc(), isRV64()));
     } else if (Identifier.compare_insensitive("nan") == 0) {
-      APFloat SpecialVal = APFloat::getNaN(APFloat::IEEEsingle());
-      Operands.push_back(RISCVOperand::createFPImm(
-          SpecialVal.bitcastToAPInt().getZExtValue(), S));
+      Operands.push_back(
+          RISCVOperand::createImm(MCConstantExpr::create(31, getContext()), S,
+                                  getTok().getEndLoc(), isRV64()));
     } else if (Identifier.compare_insensitive("min") == 0) {
-      unsigned SpecialVal = RISCVLoadFPImm::getFPImm(1);
-      Operands.push_back(RISCVOperand::createFPImm(SpecialVal, S));
+      Operands.push_back(
+          RISCVOperand::createImm(MCConstantExpr::create(1, getContext()), S,
+                                  getTok().getEndLoc(), isRV64()));
     } else {
       TokError("invalid floating point literal");
       return MatchOperand_ParseFail;
     }
 
     Lex(); // Eat the token.
 
     return MatchOperand_Success;
OperandMatchResultTy RISCVAsmParser::parseFPImm(OperandVector &Operands) {
   }
 
   if (Tok.is(AsmToken::Integer)) {
     // Parse integer representation.
     if (Tok.getIntVal() > 31 || IsNegative) {
       TokError("encoded floating point value out of range");
       return MatchOperand_ParseFail;
     }
-    unsigned F = RISCVLoadFPImm::getFPImm(Tok.getIntVal());
-    Operands.push_back(RISCVOperand::createFPImm(F, S));
+    Operands.push_back(RISCVOperand::createImm(
+        MCConstantExpr::create(Tok.getIntVal(), getContext()), S,
+        Tok.getEndLoc(), isRV64()));
   } else {
     // Parse FP representation.
     APFloat RealVal(APFloat::IEEEsingle());
     auto StatusOrErr =
         RealVal.convertFromString(Tok.getString(), APFloat::rmTowardZero);
     if (errorToBool(StatusOrErr.takeError())) {
       TokError("invalid floating point representation");
       return MatchOperand_ParseFail;

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

 //===-- RISCVBaseInfo.h - Top level definitions for RISCV MC ----*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
if (EMI != std::end(LoadFPImmArr))
       return std::distance(std::begin(LoadFPImmArr), EMI) + 1;
   }
 
   return -1;
 }
 
 namespace RISCVLoadFPImm {
 inline static uint32_t getFPImm(unsigned Imm) {
+  assert(Imm != 1 && Imm != 30 && Imm != 31 && "Unsupported immediate");
   uint8_t Sign;
   uint8_t Exp;
   uint8_t Mantissa;
 
   if (Imm == 0) {
     Sign = 0b1;
     Exp = 0b01111111;
     Mantissa = 0b000;