[DAGCombiner] Add fold for `~x + x` -> `-1`

[goldstein.w.n]

Summary

This is generally done by the InstCombine, but can be emitted as an
intermediate step and is cheap to handle.

[RKSimon]

LGTM

[goldstein.w.n]

Use VT

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

SDValue DAGCombiner::visitADDLike(SDNode *N) {
   if (SDValue C = DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, {N0, N1}))
     return C;
 
   // canonicalize constant to RHS
   if (DAG.isConstantIntBuildVectorOrConstantInt(N0) &&
       !DAG.isConstantIntBuildVectorOrConstantInt(N1))
     return DAG.getNode(ISD::ADD, DL, VT, N1, N0);
 
+  if (areBitwiseNotOfEachother(N0, N1))
+    return DAG.getConstant(APInt::getAllOnes(VT.getScalarSizeInBits()),
+                           SDLoc(N), VT);
+
   // fold vector ops
   if (VT.isVector()) {
     if (SDValue FoldedVOp = SimplifyVBinOp(N, DL))
       return FoldedVOp;
 
     // fold (add x, 0) -> x, vector edition
     if (ISD::isConstantSplatVectorAllZeros(N1.getNode()))
       return N0;

llvm/test/CodeGen/X86/combine-add.ll

; CHECK-NEXT:    retq
    %cmpyz = icmp ult i8 %ny, %nz
    %r = add i1 %cmpyz, true
    ret i1 %r
 }
 
 define <2 x i64> @add_vec_x_notx(<2 x i64> %v0) nounwind {
 ; SSE-LABEL: add_vec_x_notx:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    pcmpeqd %xmm1, %xmm1
-; SSE-NEXT:    pxor %xmm0, %xmm1
-; SSE-NEXT:    paddq %xmm1, %xmm0
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: add_vec_x_notx:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; AVX-NEXT:    vpxor %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vpaddq %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %x = xor <2 x i64> %v0, <i64 -1, i64 -1>
   %y = add <2 x i64> %v0, %x
   ret <2 x i64> %y
 }
 
 define <2 x i64> @add_vec_notx_x(<2 x i64> %v0) nounwind {
 ; SSE-LABEL: add_vec_notx_x:
 ; SSE:       # %bb.0:
-; SSE-NEXT:    pcmpeqd %xmm1, %xmm1
-; SSE-NEXT:    pxor %xmm0, %xmm1
-; SSE-NEXT:    paddq %xmm1, %xmm0
+; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
 ; AVX-LABEL: add_vec_notx_x:
 ; AVX:       # %bb.0:
-; AVX-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; AVX-NEXT:    vpxor %xmm1, %xmm0, %xmm1
-; AVX-NEXT:    vpaddq %xmm0, %xmm1, %xmm0
+; AVX-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
 ; AVX-NEXT:    retq
   %x = xor <2 x i64> %v0, <i64 -1, i64 -1>
   %y = add <2 x i64> %x, %v0
   ret <2 x i64> %y
 }
 
 define i64 @add_x_notx(i64 %v0) nounwind {
 ; CHECK-LABEL: add_x_notx:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    notq %rax
-; CHECK-NEXT:    addq %rdi, %rax
+; CHECK-NEXT:    movq $-1, %rax
 ; CHECK-NEXT:    retq
   %x = xor i64 %v0, -1
   %y = add i64 %v0, %x
   ret i64 %y
 }
 
 define i64 @add_notx_x(i64 %v0) nounwind {
 ; CHECK-LABEL: add_notx_x:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    notq %rax
-; CHECK-NEXT:    addq %rdi, %rax
+; CHECK-NEXT:    movq $-1, %rax
 ; CHECK-NEXT:    retq
   %x = xor i64 %v0, -1
   %y = add i64 %x, %v0
   ret i64 %y
 }