This is an archive of the discontinued LLVM Phabricator instance.

Differential D143316

[m68k] Implement absolution long addressing mode for ADDA instruction
ClosedPublic

Authored by 0x59616e on Feb 4 2023, 4:01 AM.

Details

Reviewers
myhsu
RKSimon
ricky26
Commits
rG40d89de4c54e: [m68k] Implement absolution long addressing mode for ADDA instruction

Diff Detail

Event Timeline

0x59616e created this revision.Feb 4 2023, 4:01 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 4 2023, 4:01 AM
Herald added a subscriber: hiraditya. · View Herald Transcript
0x59616e requested review of this revision.Feb 4 2023, 4:01 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 4 2023, 4:01 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
0x59616e added a child revision: D143317: [m68k] Add TLS support.Feb 4 2023, 4:07 AM
Harbormaster completed remote builds in B211851: Diff 494808.Feb 4 2023, 4:48 AM
0x59616e mentioned this in D143317: [m68k] Add TLS support.Feb 5 2023, 2:45 AM
glaubitz added a subscriber: glaubitz.Feb 5 2023, 11:47 AM
myhsu added inline comments.Feb 5 2023, 9:42 PM
llvm/lib/Target/M68k/M68kInstrArithmetic.td
297
llvm/test/MC/M68k/Relocations/arith-abs.s
1 ↗(On Diff #494808)

Can we put the test in test/MC/M68k/Arith/Classes/MxBiArOp_RFRM.s along with other ADDA tests? Also, I don't think it's necessary to test relocations in this patch since it's essentially covered by test/MC/M68k/Relocations/data-abs.s already.

RKSimon added a comment.Feb 8 2023, 7:10 AM

disassembler tests?

0x59616e updated this revision to Diff 497271.Feb 14 2023, 4:33 AM
  • Add disassembler test
  • Move assembler test into MxBiArOp_RFRM.s
0x59616e marked an inline comment as done.Feb 14 2023, 4:33 AM
Harbormaster completed remote builds in B213626: Diff 497271.Feb 14 2023, 6:13 AM
myhsu accepted this revision.Feb 14 2023, 1:38 PM

LGTM thanks!

This revision is now accepted and ready to land.Feb 14 2023, 1:38 PM
0x59616e added a child revision: D144941: [m68k] Add TLS Support.Feb 27 2023, 9:25 PM
glaubitz added a comment.Mar 23 2023, 12:56 AM

Could someone with permissions land this? Thanks!

This revision was landed with ongoing or failed builds.Jun 3 2023, 4:10 AM
Closed by commit rG40d89de4c54e: [m68k] Implement absolution long addressing mode for ADDA instruction (authored by 0x59616e). · Explain Why
This revision was automatically updated to reflect the committed changes.
0x59616e added a commit: rG40d89de4c54e: [m68k] Implement absolution long addressing mode for ADDA instruction.

Revision Contents

PathSize
llvm/
lib/
Target/
M68k/
2 lines
test/
MC/
Disassembler/
M68k/
3 lines
M68k/
Arith/
Classes/
3 lines

Diff 528092

llvm/lib/Target/M68k/M68kInstrArithmetic.td

Show First 20 Lines • Show All 287 Lines • ▼ Show 20 Linesmulticlass MxBiArOp_AF<string MN, SDNode NODE, bits<4> CMD> {
def NAME#"32aq" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.QOp, MxType32.QPat, def NAME#"32aq" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.QOp, MxType32.QPat,
CMD, MxEncAddrMode_q<"opd">>; CMD, MxEncAddrMode_q<"opd">>;
def NAME#"32af" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.FOp, MxType32.FPat, def NAME#"32af" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.FOp, MxType32.FPat,
CMD, MxEncAddrMode_f<"opd">>; CMD, MxEncAddrMode_f<"opd">>;
def NAME#"32ap" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.POp, MxType32.PPat, def NAME#"32ap" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.POp, MxType32.PPat,
CMD, MxEncAddrMode_p<"opd">>; CMD, MxEncAddrMode_p<"opd">>;
def NAME#"32aj" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.JOp, MxType32.JPat, def NAME#"32aj" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.JOp, MxType32.JPat,
CMD, MxEncAddrMode_j<"opd">>; CMD, MxEncAddrMode_j<"opd">>;
def NAME#"32ab" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.BOp, MxType32.BPat,
CMD, MxEncAddrMode_abs<"opd", true>>;
myhsuUnsubmitted
Done
ReplyInline Actions
def NAME#"32ab" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.BOp, MxType32.BPat,
- CMD, MxEncAddrMode_abs<"opd", 1>>;
+ CMD, MxEncAddrMode_abs<"opd", true>>;
def NAME#"32ai" : MxBiArOp_R_RI_xEA<MN, NODE, MxType32a, CMD>;
myhsu:
def NAME#"32ai" : MxBiArOp_R_RI_xEA<MN, NODE, MxType32a, CMD>; def NAME#"32ai" : MxBiArOp_R_RI_xEA<MN, NODE, MxType32a, CMD>;
def NAME#"32ar" : MxBiArOp_R_RR_xEA<MN, NODE, MxType32a, MxType32r, CMD>; def NAME#"32ar" : MxBiArOp_R_RR_xEA<MN, NODE, MxType32a, MxType32r, CMD>;
} // MxBiArOp_AF } // MxBiArOp_AF
// NOTE These naturally produce CCR // NOTE These naturally produce CCR
▲ Show 20 Lines • Show All 761 Lines • Show Last 20 Lines

llvm/test/MC/Disassembler/M68k/arithmetic.txt

Show First 20 Lines • Show All 208 Lines • ▼ Show 20 Lines
# CHECK: or.l (15,%pc,%a1), %d0 # CHECK: or.l (15,%pc,%a1), %d0
0x80 0xbb 0x98 0x0f 0x80 0xbb 0x98 0x0f
# CHECK: or.l %a0, %d0 # CHECK: or.l %a0, %d0
0x80 0x88 0x80 0x88
# CHECK: or.l %d1, %d6 # CHECK: or.l %d1, %d6
0x8c 0x81 0x8c 0x81
# CHECK: adda.l $f0001, %a0
0xd1 0xf9 0x00 0x0f 0x00 0x01

llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRM.s

Show First 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
; CHECK-SAME: encoding: [0xd0,0x10] ; CHECK-SAME: encoding: [0xd0,0x10]
add.b (%a0), %d0 add.b (%a0), %d0
; CHECK: add.w (%a2), %d0 ; CHECK: add.w (%a2), %d0
; CHECK-SAME: encoding: [0xd0,0x52] ; CHECK-SAME: encoding: [0xd0,0x52]
add.w (%a2), %d0 add.w (%a2), %d0
; CHECK: adda.l (%a1), %a3 ; CHECK: adda.l (%a1), %a3
; CHECK-SAME: encoding: [0xd7,0xd1] ; CHECK-SAME: encoding: [0xd7,0xd1]
adda.l (%a1), %a3 adda.l (%a1), %a3
; CHECK: adda.l dst, %a0
; CHECK-SAME: encoding: [0xd1,0xf9,A,A,A,A]
adda.l dst,%a0