User Details
- User Since
- Nov 15 2021, 11:20 PM (71 w, 2 d)
Mon, Mar 27
address feedbacks
Sun, Mar 26
I was confused with the absence of some of my fix in the test after rebasing to master. It turns out that this has been done by Min.
update diff
Sat, Mar 25
remove comments
Thu, Mar 23
Sorry for holding this for so long. I will come back next week since we have a a 5-day holiday in Taiwan.
Wed, Mar 1
Add some comments
Tue, Feb 28
A few minor adjustments are required.
Shoot. I mixed it up with my own one. I'm sorry.
Feb 28 2023
A few minor adjustments are required.
LGTM. Thanks
Feb 27 2023
Feb 16 2023
Feb 15 2023
The access model type is disambiguated at ISelLowering, but it still needs to be expanded in AsmPrinter. I am uncertain how to express the Global Offset Table in MachineInstr.
Feb 14 2023
Add disassembler test
- Add disassembler test
- Move assembler test into MxBiArOp_RFRM.s
Feb 5 2023
Plan to update the code per the advice received
Feb 4 2023
Jan 24 2023
LGTM. Thanks for this amazing work ;)
Jan 19 2023
This amazing work LGTM. Thanks !
Dec 29 2022
The CI seems OK. My first LGTM is given to you.
Dec 27 2022
Also, could you add "Fixes #58974" in the commit message so that the item will be closed automatically upon commiting ? Thanks
FYI the pre-merge checks seem to have some issues. Here is the output:
Command Output (stderr): -- /var/lib/buildkite-agent/builds/llvm-project/clang/test/Preprocessor/predefined-arch-macros.c:4322:28: error: CHECK_M68K_GCC_ATOMICS: expected string not found in input // CHECK_M68K_GCC_ATOMICS: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 ^ <stdin>:1:1: note: scanning from here #define _ILP32 1 ^ <stdin>:62:1: note: possible intended match here #define __GCC_ATOMIC_CHAR_LOCK_FREE 1 ^
Nov 23 2022
I like your idea, but I'm not a big fan of the code structure. It seems that we have to add a plethora of virtual functions for every backend in a single PrinterInterface class ? Wouldn't this break the 'open-close principle' and 'Interface segregation principle' ?
Nov 9 2022
Thanks a lot for all of your benign help ;)
Thanks a lot ;)
Nov 8 2022
update diff:
- Expand atomic-rmw to atomic-compare-and-swap on target >= M68020
- address feedbacks
Replace IsM680x0 with AtLeastM680x0
Nov 6 2022
Nov 4 2022
update diff:
- We transform all atomic instruction to __atomic_* for sizes > 32
- Otherwise, lower to either native instruction or __sync_* function call.
Nov 2 2022
Thanks for all of your edifying comments. The path is getting clearer. Here is my understanding. Correct me if I'm wrong.
Nov 1 2022
one more question :
Oct 31 2022
address feedbacks
Oct 30 2022
address feedbacks
Oct 28 2022
Add pipeline.ll
Add support for atomicrmw and cmpxchg
Oct 27 2022
I dig into the libatomic.a, here is part of the result:
00000000 <__atomic_store_4>: 0: 206f 0004 moveal %sp@(4),%a0 4: 20af 0008 movel %sp@(8),%a0@ 8: 4e75 rts
Thanks for this patch !
Oct 26 2022
Oct 25 2022
Take my word with a pinch of salt
Oct 23 2022
Embark on the CAS/RMW instruction.
Oct 22 2022
Oct 21 2022
Oct 20 2022
I can only nitpick some of the peripheral issues since I have no knowledge in most of the part of clang. Perhaps implementing the new standard feature is too arduous for a tyro like me. It's great to see the real expert to complete this.
Oct 17 2022
Oct 14 2022
Oct 13 2022
Oct 12 2022
Thanks for all of your kindly help ;)
Oct 11 2022
Address friendly feedbacks
Oct 10 2022
Address friendly feedback and update all the affected tests
Sep 30 2022
Address kindly feedbacks. No major change in the core algorithm.
There's no update on my side.
Sep 27 2022
Address kindly feedback.
Sep 25 2022
bitcast is handled in this diff.
Sep 23 2022
Sep 22 2022
I have a question : how does the SIMD instruction view the vector register in big endian mode ?