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[RISCV] Don't explicitly select X0 in select branch comparisons

Authored by luke on Jan 23 2023, 9:21 AM.



At some point the register coalescer seems to have been improved such
that the workaround added in 450edb0b3766 is no longer needed.

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Event Timeline

luke created this revision.Jan 23 2023, 9:21 AM
luke requested review of this revision.Jan 23 2023, 9:21 AM
luke updated this revision to Diff 491420.Jan 23 2023, 9:22 AM

Mention GitHub issue in commit message

luke added a comment.Jan 23 2023, 9:26 AM

The codegen changes seem fine to me but perhaps I'm missing something.

craig.topper added inline comments.Jan 23 2023, 9:54 AM

There used to be a branch here when I wrote the original patch. It was made branchless sometime later. Perhaps the coalescer wasn't improved and the test cases don't cover it anymore?

asb added inline comments.Jan 23 2023, 10:33 AM

Unfortunately, I think you're right and that's what's going on here. Seems to be a load of regressions with inputs such as the GCC torture suite.

luke planned changes to this revision.Jan 31 2023, 2:02 AM
luke abandoned this revision.Mar 23 2023, 11:02 AM