[Target] Pass object reference into initializers in object constructors

[jrtc27]

Why?

[MaskRay]

llvm/lib/InterfaceStub/IFSStub.cpp

32 ↗

(On Diff #480695)

IFSStubTriple inherits from IFSStub and appears to have the unneeded constructor.

llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

519 ↗

(On Diff #480695)

This initializes the unused fields in the base class.

[gAlfonso-bit]

This comment was removed by gAlfonso-bit.

[MaskRay]

Still infeasible to me. Not sure why initialize unused fields

llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp

union {
     StringRef Tok;
     RegOp Reg;
     ImmOp Imm;
   };
 
   BPFOperand(KindTy K) : Kind(K) {}
 
 public:
-  BPFOperand(const BPFOperand &o) : MCParsedAsmOperand() {
+  BPFOperand(const BPFOperand &o) : MCParsedAsmOperand(o) {
     Kind = o.Kind;
     StartLoc = o.StartLoc;
     EndLoc = o.EndLoc;
 
     switch (Kind) {
     case Register:
       Reg = o.Reg;
       break;

llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

union {
     struct RegTy Reg;
     struct ImmTy Imm;
   };
 
   HexagonOperand(KindTy K, MCContext &Context) : Kind(K), Context(Context) {}
 
 public:
   HexagonOperand(const HexagonOperand &o)
-      : MCParsedAsmOperand(), Context(o.Context) {
+      : MCParsedAsmOperand(o), Context(o.Context) {
     Kind = o.Kind;
     StartLoc = o.StartLoc;
     EndLoc = o.EndLoc;
     switch (Kind) {
     case Register:
       Reg = o.Reg;
       break;
     case Immediate:

llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

union {
     struct ImmOp Imm;
     struct ExprOp Expr;
     struct TLSRegOp TLSReg;
   };
 
   PPCOperand(KindTy K) : Kind(K) {}
 
 public:
-  PPCOperand(const PPCOperand &o) : MCParsedAsmOperand() {
+  PPCOperand(const PPCOperand &o) : MCParsedAsmOperand(o) {
     Kind = o.Kind;
     StartLoc = o.StartLoc;
     EndLoc = o.EndLoc;
     IsPPC64 = o.IsPPC64;
     switch (Kind) {
     case Token:
       Tok = o.Tok;
       break;

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

union {
     ImmOp Imm;
     struct SysRegOp SysReg;
     struct VTypeOp VType;
   };
 
   RISCVOperand(KindTy K) : Kind(K) {}
 
 public:
-  RISCVOperand(const RISCVOperand &o) : MCParsedAsmOperand() {
+  RISCVOperand(const RISCVOperand &o) : MCParsedAsmOperand(o) {
     Kind = o.Kind;
     IsRV64 = o.IsRV64;
     StartLoc = o.StartLoc;
     EndLoc = o.EndLoc;
     switch (Kind) {
     case KindTy::Register:
       Reg = o.Reg;
       break;